• Refine Query
  • Source
  • Publication year
  • to
  • Language
  • 3
  • Tagged with
  • 6
  • 6
  • 5
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 1
  • 1
  • 1
  • 1
  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Predistortion for Nonlinear Power Amplifiers with Memory

Nizamuddin, Muhammad Ali 30 December 2002 (has links)
The fusion of voice and data applications, along with the demand for high data-rate applications such as video-on-demand, is making radio frequency (RF) spectrum an increasingly expensive commodity for current and future communications. Although bandwidth-efficient digital modulation alleviates part of the problem by requiring a minimal use of spectral resources, they put an extra design burden on RF engineers. RF transmitters and power amplifiers account for more than half the total maintenance cost of a base-station, while occupying nearly the same portion of space. Therefore, power amplifiers become a bottleneck for digital systems in terms of space and power consumption. However, power-efficient use of the amplifiers, although desirable, is extremely detrimental to end-to-end performance due to the very high peak-to-average power ratios of modulations that are used today. In order to reduce distortion while maintaining high power conversion efficiency in a power amplifier, linearization schemes are needed. In addition, significant frequency-dependent Memory Effects result in high power amplifiers operating on wideband signals. Therefore, these effects need to be considered during any attempt to minimize amplifier distortion. In this thesis, we present two schemes to cancel nonlinear distortion of a power amplifier, along with its memory effects and results for one of the schemes. The results highlight the fact that in the presence of significant memory effects, cancellation of these effects is necessary to achieve reasonable improvement in performance through linearization. We focus on predistortive schemes due to their digital- friendly structure and simple implementation. The operating environment consists of a multi-carrier W-CDMA signal. All of the studies are performed using numerical simulation on MATLAB and Agilent's Advanced Design System (ADS). / Master of Science
2

Wireless Channel Characterization for Large Indoor Environments at 5 GHz

Sakarai, Deesha S. 26 July 2012 (has links)
No description available.
3

True-time all optical performance monitoring by means of optical correlation

Abou-Galala, Feras Moustafa 06 June 2007 (has links)
No description available.
4

Space-Time Processing for Ground Surveillance Radar

Wortham, Cody 09 April 2007 (has links)
As the size of an adaptive antenna array grows, the system is able to resist interference signals of increasing bandwidth. This is a result of the transmit pattern gain increasing, which raises the target's return power, and a greater number of degrees of freedom. However, once the interference signal decorrelates completely from one channel to the next, increasing array size will cease to improve detection capability. The use of tapped delay-line processing to improve correlation between channels has been studied for smaller arrays with single element antennas, but previous analyses have not considereded larger systems that are partitioned into subarrays. This thesis quantifies the effect that subarrays have on performance, as measured by the interference bandwidth that can be handled, and explains how tapped delay-line processing can maintain the ability to detect targets in an environment with high bandwidth interference. The analysis begins by deriving equations to estimate the half-power bandwidth of an array with no taps. Then we find that a single delay with optimal spacing is sufficient to completely restore performance if the interference angle is known exactly. However, in practice, the tap spacing will never be optimal because this angle will not be known exactly, so further consideration is given to this non-ideal case and possible solutions for arbitrary interference scenarios are presented. Simulations indicate that systems with multiple taps have more tolerance to increasing interference bandwidth and unknown directions of arrival. Finally, the tradeoffs between ideal and practical configurations are explained and suggestions are given for the design of real-world systems.
5

Radio channel modeling for mobile ad hoc wireless networks

Sng, Sin Hie 06 1900 (has links)
Approved for public release; distribution is unlimited / The radio channel places fundamental limitations on the performance of mobile ad hoc wireless networks. In the mobile radio environment, fading due to multipath delay spread impairs received signals. The purpose of this thesis is to develop a radio channel model and examine the effect of various parameters on channel behavior that is representative of environments in which mobile ad hoc wireless networks operate. The various physical phenomena considered are outdoor environments, fading and multipath propagation, type of terrains, and mobility (Doppler shift). A channel model based on a Tapped Delay Line (TDL) structure was developed and implemented in the MATLAB programming language, and the performance of the time-varying channel was studied by plotting the signal constellations. The simulation results indicate that the number of taps required in the TDL is 8 or less and the carrier frequency did not influence the performance significantly. The Jakes Doppler spectrum should be used in urban environments with high mobility; the Gaussian Doppler spectrum is the choice for low mobility urban environments and for the hilly terrain under both low and high mobility. / Civilian, Singapore Ministry of Defense
6

A 1.8 ps Time-to-Digital Converter (TDC) Implemented in a 20 nm Field-Programmable Gate Array (FPGA) Using a Ones-Counter Encoding Scheme with Embedded Bin-Width Calibrations and Temperature Correction

Sven, Engström January 2020 (has links)
This thesis investigates the use of field-programmable gate arrays (FPGAs) to implement a time-to-digital converter (TDC) with on-chip calibration and temperature correction.Using carry-chains on the Xilinx Kintex UltraScale architecture to create a tapped delay line (TDL) has previously been proven to give good time resolution.This project improves the resolution further by using a bit-counter to handle bubbles in the TDL without removing any taps.The bit counter also adds the possibility of using a wave-union approach previously dismissed as unusable on this architecture.The final implementation achieves an RMS resolution of 1.8 ps.

Page generated in 0.0275 seconds