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Device-Circuit Co-Design Employing Phase Transition Materials for Low Power ElectronicsAhmedullah Aziz (7025126) 12 August 2019 (has links)
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<p>Phase
transition materials (PTM) have garnered immense interest in concurrent
post-CMOS electronics, due to their unique properties such as - electrically
driven abrupt resistance switching, hysteresis, and high selectivity. The phase
transitions can be attributed to diverse material-specific phenomena, including-
correlated electrons, filamentary ion diffusion, and dimerization. In this
research, we explore the application space for these materials through
extensive device-circuit co-design and propose new ideas harnessing their unique
electrical properties. The abrupt transitions and high selectivity of PTMs
enable steep (< 60 mV/decade) switching characteristics in Hyper-FET, a
promising post-CMOS transistor. We explore device-circuit co-design methodology
for Hyper-FET and identify the criterion for material down-selection. We evaluate
the achievable voltage swing, energy-delay trade-off, and noise response for
this novel device. In addition to the application in low power logic device,
PTMs can actively facilitate non-volatile memory design. We propose a PTM
augmented Spin Transfer Torque (STT) MRAM that utilizes selective phase
transitions to boost the sense margin and stability of stored data,
simultaneously. We show that such selective transitions can also be used to
improve other MRAM designs with separate read/write paths, avoiding the possibility
of read-write conflicts. Further, we analyze the application of PTMs as
selectors in cross-point memories. We establish a general simulation framework for
cross-point memory array with PTM based <i>selector</i>.
We explore the biasing constraints, develop detailed design methodology, and
deduce figures of merit for PTM selectors. We also develop a computationally
efficient compact model to estimate the leakage through the sneak paths in a
cross-point array. Subsequently, we present a new sense amplifier design utilizing
PTM, which offers built-in tunable reference with low power and area demand.
Finally, we show that the hysteretic characteristics of unipolar PTMs can be
utilized to achieve highly efficient rectification. We validate the idea by demonstrating
significant design improvements in a <i>Cockcroft-Walton
Multiplier, </i>implemented with TS
based rectifiers. We emphasize the need to explore other PTMs with high
endurance, thermal stability, and faster switching to enable many more
innovative applications in the future.</p></div></div>
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Ingénierie de jonctions tunnel pour améliorer les performances du transistor mono-électronique métallique / Tunnel barrier engineering to enhance the performances of the metallic single electron transistorHajjam, Khalil El 03 December 2015 (has links)
Aujourd’hui plusieurs obstacles technologiques et limitations physiques s’opposent à la poursuite de la miniaturisation de la technologie CMOS : courants de fuite, effet de canal court, effet de porteurs chauds et fiabilité des oxydes de grille. Le transistor à un électron (SET) fait partie des composants émergents candidats pour remplacer les transistors CMOS ou pour constituer une technologie complémentaire à celle-ci. Ce travail de thèse traite de l’amélioration des caractéristiques électriques du transistor à un électron en optimisant ses jonctions tunnel. Cette optimisation commence tout d’abord par une étude des modes de conduction à travers la jonction tunnel. Elle se conclut par le développement d’une jonction tunnel optimisée basée sur un empilement de matériaux diélectriques (principalement Al2O3, HfO2 et TiO2) ayant des propriétés différentes en termes de hauteurs de barrières et de permittivités relatives. Ce manuscrit présente, la formulation des besoins du SET et de ses jonctions tunnel, le développement d’outils de simulation appropriés - basés sur les matrices de transmission - pour la simulation du courant des jonctions tunnel du SET, l’identification des stratégies d’optimisation de ces dernières, grâce aux simulations et finalement l’étude expérimentale et l’intégration technologique des jonctions tunnel optimisées dans le procédé de fabrication de SET métallique en utilisant la technique de dépôt par couches atomiques (ALD). Ces travaux nous ont permis de prouver l’intérêt majeur de l’ingénierie des jonctions tunnel du SET pour accroitre son courant à l’état passant, réduire son courant de fuite et étendre son fonctionnement à des températures plus élevées. / Today, several technological barriers and physical limitations arise against the miniaturization of the CMOS: leakage current, short channel effects, hot carrier effect and the reliability of the gate oxide. The single electron transistor (SET) is one of the emerging components most capable of replacing CMOS technology or provide it with complementary technology. The work of this thesis deals with the improvement of the electrical characteristics of the single electron transistor by optimizing its tunnel junctions. This optimization initially starts with a study of conduction modes through the tunnel junction. It concludes with the development of an optimized tunnel junction based on a stack of dielectric materials (mainly Al2O3, HfO2 and TiO2), having different properties in terms of barrier heights and relative permittivities. This document, therefore, presents the theoretical formulation of the SET’s requirements and of its tunnel junctions, the development of appropriate simulation tools - based on the transmission matrix model- for the simulation of the SET tunnel junctions current, the identification of tunnel junctions optimization strategies from the simulations results and finally the experimental study and technological integration of the optimized tunnel junctions into the metallic SET fabrication process using the atomic layer deposition (ALD) technique. This work allowed to demonstrate the significance of SET tunnel junctions engineering in order to increase its operating current while reducing leakage and improving its operation at higher temperatures.
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Contrôle de nano-antennes optiques par une commande électrique : tuner plasmonique et transductionBerthelot, Johann 11 October 2011 (has links)
Les nano-antennes optiques constituent un élément clé pour le contrôle et l’intéraction lumière/matière à l’échelle nanométrique. Ces systèmes opèrent dans le domaine de l’optique visible et proche infrarouge. Les propriétés de ces composants sont contrôlées en modifiant la taille, la forme et le matériau utilisé. Ces paramètres sont ajustés par les processus de fabrication de l’antenne. Dans le domaine des radio-fréquences, le tuner permet d’ajuster la fréquence de résonance de l’antenne de façon dynamique. Nous avons dans le cadre de cette thèse voulu adapter ce concept de tuner au domaine de l’optique. Le principe employé consiste à changer la résistance de charge de l’antenne, c’est-à-dire l’indice du milieu électrique environnant. Pour cela, nous avons utilisé un matériau anisotrope constitué de molécules de cristaux liquides. L’indice optique est alors modifié par l ’application d’un champ électrique statique. Le changement des propriétés spectrales ainsi que de diffusion d’une antenne de type dimère sont ici démontrées.Toujours en analogie avec les antennes radio-fréquences, nous avons étudié la propriété de transduction électron-photon dans le cas des antennes optiques. Dans ce but, nous avons considéré deux configurations. La première concerne l’utilisation de nanotubes de carbone placés dans une configuration de transistor à effet de champ. Ces objets émettent de la lumière par une recombinaison de paires électrons-trous dans le domaine des longueurs d’ondes Télécom. La seconde configuration emploie des jonctions tunnels fabriquées par électro-migration. Dans ce cas là, la jonction est assimilée à une antenne à interstice. A cause des faibles dimensions des jonctions (autour de 1 nm), nous nous sommes intéressés à la réponse en optique non linéaire de ses objets. Cette technique permet de localiser la jonction tunnel grâce à une forte exaltation du signal. L’etude des différentes caractérisques de ses jonctions sont ici présentées. Une fois la transduction du signal réalisée par l’antenne radiofréquence, celui-ci est acheminé via une ligne de transmission. A l’ échelle nanométrique, les guides plasmoniques s’avèrent être un type de structure approprié. Dans ce cas, les guides peuvent à la fois servir d’´electrode mais aussi de guide. Dans le cadre de cette thèse, nous avons étudié par microscopie à fuites radiatives, dans l’espace direct et réciproque, la plus simple des géométries : le guide ruban métallique. Nous avons cherché à comprendre, pourquoi ce type de structure présente une largeur de coupure. / Optical nano-antennae are the new class of components to control light/matterinteraction at the nanoscale. These devices are operating in the visible to near infraredpart of the spectrum. The properties of these nano objects are controlled by theform, the size and the material.In the radio frequency domain, the tuner changes dynamically the operatingwavelength of the antenna. In this thesis work, we search to transfer this conceptto the nanoscale. The principle is to change the load impedance of the antenna, i.e.changing the optical index of the dielectric medium around the nano-object. Forthat we used anisotropic liquid cristal molecules. The value of the optical index iscontrolled by applying an external electrical static field. The effects on the spectraland scattering properties are demonstrated on a single dimer nano-antenna.However with the microwave antennae, we were interesting to the electronsphotonstransduction with an optical antenna. In this mind, we studied two differentsconfigurations. The first one concerns the use of carbon nanotubes placedin a field effect transistor configuration. These nano-objects emit light in the Telecomwavelength range by a radiative combination of electrons and holes. the secondconfiguration used planar tunnel junctions made by electromigration. In this case,the junctions are view as an optical gap antenna. Because the gap are very small(around 1 nm), we have studied the nonlinear optical response of these objects. Thisnonlinear optical characterization allows to determined the location of the tunneljunctions by an enhancement of the optical signal. The results about the properties(electrical and optical) of these tunnel junctions are presented.Once the transduction by the radio frequency antenna is achieved, this signalis transporting by a transmission line. By transposition at the nanoscale, the plasmonicswaveguides prove to be the most appropriate structure. In this case, theycould be used as an electrode or a waveguide. In this thesis work, we have studiedby leakage radiation microscopy, in the direct and reciprocal space, the simplestgeometry : plasmonic metal strips. We search to understand why these structureshave a cut-off width.
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Adoption of 2T2C ferroelectric memory cells for logic operationRavsher, Taras, Mulaosmanovic, Halid, Breyer, Evelyn T., Havel, Viktor, Mikolajick, Thomas, Slesazeck, Stefan 17 December 2021 (has links)
A 2T2C ferroelectric memory cell consisting of a select transistor, a read transistor and two ferroelectric capacitors that can be operated either in FeRAM mode or in memristive ferroelectric tunnel junction mode is proposed. The two memory devices can be programmed individually. By performing a combined readout operation, the two stored bits of the memory cells can be combined to perform in-memory logic operation. Moreover, additional input logic signals that are applied as external readout voltage pulses can be used to perform logic operation together with the stored logic states of the ferroelectric capacitors. Electrical characterization results of the logic-in-memory (LiM) functionality is presented.
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A 2TnC ferroelectric memory gain cell suitable for compute-in-memory and neuromorphic applicationSlesazeck, Stefan, Ravsher, Taras, Havel, Viktor, Breyer, Evelyn T., Mulaosmanovic, Halid, Mikolajick, Thomas 20 June 2022 (has links)
A 2TnC ferroelectric memory gain cell consisting of two transistors and two or more ferroelectric capacitors (FeCAP) is proposed. While a pre-charge transistor allows to access the single cell in an array, the read transistor amplifies the small read signals from small-scaled FeCAPs that can be operated either in FeRAM mode by sensing the polarization reversal current, or in ferroelectric tunnel junction (FTJ) mode by sensing the polarization dependent leakage current. The simultaneous read or write operation of multiple FeCAPs is used to realize compute-in-memory (CiM) algorithms that enable processing of data being represented by both, non-volatilely internally stored data and externally applied data. The internal gain of the cell mitigates the need for 3D integration of the FeCAPs, thus making the concept very attractive especially for embedded memories. Here we discuss design constraints of the 2TnC cell and present the proof-of-concept for realizing versatile (CiM) approaches by means of electrical characterization results.
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Nanoscale resistive switching memory devices: a reviewSlesazeck, Stefan, Mikolajick, Thomas 10 November 2022 (has links)
In this review the different concepts of nanoscale resistive switching memory devices are described and classified according to their I–V behaviour and the underlying physical switching mechanisms. By means of the most important representative devices, the current state of electrical performance characteristics is illuminated in-depth. Moreover, the ability of resistive switching devices to be integrated into state-of-the-art CMOS circuits under the additional consideration with a suitable selector device for memory array operation is assessed. From this analysis, and by factoring in the maturity of the different concepts, a ranking methodology for application of the nanoscale resistive switching memory devices in the memory landscape is derived. Finally, the suitability of the different device concepts for beyond pure memory applications, such as brain inspired and neuromorphic computational or logic in memory applications that strive to overcome the vanNeumann bottleneck, is discussed.
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