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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
111

Análise da vazão de dados no enlace reverso de redes celulares CDMA / Data throughput analysis for the uplink of the CDMA cellular networks

Mello, Rodolpho Conti Gianini Ferreira, 1988- 12 June 2013 (has links)
Orientador: Celso de Almeida / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação / Made available in DSpace on 2018-08-24T01:46:06Z (GMT). No. of bitstreams: 1 Mello_RodolphoContiGianiniFerreira_M.pdf: 1434278 bytes, checksum: c9d50dad0686c63ee7429ff495370ace (MD5) Previous issue date: 2013 / Resumo: Os fatores responsáveis pela vazão de dados em uma rede celular são o número de usuários alocados em uma célula e a taxa de dados de cada usuário. Desta forma, para alcançar melhores resultados em termos de vazão de dados, deve-se utilizar de técnicas que trabalhem com foco no produto destes dois parâmetros. Este trabalho consiste em uma análise comparativa entre diferentes sistemas CDMA sob a ótica da vazão de dados, tendo como foco sequências de espalhamento do tipo aleatórias e também de Walsh e detecção com filtro casado e com o detector multiusuário descorrelacionador (MUD-D - Multiuser Detector Decorrelator), além de considerar a presença de interferência interna e externa no sistema. O método utilizado para a análise e comparação consiste na modelagem matemática do enlace reverso de um sistema celular DS-CDMA em canal AWGN com controle perfeito de potência e com alguns parâmetros fixos, tais como, a taxa máxima de erro de bit ( ), a taxa mínima de dados por usuário (10 kbps, referente ao serviço de voz) e a potência máxima de transmissão de 0,5W por estação móvel. Este trabalho apresenta também uma análise comparativa entre um sistema DS-CDMA com filtro casado e outro com o detector MUD-D na presença de interferência externa. A análise comparativa do detector MUD-D com o filtro casado em ambiente com interferência externa e toda a análise da vazão de dados do sistema são contribuições do autor / Abstract: The factors responsible for the data throughput in a cellular network are the number of users allocated in a cell and the users' data rate. This way, to reach better results in terms of data throughput, one must use techniques that act with focus on the product of those two parameters. This work consists in a comparative analysis among different CDMA systems from the perspective of the data throughput, focusing on random and Walsh spreading sequences and detection method with matched filter and with the multi-user detector decorrelator (MUD-D), besides considering the presence of internal and external interference in the system. The analysis and comparison methods consist in the CDMA cellular system uplink mathematical modelling in an AWGN channel considering a perfect power control and some fixed parameters such as the maximum bit error rate ( ), minimum data rate per user (10 kbps, referring to the voice service) and maximum transmitting power of 0.5 W per mobile station. This work also presents a comparative analysis between a DS-CDMA system with matched filter and another with the MUD-D detector in the presence of external interference. The MUD-D and matched filter comparative analysis in a scenario with external interference and the whole system's data throughput analysis are the author's contribution / Mestrado / Telecomunicações e Telemática / Mestre em Engenharia Elétrica
112

Conception d'un "front-end" RF millimétrique pour un système de communication sur puce multi-accès innovant utilisant un réseau d'interconnexions RF-NoC / Wired RF-based Network On Chip Reconfigurable On Demand

Drillet, Frédéric 14 October 2016 (has links)
Résumé des travaux de thèse Frédéric DRILLETThèse intitulée : Conception d'un front-end RF de bande passante [20-40] GHz pour un système de communication sur puce utilisant un réseau d'interconnexions RF-NoC.Technologie : NXP Qubic4XI (BiCMOS SiGe:C 250 nm)Résumé :La tendance actuelle dans la conception de systèmes sur puces (SoC) est d'intégrer un très grand nombre d'unités de calcul et de mémoires sur une seule puce. Les possibilités de cette intégration poussée permettent aujourd'hui d'envisager le développement d'une électronique offrant une multitude de services. Néanmoins ces architectures posent de nouveaux challenges concernant les interconnexions entre les unités de calcul. En effet, pour les futures générations technologiques, la mise à l'échelle impactera lourdement les performances des interconnexions globales en termes de débit, latence et consommation. Afin de répondre à la problématique des communications intra-puces, un certain nombre de technologies ont été investiguées comme les technologies d’intégration 3D, les architectures utilisant l'optique ou la RF. L'approche RF pour les communications entre les unités de calcul d’un même circuit de type NoC (Network On Chip) présente l'avantage d'une bonne compatibilité avec les technologies CMOS silicium et peut également répondre aux besoins de communication dans les structures 3D.Cette thèse s'inclue dans le projet ANR WiNoCoD qui propose un réseau d'interconnexion RF-NoC utilisant l'OFDMA. Elle porte sur la conception d'un front-end RF générique permettant de transmettre et de recevoir toute la bande passante soit [20-40] GHz. Cette généricité permet une allocation dynamique des porteuses sans reconfiguration du hardware. On utilise la technologie QubiC4XI de NXP Semiconductors, qui est une technologie BiCMOS SiGe:C 250 nm, afin de vérifier la faisabilité d'un tel système avec des moyens actuels. Ce front-end doit être large bande puisqu'il a une bande passante de 20 GHz entre 20 et 40 GHz. Il doit également consommer le moins possible puisqu'il a pour but d'être intégré dans un système contenant plusieurs NoC et qui est donc très énergivore. Il doit également être compact pour ne pas occuper plus de surface que la partie numérique.Cette thèse inclue la conception des éléments composant le front-end, les résultats de simulation et de mesure, ainsi que les performances du système complet. / Frédéric DRILLET thesis work summaryThesis entitled: Design of a [20-40] GHz RF front-end for an on-chip RF-NoC communication system.Technology: NXP Qubic4XI (BiCMOS SiGe:C 250 nm)Summary:A current trend regarding System On Chip design is to include a very big amount of processors and memories on a single chip. Today, these integrated circuits allow to consider an electronic supplying a multitude of services. However, these architectures are challenging in terms of connection between processing units. It could indeed lead to data rate, latency and consumption degradation. In order to overcome these issues technological solutions were investigated such as 3D integration, or optic and RF networks. An RF Network on Chip (NoC) is compatible with silicon CMOS technologies and with 3D structures.This thesis is a part of the ANR project called WiNoCoD (Wired Network on Chip reconfigurable on Demand) which offers an OFDMA RF-NoC. The main work presents a generic RF front-end allowing to transmit and receive the whole [20-40] GHz bandwidth. This generic architecture allows a dynamic allocation of OFDMA subcarriers without any hardware reconfiguration. The technology used is the NXP Semiconductor QubiC4XI which is a BiCMOS SiGe:C 250 nm technology. A current technology is used to check the feasibility of such a system today. This front-end has to be wideband. The power consumption has to be as low as possible as well, as it is going to be integrated in a system containing several NoCs that consume already a lot of power. The system has to be very compact, its total area has to be smaller than the digital part.This thesis includes the design of the front end, the simulation and measurement results and the performance of the full system.
113

VERTICAL TRIGATE METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR IN 4H - SILICON CARBIDE

Rahul Padavagodu ramamurthy (9115403) 28 July 2020 (has links)
<p>Advances in modern technology and recent demand for high power applications have motivated great interest in power electronics. Power semiconductor devices are key components that have enabled significant advances in power electronic systems. Historically, silicon has been the material of choice for power semiconductor devices such as diodes, transistors and thyristors. However, silicon devices are now reaching their fundamental limits, and a transition to wide bandgap semiconductors is critical to make further progress in the field. Among them, SiC (silicon carbide) has attracted increasing attention as a power semiconductor to replace silicon due to its superior properties and technological maturity. In fact, SiC power MOSFETs have been commercially available since 2011, and are actively replacing their silicon counterparts at blocking voltages above 1 kV. At these voltages, the specific on-resistance of SiC MOSFETs is 200-300x lower than that of silicon devices. However, conventional vertical SiC MOSFETs are still far from their theoretical performance at blocking voltages below 2 kV. In this regime, the channel resistance is the dominant limitation due to the relatively low channel mobility at the SiO2/4H-SiC MOS interface.<br></p><p> </p><p>In this thesis, the first successful demonstration of a novel power device in 4H-SiC called the trigate power DMOSFET (double diffused metal oxide semiconductor field effect transistor) is presented. This device reduces the channel resistance by a factor of 3-5× compared with the state-of-art commercial power DMOSFETs, without requiring an increase in the channel mobility. The trigate structure is applied to a power MOSFET for the first time along with a self-aligned short channel process. This new structure utilizes both the conventional horizontal surface as well as the sidewalls of a trench to increase the effective width of the channel without increasing the device area. Conceptual design, optimization, process development and electrical results are presented. The trigate power MOSFET with a trench depth of 1 μm designed for a blocking voltage of 650 V has a specific on-resistance of 1.98 mΩcm<sup>2 </sup>and a channel resistance of 0.67 mΩcm<sup>2</sup>.This corresponds to a ∼2× reduction in the total specific on-resistance, and a 3.3× reduction in the specific channel resistance as compared to a conventional DMOSFET with the same blocking voltage rating. This demonstration is a landmark that could help SiC technology compete successfully in the lower blocking voltage regime below 600 V, and access for the first time a completely new segment in the power electronics application space.</p>
114

Pokročilé metody kódování řeči v signálovém procesoru / Advanced speech coding methods using digital signal processor

Zajíček, Marek January 2011 (has links)
This master thesis describes the practical usage of AMR-WB (Adaptive Multi Rate - Wide Band) codec and its implementation on a digital signal processor which is integrated in functional voice communication system Siemens HiPath 4000. The first part is focused on the complete codec description, especially on an encoder and decoder. The second part partly describes signal processors and then is followed by the practical part of the implementation which is solved from the preliminary activities up to the optimalization of the final functional solution.
115

Contribution à l'étude de la détection des signaux UWB. Etude et implémentation d'un récepteur ad hoc multicapteurs. Applications indoor de localisation / Contribution to the study of UWB signals detection. Design and implementation of an ad hoc receiver for multiple-sensor networks. Indoor localization applications

Pardiñas Mir, Jorge Arturo 11 December 2012 (has links)
Cette thèse s’inscrit dans le projet de communication à proximité aux départements Electronique et Physique et Communications, Images et Traitement de l’Information de l’Institut Télécom Sud Paris. Le projet comporte la mise au point d’un récepteur basé sur une méthode de détection pseudo-cohérente des signaux Ultra Large Bande à double impulsion (TR-UWB), méthode désignée par Time Delayed Sampling and Correlation (TDSC). La première partie de ce document comporte la réalisation d’une plate-forme modulaire de communication UWB basée sur le système de détection TDSC. Cette plate-forme comporte une puce CMOS 0.35μm conçue précédemment au laboratoire EPH. Elle offre la possibilité d’enregistrer des signaux TR-UWB réels et de réaliser des tests de fonctionnement. La deuxième partie est une étude approfondie du récepteur utilisant la méthode TDSC. La détection des signaux UWB et la procédure de synchronisation sont évalués en utilisant les signaux réels acquis à partir de la plate-forme. Un ensemble de tests ont été menés avec des signaux en bande de base et des signaux transposés en fréquence, dans les deux cas en transmission sur câble puis par radio. Les résultats ont permis de valider la détection et le principe de la synchronisation. La troisième partie est une proposition d’estimation de la distance entre deux dispositifs d’un réseau radio UWB utilisant un récepteur TDSC, pour une localisation en intérieur. L’étude fait la synthèse de plusieurs propositions et expérimentations et conduit à la définition des meilleurs critères pour une mesure du temps d’arrivée (TOA) et son implémentation pratique sur un récepteur TDSC / This thesis is part of the Electronics and Physics (EPH) department’s research work at Institut Telecom SudParis in collaboration with the Information, Images and Information Processing (CITI) Department. The project included the development of a receiver architecture called Time Delayed Sampling and Correlation (TDSC) that works with Transmitted Reference Ultra Wideband signals (TR-UWB), and which could achieve a good performance without channel estimation. The first part of this work included the design of a modular UWB communication system based on the TDSC method. This platform uses a 0.35μm CMOS chip conceived by the EPH laboratory. This gives the possibility to record real TR-UWB signals and to achieve functional tests. A second part of the thesis was to deepen the use of the TDSC method for detection of UWB signals and the synchronization procedure of the receiver using real signals acquired by the platform. A series of tests were conducted in this regard by using baseband signals as well as frequency translated signals, through cable channels and radio transmission. The results let us validate the TDSC detection and the synchronization procedure. Finally, a third line of work was the study and development of a distance estimation proposal based on the time of arrival (TOA) of TR-UWB signals, for indoor localization purposes. The study included a synthesis of several proposals and experimental works. Simulations were made and compared with other methods. Experimental results and their good convergence with the simulations let conclude that the proposal is a feasible solution to the measurement of the TOA, based on a TR-UWB receiver with low-complexity architecture
116

Novel Reconfigurable Folded-Slot Antenna Application

Zhao, Jincheng 15 June 2020 (has links)
No description available.
117

Polymer Nanocomposite-Based Wide Band Strain Sensor for 3D Force Measurement Using Piezoelectric and Piezoresistive Data Fusion

Ahmed Mohammed Al Otaibi (11205843) 29 July 2021 (has links)
<div>Polymer nanocomposites (PNC) have an excellent potential for in-situ strain sensing applications in static and dynamic loading scenarios. These PNCs have a polymer matrix of polyvinylidene fluoride (PVDF) with a conductive filler of multi-walled carbon nanotubes (MWCNT) and have both piezoelectric and piezoresistive characteristics. Generally, this composite would accurately measure either low-frequency dynamic strain using piezoresistive characteristic or high-frequency dynamic strains using piezoelectric characteristics of the MWCNT/PVDF film sensor. Thus, the frequency bands of the strain sensor are limited to either piezoresistive or piezoelectric ranges. In this study, a novel weighted fusion technique, called Piezoresistive/Piezoelectric Fusion (PPF), is proposed to combine both piezoresistive and piezoelectric characteristics to capture the wide frequency bands of strain measurements in real-time. This fuzzy logic (FL)-based method combines the salient features (i.e., piezoresistive and piezoelectric) of the nanocomposite sensor via reasonably accurate models to extend the frequency range over a wider band. The FL determines the weight of each signal based on the error between the estimated measurements and the actual measurements. These weights indicate the contribution of each signal to the final fused measurement. The Fuzzy Inference System (FIS) was developed using both optimization and data clustering techniques. In addition, a type-2 FIS was utilized to overcome the model’s uncertainty limitations. The developed PPF methods were verified with experimental data at different dynamic frequencies that were obtained from existing literature. The fused measurements of the MWCNT/PVDF were found to correlate very well with the actual strain, and a high degree of accuracy was achieved by the subtractive clustering PPF’s FISs algorithm. <br></div><div><br></div><div>3D force sensors have proven their effectiveness and relevance for robotics applications. They have also been used in medical and physical therapy applications such as surgical robots and Instrument Assisted Soft Tissue Manipulation (IASTM). The 3D force sensors have been utilized in robot-assisted surgeries and modern physical therapy devices to monitor the 3D forces for improved performances. The 3D force sensor performance and specifications depend on different design parameters, such as the structural configuration, placement of the sensing elements, and load criterion. In this work, different bioinspired structure configurations have been investigated and analyzed to obtain the optimal 3D force sensor configuration in terms of structural integrity, compactness, the safety factor, and strain sensitivity. A Finite Element Analysis (FEA) simulation was used for the analysis to minimize the time of the development cycle.</div><div><br></div><div><br></div><div>A tree branch design was used as the 3D force sensor’s elastic structure. The structure was made of aluminum with a laser-cutting fabrication process. The PVDF/MWCNT films contained piezoresistive and piezoelectric characteristics that allowed for static/low strain measurements and dynamic strain measurements, respectively. Two compositions with 0.1 wt.% and 2 wt.% PVDF/MWCNT sensing elements were selected for piezoelectric and piezoresistive strain measurements, respectively. These characteristic measurements were investigated under different vibration rates in a supported beam experiment. The 3D force sensor was tested under dynamic excitation in the Z-direction and the X-direction. A Direct Piezoresistive/Piezoelectric Fusion (DPPF) method was developed by fusing the piezoresistive and piezoelectric measurements at a given frequency that overcomes the limited frequency ranges of each of the strain sensor characteristics. The DPPF method is based on a fuzzy inference system (FIS) which is constructed and tuned using the subtractive clustering technique. Different nonlinear Hammerstein-Wiener (nlhw) models were used to estimate the actual strain from piezoresistive and piezoelectric measurements at the 3D force sensor. The DPPF method was tested and validated for different strain signal types using presumed Triangle and Square signal waves data. The DPPF has proven its effectiveness in fusing piezoresistive and piezoelectric measurements with different types of signals. In addition, an Extended Direct Piezoresistive/Piezoelectric Fusion (EPPF) is introduced to enhance the DPPF method and perform the fusion in a range of frequencies instead of a particular one. The DPPF and EPPF methods were implemented on the 3D force sensor data, and the developed fusion algorithms were tested on the proposed 3D force sensor experimental data. The simulation results show that the proposed fusion methods have been effective in achieving lower Root Mean Square Error (RMSE) than those obtained from the tuned nlhw models at different operating frequencies.</div>
118

Process Dependence of Defects and Dopants in Wide Band Gap Semiconductor and Oxides

Zhang, Zhichun 24 July 2013 (has links)
No description available.
119

A novel multi-standard dual-wide band polygon SLSIR filter

Tu, Yuxiang X., Ali, Ammar H., Elmegri, Fauzi, Abousitta, M., Abd-Alhameed, Raed, Hussaini, Abubakar S., Elfergani, Issa T., Rodriguez, Jonathan, Atiah, A.S. January 2015 (has links)
No / A novel multi-standard dual-wide band filter with a compact size of only 8.8 mm by 16.8mm is designed and developed for transceiver devices. The proposed filter has a fundamental bandwidth of 1.6GHz with fractional bandwidth (FBW) of 29.7% centered at the 5.4GHz band, and second bandwidth of 300.0MHz with FBW of 3.6% centered at the 8.15GHz band. The basic dual-wide bandwidth is attributed to the interaction of the novel modified polygon pair and upper stub loaded stepped impedance resonator. Moreover, the added down stub loaded stepped impedance resonator (SLSIR) further enhances the pass band performance by widening the bandwidth and optimizing reflection coefficient performance considerably. To validate the proposed ideas, the multi-standard filter is designed and simulated by Ansoft HFSS software. The simulated results agree well with the theory predictions. The featured broad bandwidths over two frequency bands and the miniaturized size of the proposed filter make it very promising for applications in future multi-standard wireless communication.
120

Design of an Ultra-Low Phase Noise and Wide-Band Digital Phase Locked Loop for AWS and PCS Band Applications and CppSim Evaluation

Tiagaraj, Sathya Narasimman 27 September 2016 (has links)
No description available.

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