This dissertation aims to evaluate the package effects on the performance of radio frequency integrated circuits (RFICs) for wireless applications. A model-based study is presented to compare the effects between flip-chip and wire-bond packages on a front-end cascode low-noise amplifier (LNA) in a 2.45 GHz CMOS wireless local area network (WLAN) receiver. To construct the package electrical models, specific modeling dies are designed to help extract the equivalent-circuit elements from measured S-parameters for chip-package interconnects. Furthermore, the ground-proximity effect on on-chip spiral inductors in a flip-chip package is first observed and presented in this modeling study. Excellent agreement between modeling and measurement is obtained by up to 20 GHz for a 64-pin flip-chip ball grid array (FC-BGA) package and a 64-pin wire-bond quad flat nonlead (WB-QFN) package. For practical applications, the established package models are used to predict the degradation of the figure of merit for the cascode LNA under packaged condition. Chip-package co-simulations can achieve good agreement with measurements, and thus can persuasively account for the complete effects caused by the two different packages on the cascode LNA. To simultaneously consider the package and board interconnect effects on RFICs, this dissertation also designs and implements a 1.95 GHz upconverter for the wideband code-division multiple-access (W-CDMA) transmitter. Specific ground wire-bonding and board connection are designed to minimize the linearity degradation due to package and board interconnects. Nonlinear analysis technique is also used to evaluate the nonlinear distortion of the upconverter in the chip-package-board co-design phase. The final measurement results have successfully verified the co-design predictions and simulations for this upconverter.

The Au-Al bond is a commonly used interconection in IC package.The different composition for Au wire will change the different IMC growth. In this study, we will discuss the pure Au wire, and little Pd or Cu addition in Au wire reacted with Al pad for thermal aging, and we will give the models for these cases.

Because of the tremendous amount of media streaming, video calling and high definition TV and gaming, the biggest challenge for the wireless industry is the increasing demand of high data rates. Utilization of mm-wave frequencies is an attractive option to meet this high demand. Recent advances in low cost semiconductor technologies allow realization of low-cost on-chip RF front-ends in the high millimeter wave (mm-wave) frequencies, making it possible to realize compact systems for these application areas. Although integrated circuits (ICs) are one of the main building blocks of a mm-wave system, in order to realize a fully functional wireless system, cost-effective antenna design and packaging are two important pre-conditions. Researchers have investigated and reported low-cost electronics packaging up to 100 GHz to a great extent on ceramic substrates, but mm-wave packaging above 100 GHz is relatively less explored, particularly on organic substrates. This Ph.D. dissertation demonstrates the design and development of microwave and mm-wave on-chip and on-package antennas and organically packaged components and modules ranging from 20 GHz to 170 GHz. The focus of this research was to design and develop mm-wave components and modules on LCP, to investigate the viability of this organic substrate and development of fabrication techniques in the K- (18-26.5 GHz), V- (50 to 70 GHz), W- (75 to 110 GHz), and D- (110 to 170 GHz) bands. Additionally, a demonstration of a micro-machined on-chip antenna has also been presented. This dissertation is divided in three parts: (1) characterization of liquid crystal polymer from 110 to 170 GHz. (2) development of highly radiation efficient on-chip and AiP antennas, and (3) development of mm-wave modules with the integration of antennas.

The trend of electrification in transportation applications has led to the fast development of high-power-density power electronics converters. High-switching-frequency and high-temperature operations are the two key factors towards this target. Both requirements, however, are challenging the fundamental limit of silicon (Si) based devices. The emerging wide-bandgap, silicon carbide (SiC) power devices have become the promising solution to meet these requirements. With these advanced devices, the technology barrier has now moved to the compatible integration technology that can make the best of device capabilities in high-power-density converters. Many challenges are present, and some of the most important issues are explored in this dissertation. First of all, the high-temperature performances of the commercial SiC MOSFET are evaluated extensively up to 200 degree C. The static and switching characterizations show that the device has superior electrical performances under elevated temperatures. Meanwhile, the gate oxide stability of the device - a known issue to SiC MOSFETs in general - is also evaluated through both high-temperature gate biasing and gate switching tests. Device degradations are observed from these tests, and a design trade-off between the performance and reliability of the SiC MOSFET is concluded. To understand the interactions between devices and circuit parasitics, an experimental parametric study is performed to investigate the influences of stray inductances on the MOSFETs switching waveforms. A small-signal model is then developed to explain the parasitic ringing in the frequency domain. From this angle, the ringing mechanism can be understood more easily and deeply. With the use of this model, the effects of DC decoupling capacitors in suppressing the ringing can be further explained in a more straightforward way than the traditional time-domain analysis. A rule of thumb regarding the capacitance selection is also derived. A Power Electronics Building Block (PEBB) module is then developed with discrete SiC MOSFETs. Integrating the power stage together with the peripheral functions such as gate drive and protection, the PEBB concept allows the converter to be built quickly and reliably by simply connecting several PEBB modules. The high-speed gate drive and power stage layout designs are presented to enable fast and safe switching of the SiC MOSFET. Based on the PEBB platform, the state-of-the-art Si and SiC power MOSFETs are also compared in the device characteristics, temperature influences, and loss distributions in a high-frequency converter, so that special design considerations can be concluded for the SiC MOSFET. Towards high-temperature, high-frequency and high-power operations, integrated wire-bond phase-leg modules are also developed with SiC MOSFET bare dice. High-temperature packaging materials are carefully selected based on an extensive literature survey. The design considerations of improved substrate layout, laminated bus bars, and embedded decoupling capacitors are all discussed in detail, and are verified through a modeling and simulation approach in the design stage. The 200 degree C, 100 kHz continuous operation is demonstrated on the fabricated module. Through the comparison with a commercial SiC phase-leg module designed in the traditional way, it is also shown that the design considerations proposed in this work allow the SiC devices in the wire-bond structure to be switched twice as fast with only one-third of the parasitic ringing. To further push the performance of SiC power modules, a novel hybrid packaging technology is developed which combines the small parasitics and footprint of a planar module with the easy fabrication of a wire-bond module. The original concept is demonstrated on a high-temperature rectifier module with SiC JFET. A modified structure is then proposed to further improve design flexibility and simplify module fabrication. The SiC MOSFET phase-leg module built in this structure successfully reaches the switching speed limit of the device almost without any parasitic ringing. Finally, a new switching loop snubber circuit is proposed to damp the parasitic ringing through magnetic coupling without affecting either conduction or switching losses of the device. The concept is analyzed theoretically and verified experimentally. The initial integration of such a circuit into the power module is presented, and possible improvements are proposed. / Ph. D.

In the past decade, there has been an increased interest in low-cost, low-power, high data rate wireless systems for both commercial and defense applications. Some of these include air defense systems, remote sensing radars, and communication systems that are used for unmanned aerial vehicles, ground vehicles, and even the individual consumer. All of these applications require state-of-the-art technologies to push the limits on several design factors such as functionality, weight, size, conformity, and performance while remaining cost effective. There are several potential solutions to accomplish these objectives and a highly pursued path is through the utilization of advanced integrated system platforms with high frequency, versatile, multilayered materials. This work intends to explore advanced 3-D integration for state-of the art components in wireless systems using LCP multilayer organic platforms. Several packaging techniques are discussed that utilize the inherent benefits of this material. Wire bond, via interconnect, and flip-chip packages are implemented at RF and millimeter-wave (mm-wave) frequencies to explore the benefits of each in terms of convenience, reliability, cost, and performance. These techniques are then utilized for the demonstration of bulk acoustic waveguide (BAW) filter applications and for the realization of highly integrated phased-array antenna systems.

Les performances, l’encombrement, l’efficacité et la fiabilité des dispositifs sont parmi les enjeux majeurs de l’électronique de puissance. Ils se traduisent sur la conception, la fabrication et le packaging des semiconducteurs. Aujourd’hui, le packaging 3D apporte des réponses concrètes à ces problématiques en regard de l’approche standard (2D). Malgré les excellentes propriétés de ces modules 3D au niveau de la réduction de la signature CEM et du refroidissement, la réalisation, notamment les interconnexions, est complexe. Une approche globale prenant en compte un maximum de paramètres a été développée dans cette thèse. L’ensemble de ce travail s’appuie sur deux propositions que sont la conception couplée entre les composants et le packaging ainsi qu’une fabrication collective à l’échelle de la plaque des modules de puissance. Elles se combinent par la mise en place d’une filière d’étapes technologiques appuyée sur une boite à outils de procédés génériques. Cette approche est concrétisée par la réalisation d’un module de puissance 3D performant et robuste adressant des convertisseurs polyphasés avec des gains aussi bien sur les procédés de fabrication que le module lui-même ainsi que sur le système final.Ce travail offre une nouvelle vision alternative pour l’élaboration des modules électroniques de puissance. Il ouvre également des opportunités pour une fabrication et un packaging plus performants pour les nouveaux semiconducteurs grand gap. / Performances, efficiency and reliability are among the main issues in power electronics. Nowadays, 3D packaging solutions increase standard planar module (2D) performances, for instance EMC. However such integrations are based on complex manufacturing, especially concerning interconnections. Improvements require global and advanced solutions. This work depends on two proposed concepts: a coupled design of the power devices and their associated package and a collective wafer-level process fabrication. A technological offer is proposed based on an innovative power packaging toolbox. Our approach is materialized by the fabrication of a 3D polyphase power module which proved to be more efficient and reliable. The benefits are more precise process manufacturing, lower EMI generation and lower inductive interconnections.As a matter of fact, this work offers a new and advanced technological integration for future power electronics modules, perfectly suitable for the wide bandgap semiconductors.

The objective of the proposed research is to design, implement, and characterize low-cost, lightweight front-end components and subsystems in the microwave domain through innovative packaging architectures for remote sensing applications. Particular emphasis is placed on system-on-package (SoP) solutions implemented in organic substrates as a low-cost alternative to conventional, expensive, rigid, and fragile radio- frequency substrates. To this end, the dielectric properties of organic substrates RT/duroid 5880, 6002 and 6202 are presented from 30 GHz to 70 GHz, covering most of the Ka and V radar bands, giving also a thorough insight on the uncertainty of the microstrip ring resonator method by means of the Monte Carlo uncertainty analysis. Additionally, an ultra-thin, high-power antenna-array technology, with transmit/ receive (T/R) functionality is introduced for mobile applications in the X band. Two lightweight SoP T/R array panels are presented in this work using novel technologies such as Silicon Germanium integrated circuits and microelectromechanical system switches on a hybrid organic package of liquid crystal polymer and RT/duroid 5880LZ. A maximum power of 47 dBm is achieved in a package with a thickness of 1.8 mm without the need of bulky thermal management devices. Finally, to address the thermal limitations of thin-film substrates of interest (liquid crystal polymer, RT/duroid 6002, alumina and Aluminum Nitride), a thermal assessment of microstrip structures is presented in the X band, along with the thermal characterization of the dielectric properties of RT/duroid 6002 from 20 C to 200 C and from 30 GHz to 70 GHz. Additional high-power, X-band technologies presented in this work include: a novel and compact topology for evanescent mode filters, and low-profile Wilkinson power dividers implemented on Aluminum Nitride using Tantalum Nitride thin-film resistors.