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On Real Time Digital Phase Locked Loop Implementation with Application to Timing RecoveryKippenberger, Roger Miles January 2006 (has links)
In digital communication systems symbol timing recovery is of fundamental importance. The accuracy in estimation of symbol timing has a direct effect on received data error rates. The primary objective of this thesis is to implement a practical Digital Phase Locked Loop capable of accurate synchronisation of symbols suffering channel corruption typical of modern mobile communications. This thesis describes an all-software implementation of a Digital Phase Locked in a real-time system. A timing error detection (TED) algorithms optimally implemented into a Digital Signal Processor. A real-time transmitter and receiver system is implemented in order to measure performance when the received signal is corrupted by both Additive White Gaussian Noise and Flat Fading. The Timing Error Detection algorithm implemented is a discrete time maximum likelihood one known as FFML1, developed at Canterbury University. FFML1 along with other components of the Digital Phase Locked loop are implemented entirely in software, using Motorola 56321 assembly language.
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Symbol Synchronization For Msk Signals Based On Matched FilteringSezginer, Serdar 01 January 2003 (has links) (PDF)
In this thesis, symbol timing recovery in MSK signals is investigated making use
of matched filtering. A decision-directed symbol synchronizer cascaded with an
MLSE receiver is proposed for fine timing. Correlation (matched filter) method is
used to recover the timing epoch from the tentative decisions obtained from the
Viterbi algorithm. The fractional delays are acquired using interpolation and an
iterative maximum search process. In order to investigate the tracking
performance of the proposed symbol synchronizer, a study is carried out on three
possible optimum timing phase criteria: (i) Mazo criterion, (ii) the minimum
squared ISI criterion (msISI), and (iii) the minimum BER criterion. Moreover, a
discussion is given about the timing sensitivity of the MLSE receiver. The
performance of the symbol synchronizer is assessed by computer simulations. It is
observed that the proposed synchronizer tracks the variations of the channels
almost the same as the msISI criterion. The proposed method eliminates the cycle
slips very succesfully and is robust to frequency-selective multipath fading
channel conditions even in moderate signal-to-noise ratios.
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Time Out of Mind : the experience of being in time in musical improvisation / Le Temps hors de Soi : l'expérience d'être ensemble temporellement dans l'improvisation musicaleEvans, Rebecca Jane 16 December 2011 (has links)
Ce travail s’attache à étudier l’interaction en direct entre musiciens de jazz, en se focalisant sur un des éléments les plus fondamentaux dans la performance improvisée, l’acte de jouer dans le temps avec un autre. Que se cache-t-il derrière cette qualité engageante de la musique quand des musiciens collaborent et se coordonnent entre eux pour qu’ils aient le sentiment de jouer ensemble dans le temps (selon leur propre expression)? Afin d’étudier les fondements musicaux et psychologiques de cette expérience, nous créons des liens entre la recherche ethnographique existante sur les pratiques de jazz et les études psychologiques sur le temps et sur le timing. Cette thèse comprend trois études empiriques. La première étude a cherché à décrire l’émergence de cette expérience du temps partagé dans des performances d’improvisation libre entre deux musiciens de jazz professionnels. La deuxième étude est une analyse quantitative de la performance d’une section rythmique (batteur et contrebassiste), qui a pour base une micro-analyse acoustique de la pulsation dans quatre versions d’une chanson. Dans la troisième étude on s’est intéressé à la façon dont des auditeurs dits ‘naïfs’ entendent une musique qui est ‘dans le temps’ ou ‘en dehors du temps’. Pour cela nous avons effectué deux études expérimentales sur la perception du timing inter-musicien par des sujets sans éducation musicale formelle, en leur présentant des extraits musicaux manipulés.Dans leur ensemble ces études fournissent des preuves quantitatives qu’il existe une négociation temporelle dynamique entre les musiciens – un partage de temps – au niveau de la pulsation. De plus, ces résultats ont démontré la place centrale du développement narratif dans la performance musicale. L’influence de la construction est manifestée tant par l’organisation spontanée des improvisations musicales en épisodes structurés que par la mise en place collaborative de trajectoires expressive au niveau du développement du tempo local. Ces trajectoires constituent d’ailleurs une interprétation de l’œuvre musicale. Ainsi, ces résultats montrent que les musiciens maîtrisent ensemble les trajectoires expressives de leurs performances, et ce à la fois au niveau de la pulsation et au niveau de la narrativité. Il découle de ce travail l’idée qu’une performance ‘réussie’ (caractérisée par un temps partagé) implique beaucoup plus de flexibilité temporelle que ce que les recherches antérieures proposent. Ces observations nous amènent à définir un forme nouvelle de timing entre musiciens, que nous appelons le timing participatif, et qui est fondé sur l’interaction interpersonnelle motivée et incarnée plutôt que sur les processus individuels de timing expressif. / This dissertation investigates live interaction between jazz musicians with a focus on one of the most fundamental elements in improvisational performance, the seemingly simple act of being in time together. What is behind that powerful, engaging quality of music that comes about when musicians collaborate and coordinate so that they feel that are sharing what they themselves call good time? To investigate the musical and psychological underpinnings of good time, links were highlighted between both existing ethnographic work on jazz practices and psychological studies of time and timing. The thesis presents three empirical studies. The first study consists in a largely descriptive analysis of freely improvised jazz duet performances, and it aims to describe the emergence of good time between musicians playing together. The second study is a quantitative analysis of jazz rhythm section performance (drums and double-bass) based on an acoustic microanalysis of pulse in 4 versions of a song. The third study comprises 2 experiments on the perception of inter-musician timing by ‘naïve’ listeners, exploring how musically-untrained subjects experience the sound of being ‘in’ and ‘out of’ time in manipulated musical samples. Together, these studies provide quantitative evidence for temporal negotiation or turn-taking at the pulse level. Additionally they show the fundamental role of narrative development in musical performance evidenced by the spontaneous organisation of musicians’ improvisations into well framed episodes that have internal structure. It is also evidenced by the mutual establishment of an expressive trajectory of local tempo development that reflects or interprets the musical piece. Thus, these findings demonstrate that musicians together control their expressive performances at both an immediate pulse level and at an overarching level of narrative. An important outcome of this research is that ‘successful’ performance (one with good time) involves far greater temporal flexibility than previously established. These observations lead us to define an additional form of timing between musicians which we have called participatory timing and which is based on motivated and embodied interpersonal interaction rather than on expressive timing at the level of the individual.
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Verificação e otimização de atraso durante a síntese física de circuitos integrados CMOS / Timing verification and optimization in physical synthesis of cmos integrated circuitsSantos, Cristiano Lopes dos January 2005 (has links)
Este trabalho propõe um método de otimização de atraso, através de dimensionamento de transistores, o qual faz parte de um fluxo automático de síntese física de circuitos combinacionais em tecnologia CMOS estática. Este fluxo de síntese física é independente de biblioteca de células, sendo capaz de realizar, sob demanda, a geração do leiaute a partir de um netlist de transistores. O método de otimização proposto faz com que este fluxo de síntese física seja capaz de realizar a geração do leiaute orientado pelas restrições de atraso, garantindo a operação do circuito na freqüência especificada pelo projetista. Este trabalho inclui também uma pesquisa sobre os principais métodos de verificação e otimização de atraso, principalmente aqueles que podem ser aplicados quando a etapa de síntese física chega ao nível de transistores. Um método de análise de timing funcional é utilizado para identificar o atraso e o caminho críticos e, com isso, guiar o método de otimização proposto. Desta forma, não existe desperdício de esforço e desempenho para reduzir o atraso de caminhos que não contribuem efetivamente para determinar a freqüência do circuito. O método proposto neste trabalho explora as possibilidades oferecidas por ser independente de biblioteca de células, mas impõe restrições aos circuitos otimizados para reduzir o impacto do dimensionamento nas etapas de geração de leiaute. O desenvolvimento de um método incremental de seleção de caminhos críticos reduziu consideravelmente o tempo de processamento sem comprometer a qualidade dos resultados. Ainda, a realização de um método seletivo de dimensionamento de transistores, possibilitado pela adaptação de um modelo de atraso pino-a-pino, permitiu reduzir significativamente o acréscimo de área decorrente da otimização e aumentou a precisão das estimativas de atraso. / This work proposes a transistor sizing-based delay optimization method especially tailored for an automatic physical synthesis flow of static CMOS combinational circuits. Such physical synthesis flow is a library-free approach which is able to perform the layout generation using a transistor netlist level description of the circuit. The integration of the proposed optimization method to the automatic physical synthesis renders possible a timing-driven layout generation flow. This work also includes a research of the major delay verification and optimization methods, mainly those that can be applied during the physical synthesis step at the transistor level. A functional timing analysis method is used to identify the critical delay and the critical paths and thus drive the proposed optimization method. Hence, there is no waste of effort to optimize paths which are not responsible for the delay of the circuit. The optimization method proposed in this work explores the advantages provided by a library-free synthesis flow and imposes restrictions to the optimized circuits in order to minimize the impact of the transistor sizing in the layout generation steps. The development of a method for incremental critical path selection reduces the CPU time consumed by the delay optimization step. A pin-to-pin gate delay model was adapted to perform a selective transistor sizing, resulting in a significantly reduction of the area overhead.
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Verificação e otimização de atraso durante a síntese física de circuitos integrados CMOS / Timing verification and optimization in physical synthesis of cmos integrated circuitsSantos, Cristiano Lopes dos January 2005 (has links)
Este trabalho propõe um método de otimização de atraso, através de dimensionamento de transistores, o qual faz parte de um fluxo automático de síntese física de circuitos combinacionais em tecnologia CMOS estática. Este fluxo de síntese física é independente de biblioteca de células, sendo capaz de realizar, sob demanda, a geração do leiaute a partir de um netlist de transistores. O método de otimização proposto faz com que este fluxo de síntese física seja capaz de realizar a geração do leiaute orientado pelas restrições de atraso, garantindo a operação do circuito na freqüência especificada pelo projetista. Este trabalho inclui também uma pesquisa sobre os principais métodos de verificação e otimização de atraso, principalmente aqueles que podem ser aplicados quando a etapa de síntese física chega ao nível de transistores. Um método de análise de timing funcional é utilizado para identificar o atraso e o caminho críticos e, com isso, guiar o método de otimização proposto. Desta forma, não existe desperdício de esforço e desempenho para reduzir o atraso de caminhos que não contribuem efetivamente para determinar a freqüência do circuito. O método proposto neste trabalho explora as possibilidades oferecidas por ser independente de biblioteca de células, mas impõe restrições aos circuitos otimizados para reduzir o impacto do dimensionamento nas etapas de geração de leiaute. O desenvolvimento de um método incremental de seleção de caminhos críticos reduziu consideravelmente o tempo de processamento sem comprometer a qualidade dos resultados. Ainda, a realização de um método seletivo de dimensionamento de transistores, possibilitado pela adaptação de um modelo de atraso pino-a-pino, permitiu reduzir significativamente o acréscimo de área decorrente da otimização e aumentou a precisão das estimativas de atraso. / This work proposes a transistor sizing-based delay optimization method especially tailored for an automatic physical synthesis flow of static CMOS combinational circuits. Such physical synthesis flow is a library-free approach which is able to perform the layout generation using a transistor netlist level description of the circuit. The integration of the proposed optimization method to the automatic physical synthesis renders possible a timing-driven layout generation flow. This work also includes a research of the major delay verification and optimization methods, mainly those that can be applied during the physical synthesis step at the transistor level. A functional timing analysis method is used to identify the critical delay and the critical paths and thus drive the proposed optimization method. Hence, there is no waste of effort to optimize paths which are not responsible for the delay of the circuit. The optimization method proposed in this work explores the advantages provided by a library-free synthesis flow and imposes restrictions to the optimized circuits in order to minimize the impact of the transistor sizing in the layout generation steps. The development of a method for incremental critical path selection reduces the CPU time consumed by the delay optimization step. A pin-to-pin gate delay model was adapted to perform a selective transistor sizing, resulting in a significantly reduction of the area overhead.
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Interval Timing Under a Behavioral Microscope: Dissociating Motivational and Timing Processes in Fixed-Interval PerformanceJanuary 2015 (has links)
abstract: Theories of interval timing have largely focused on accounting for the aggregate properties of behavior engendered by periodic reinforcement, such as sigmoidal psychophysical functions and their scalar property. Many theories of timing also stipulate that timing and motivation are inseparable processes. Such a claim is challenged by fluctuations in and out of states of schedule control, making it unclear whether motivation directly affects states related to timing. The present paper seeks to advance our understanding of timing performance by analyzing and comparing the distribution of latencies and inter-response times (IRTs) of rats in two fixed-interval (FI) schedules of food reinforcement (FI 30-s and FI 90-s), and in two levels of food deprivation. Computational modeling revealed that each component was well described by mixture probability distributions embodying two-state Markov chains. Analysis of these models revealed that only a subset of latencies are sensitive to the periodicity of reinforcement, and pre-feeding only reduces the size of this subset. The distribution of IRTs suggests that behavior in FI schedules is organized in bouts that lengthen and ramp up in frequency with proximity to reinforcement. Pre-feeding slowed down the lengthening of bouts and increased the time between bouts. When concatenated, these models adequately reproduced sigmoidal FI response functions. These findings suggest that behavior in FI fluctuates in and out of schedule control; an account of such fluctuation suggests that timing and motivation are dissociable components of FI performance. These mixture-distribution models also provide novel insights on the motivational, associative, and timing processes expressed in FI performance, which need to be accounted for by causal theories of interval timing. / Dissertation/Thesis / Masters Thesis Psychology 2015
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Recherche de technihadrons dans le spectre di-électrons et alignement temporel du calorimètre Argon liquide de l'expérience ATLAS / Search for technihadrons in the dielectron mass spectrum and timing alignment of the ATLAS Liquid Argon Electromagnetic calorimeterAperio Bella, Ludovica 14 September 2012 (has links)
La campagne du LHC dans les premières années de prise de données a été un succès. La prise de données 2011 a permis d'enregistrer plus de $5~ifb$ de données à $sqrt{s} = 7$~TeV avec l'expérience ATLAS. Dans le travail présenté dans cette thèse l'ensemble de données 2011 est utilisé pour les différentes études. Cette thèse est organisée en cinq chapitres. Dans le premier chapitre est présenté une introduction théorique au modèle standard (MS) et son extension éventuelle la Technicouleur (TC). Le deuxième chapitre donne un aperçu du LHC et du détecteur ATLAS. Dans le troisième chapitre l'analyse temporelle des canaux de lecture du calorimètre à argon liquide est rapportée. Un alignement temporel de l'ensemble du calorimètre permet la synchronisation du système de lecture du détecteur avec l'horologe du LHC et est également utilisé dans des analyses de physique telles que celles pour la recherche de particules à longue durée de vie. Dans le cadre de recherches de nouvelle physique une excellente capacité identification des électrons avec un rendement élevé est nécessaire sur une gamme d'énergie étendue. Le quatrième chapitre de cette thèse présente les mesures d'efficacité du trigger (systeme de déclenchement ) et d'identification des électrons en utilisant les événements Zee . Enfin le dernier chapitre décrit la recherche de résonances à grandes masses dans le canal diélectron, ceci dans les cadre de deux scénarios différents, la Technicouleur "Low-scale" et la Technicouleur "Minimal Walking". L'importance de l'excès potentiel des événements TC par rapport aux prédictions du MS est évaluée dans la distribution de masse invariante dilepton. En l'absence d'écart significatif par rapport aux prédictions du MS des limites avec un niveau de confiance de 95% sont fixées sur la section transversale et sur la masse de résonance. / The LHC campaign in the first years of data taking was successful. The 2011 run has allowed to record more than $5~ifb$ of data at $sqrt{s} = 7$~TeV with the ATLAS experiment. In the work presented in this this thesis the whole 2011 data set is used to performed different studies. This thesis is organized in five chapters. In the first chapter is presented a theoretical introduction to the Standard Model (SM) and to one of its possible extension the TechniColor (TC). The second chapter gives an overview of the LHC complex and of the ATLAS detector components. In the third chapter the timing analysis %performed with the 2011 collision data on all the readout channels of the Liquid Argon Calorimeter is reported. A precise timing alignment over the whole calorimeter is used to synchronize the detector readout system with the LHC bunch crossing and has also application in some physics analysis such as those looking for long lived particles. In the searches for new phenomena an excellent electron identification capability, with high efficiency and high jet rejection rate, is required over a broad energy range. The fourth chapter of this thesis presents the measurements of the trigger and the identification electron efficiency using Zee events. % observed on the ATLAS data set acquired in 2011.. Finally the last chapter describes a search for resonant deviations from the Standard Model in the high masses of the dielectron spectrum within two different Technicolor scenarios the Low-scale Technicolor and the Minimal Walking Technicolor. The significance of potential excess of the TC candidate events over the SM background expectation is evaluated in the dilepton invariant mass distribution. In the absence of any significant signal 95% confidence level limits are set on the cross section and on the resonance mass.
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Fluxos de caixa e desempenho de fundos de investimento em ações: uma análise da habilidade de market timing dos investidores no BrasilAraújo, Rebeca Cordeiro da Cunha 22 July 2017 (has links)
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Previous issue date: 2017-07-22 / This study aimed to analyze how the market timing ability (HMT) influences the performance of investors to the Brazilian equity funds. For this, it was measured the performance of investors to the Brazilian equity funds, based on cumulative cash flows over the period of analysis, from 2010 to 2015. Additionally, it was quantified the investor HMT, based on the difference between the performance of managers and the performance of investors. It was also analyzed the relationship between HMT and quality of funds selected by investors, based on risk-adjusted return, determined by three and four factors models. Finally, possible determinants of investor HMT were investigated, based on the characteristics of the Brazilian equity funds, through quantile regression. The results of the first stage of the analysis indicate that, on average, investors in the Brazilian equity funds undertake their profitability due to the moment that they realized cash flows inputs and outputs. This result was also observed in specific classes of funds like Value/Growth, Small Caps and Free. However, for the other classes of funds, it was found that on average, the decisions related to the cash flows caused investors obtain superior performance to that earned by the funds. The results of the second stage of the analysis indicate that there are positive and statistically significant relationship between the adjusted performance risk and HMT. Using the two risk factors models, it was found that the funds classified in the best performance deciles showed positive HMT, which suggests that the better the fund's performance, most investors are penalized for their market timing decisions. Regarding the investigation of the determinants of HMT, the performance gap of investors was lower as the size of funds and greater as the lockup period, the growth rate of cash flows and the last return of funds. The main academic contribution of this study is to show the influence of market timing decisions, from the perspective of individual investors. The use of a individual performance measure based on cash flows, made it possible to quantify the possible gains or losses earned by investors compared to the performance provided by the funds. How market contributions, it is believed that the results of this study may help both Brazilian investors, as the financial market professionals, to take heed to the importance of market timing decisions, and how they can influence positively or negatively the performance earned by investors. / Esta tese teve como objetivo analisar como a habilidade de market timing (HMT) influencia o desempenho de investidores de fundos de ações brasileiros. Para tanto, foi mensurado o desempenho dos investidores de fundos de ações brasileiros, com base nos fluxos de caixa acumulados, ao longo do período de análise, de 01 de janeiro de 2010 a 30 de setembro de 2015. Adicionalmente, foi quantificada a HMT dos investidores, com base na diferença entre o desempenho dos gestores e o desempenho dos investidores dos fundos. Também foi analisada a relação entre a HMT e a qualidade dos fundos selecionados pelos investidores, com base no retorno ajustado ao risco, determinado pelos modelos de três e quatro fatores. Por fim, foram investigados possíveis determinantes da HMT dos investidores, com base nas características de uma amostra de fundos de ações brasileiros, por meio da regressão quantílica. Os resultados da primeira etapa da análise indicam que, em média, os investidores dos fundos de ações brasileiros comprometem sua rentabilidade devido ao momento em que realizam entrada e saída de caixa nos fundos. Esse resultado também foi observado nos fundos das classes específicas Valor/Crescimento, Small Caps e Livre. Entretanto, para as demais classes de fundos, verificou-se que, em média, as decisões relacionadas aos fluxos de caixa fizeram com que os investidores obtivessem desempenho superior àquele auferido pelos fundos. Os resultados da segunda etapa da análise indicam que há relação positiva e estatisticamente significativa entre o desempenho ajustado ao risco e a HMT. Utilizando-se os dois modelos de fatores de risco, verificou-se que os fundos classificados nos decis de melhor desempenho apresentaram HMT positiva, o que sugere que, quanto melhor o desempenho do fundo, mais os investidores são penalizados por suas decisões de market timing. Quanto à investigação dos possíveis determinantes da HMT, a lacuna de performance do desempenho dos investidores foi menor conforme o tamanho dos fundos e maior conforme o período de lockup, a taxa de crescimento dos fluxos de caixa e o retorno passado dos fundos. A principal contribuição acadêmica deste estudo é evidenciar a influência das decisões de market timing, sob a perspectiva dos investidores individuais. Como contribuições ao mercado, acredita-se que os resultados do presente estudo podem auxiliar tanto os investidores brasileiros, quanto os profissionais do mercado financeiro, no sentido de atentarem para a importância das decisões de market timing, e como elas podem influenciar positiva ou negativamente o desempenho auferido pelos investidores.
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Da análise do comportamento à síntese comportamental: integrando modelos a partir de uma arquitetura computacional / From behavior analysis to behavioral synthesis: Integrating models on the grounds of a computational architectureEstêvão Gonçalves Bittar 27 June 2017 (has links)
Os modelos básicos da MPR são usados como blocos de construção de uma máquina estocástica que simula o responder operante. A máquina-MPR é então testada sob uma ampla variedade de condições experimentais, e prova sua capacidade de produzir com realismo: (a) distribuições de IRT, (b) padrões do responder intra-sessão, e (c) as relações entre taxa de reforçamento e taxa de resposta sob esquemas de intervalo e de razão. Em outro conjunto de experimentos, o modelo demonstra propriedades emergentes realistas e reproduz fenômenos bem conhecidos no âmbito dos esquemas múltiplos, como (d) contraste comportamental e (e) desaceleração da extinção ambos além do alcance original da MPR. No último capítulo do estudo, a máquina-MPR é dotada de um modelo de controle temporal. Essa nova configuração, chamada tMPR, se mostra capaz de simular (f) o comportamento de timing que emerge sob esquemas previsíveis de intervalo, assim como (g) as propriedades centrais desse tipo de comportamento. O poder de abarcar um vasto domínio de fenômenos operantes com um mecanismo simples que roda sobre um conjunto de parâmetros com valores fixos e o fato de que ela faz isso a partir de uma arquitetura que pode ser facilmente expandida, faz da máquina-MPR uma plataforma útil para a integração de teorias. À medida que outros pesquisadores enriquecerem o framework com novos módulos, ele poderá ajudar a elucidar como diferentes aspectos do comportamento operante interagem uns com os outros, pavimentando a transição de uma análise do comportamento para uma síntese comportamental. / The basic models of MPR are used as the building blocks of a stochastic machine that simulates operant responding. The MPR-machine is then tested under a wide variety of experimental conditions, and proves its ability to produce realistic (a) IRT distributions, (b) within-session patterns of responding, and (c) relations between reinforcement rate and response rate under interval and ratio schedules. In another set of experiments, the model show realistic emergent properties and reproduces well known multiple schedule phenomena, such as (d) behavioral contrast and (e) extinction deceleration all of them beyond the original reach of MPR. In the last chapter of the study, the MPR-machine is embodied with a model of temporal control. The new configuration, named tMPR, proves itself able to simulate (f) the timing behavior that arises under predictable interval schedules as well as (g) the central properties of this behavior. The power to account for a vast domain of operant behavior phenomena with a simple mechanism that runs on a fixed set of parameter values and the fact that it does so based on an architecture that can be easily expanded to accommodate new models makes the MPR-machine a useful platform for theory integration. As other researchers enrich the framework with new modules, it may help to elucidate how different aspects of operant behavior interact with one another, paving the transition from a behavior analysis to a behavioral synthesis.
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Verificação e otimização de atraso durante a síntese física de circuitos integrados CMOS / Timing verification and optimization in physical synthesis of cmos integrated circuitsSantos, Cristiano Lopes dos January 2005 (has links)
Este trabalho propõe um método de otimização de atraso, através de dimensionamento de transistores, o qual faz parte de um fluxo automático de síntese física de circuitos combinacionais em tecnologia CMOS estática. Este fluxo de síntese física é independente de biblioteca de células, sendo capaz de realizar, sob demanda, a geração do leiaute a partir de um netlist de transistores. O método de otimização proposto faz com que este fluxo de síntese física seja capaz de realizar a geração do leiaute orientado pelas restrições de atraso, garantindo a operação do circuito na freqüência especificada pelo projetista. Este trabalho inclui também uma pesquisa sobre os principais métodos de verificação e otimização de atraso, principalmente aqueles que podem ser aplicados quando a etapa de síntese física chega ao nível de transistores. Um método de análise de timing funcional é utilizado para identificar o atraso e o caminho críticos e, com isso, guiar o método de otimização proposto. Desta forma, não existe desperdício de esforço e desempenho para reduzir o atraso de caminhos que não contribuem efetivamente para determinar a freqüência do circuito. O método proposto neste trabalho explora as possibilidades oferecidas por ser independente de biblioteca de células, mas impõe restrições aos circuitos otimizados para reduzir o impacto do dimensionamento nas etapas de geração de leiaute. O desenvolvimento de um método incremental de seleção de caminhos críticos reduziu consideravelmente o tempo de processamento sem comprometer a qualidade dos resultados. Ainda, a realização de um método seletivo de dimensionamento de transistores, possibilitado pela adaptação de um modelo de atraso pino-a-pino, permitiu reduzir significativamente o acréscimo de área decorrente da otimização e aumentou a precisão das estimativas de atraso. / This work proposes a transistor sizing-based delay optimization method especially tailored for an automatic physical synthesis flow of static CMOS combinational circuits. Such physical synthesis flow is a library-free approach which is able to perform the layout generation using a transistor netlist level description of the circuit. The integration of the proposed optimization method to the automatic physical synthesis renders possible a timing-driven layout generation flow. This work also includes a research of the major delay verification and optimization methods, mainly those that can be applied during the physical synthesis step at the transistor level. A functional timing analysis method is used to identify the critical delay and the critical paths and thus drive the proposed optimization method. Hence, there is no waste of effort to optimize paths which are not responsible for the delay of the circuit. The optimization method proposed in this work explores the advantages provided by a library-free synthesis flow and imposes restrictions to the optimized circuits in order to minimize the impact of the transistor sizing in the layout generation steps. The development of a method for incremental critical path selection reduces the CPU time consumed by the delay optimization step. A pin-to-pin gate delay model was adapted to perform a selective transistor sizing, resulting in a significantly reduction of the area overhead.
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