Este trabalho descreve o acoplamento entre um minicomputador genérico e uma experiência de defeito "RAMAN", com vistas ao conteole e aquisição dos dados da mesma. / This work describes an interface between a generic minicomputer and a Laser Raman spectrometer for control and data acquisition in experiments.

abstract: Assemblers and compilers provide feedback to a programmer in the form of error messages. These error messages become input to the debugging model of the programmer. For the programmer to fix an error, they should first locate the error in the program, understand what is causing that error, and finally resolve that error. Error messages play an important role in all three stages of fixing of errors. This thesis studies the effects of error messages in the context of teaching programming. Given an error message, this work investigates how it effects student’s way of 1) understanding the error, and 2) fixing the error. As part of the study, three error message types were developed – Default, Link and Example, to better understand the effects of error messages. The Default type provides an assembler-centric single line error message, the Link type provides a program-centric detailed error description with a hyperlink for more information, and the Example type provides a program centric detailed error description with a relevant example. All these error message types were developed for assembly language programming. A think aloud programming exercise was conducted as part of the study to capture the student programmer’s knowledge model. Different codes were developed to analyze the data collected as part of think aloud exercise. After transcribing, coding, and analyzing the data, it was found that the Link type of error message helped to fix the error in less time and with fewer steps. Among the three types, the Link type of error message also resulted in a significantly higher ratio of correct to incorrect steps taken by the programmer to fix the error. / Dissertation/Thesis / Masters Thesis Software Engineering 2017

Este trabalho descreve o acoplamento entre um minicomputador genérico e uma experiência de defeito "RAMAN", com vistas ao conteole e aquisição dos dados da mesma. / This work describes an interface between a generic minicomputer and a Laser Raman spectrometer for control and data acquisition in experiments.

To achieve greater compression ratios new video and image CODECs like H.264 and JPEG 2000 take advantage of Context adaptive binary arithmetic coding. As it contains computationally heavy algorithms, fast implementations have to be made when they are performed on large amount of data such as compressing high resolution formats like HDTV. This document describes how entropy coding works in general with a focus on arithmetic coding and CABAC. Furthermore the document dicusses the demands of the different CABACs and propose different options to hardware and instruction level optimisation. Testing and benchmarking of these implementations are done to ease evaluation. The main contribution of the thesis is parallelising and unifying the CABACs which is discussed and partly implemented. The result of the ILA is improved program flow through a specialised branching operations. The result of the DHA is a two bit parallel accelerator with hardware sharing between JPEG 2000 and H.264 encoder with limited decoding support.

Orientador: Paulo Cesar Centoducatte / Dissertação (mestrado) - Universidade Estadual de Campinas, Instituto de Computação / Made available in DSpace on 2018-08-05T00:50:23Z (GMT). No. of bitstreams: 1 Baldassin_Alexandro_M.pdf: 957897 bytes, checksum: 02ca08a95301bf7e9262564a9672c8b4 (MD5) Previous issue date: 2005 / Resumo: Projetistas de sistemas dedicados enfrentam atualmente novos desafios em todas as fases do projeto. A difusão da tecnologia conhecida como SoC (System on a Chip) requer novos paradigmas para a especificação, implementação e verificação do projeto. A alta complexidade de tais sistemas e a grande variedade de configurações disponíveis podem tornar a escolha do sistema ideal demorada, prolongando o tempo de projeto e conseqüentemente seu ingresso no mercado. Em especial, no processo de escolha de um certo processador, o projetista necessita de um conjunto básico de ferramentas que lhe permitam analisar questões como desempenho, potência consumida, ou ainda área de silício ocupada. Exemplos de ferramentas importantes nessa fase de avaliação do projeto incluem compiladores, montadores e simuladores de instruções. Nesse contexto, o uso de uma linguagem para descrição de arquitetura (Architecture Description Language, ADL) permite que processadores sejam modelados em níveis altos de abstração, e que um conjunto de ferramentas específicas para o modelo descrito seja gerado automaticamente. ArchC é uma ADL em desenvolvimento no Laboratório de Sistemas de Computação (IC-UNICAMP), e já é capaz de gerar ferramentas de simulação de instruções automaticamente. Desenvolvemos neste trabalho uma ferramenta para geração automática de montadores a partir de modelos descritos em ArchC, denominada acasm 2. O desenvolvimento de acasm nos levou a incorporar novas construções a ArchC para a modelagem da linguagem de montagem e da codificação das instruções. Nossa ferramenta gera um conjunto de arquivos dependentes de arquitetura para o redirecionamento do montador GNU Assembler (gas). Usamos acasm para gerar montadores a partir de modelos, em ArchC, das arquiteturas MIPS-I e SPARC-V8, e comparamos os arquivos objetos obtidos com os gerados pelo montador gas nativo para ambas arquiteturas. Os resultados mostraram que os arquivos gerados pelo nosso montador foram idênticos aos gerados pelo montador nativo para ambas arquiteturas / Abstract: Nowadays, embedded systems designers are facing new challenges at all stages of the design process. The growing of the system-on-chip (SoC) technology is creating new paradigms in the specification, implementation and verification phases of a design. The increasing complexity and the myriad of available configurations make it hard to choose the ideal system, therefore lengthening the design time, as well as time to market. Specially, customization of the processor architecture requires a software toolkit in order to estimate factors such as performance, power dissipation and chip area. Examples of these tools may include compilers, assemblers and instruction level simulators. In this context, the use of an architecture description language (ADL) allows one to model processors using different levels of abstraction. Based on the model, a software toolkit can be automatically generated. ArchC is an ADL being developed by the Computer Systems Laboratory (IC-UNICAMP) and can automatically generate instruction level simulators at its current stage. In this work, we have created a tool to automatically generate assemblers from ArchC models, named acasm 3. While developing acasm we have introduced new language constructions to ArchC in order to describe the assembly language syntax and the instruction encoding scheme. Our tool retargets the GNU assembler (gas) to different architectures by generating a set of architecture depedent files based on ArchC models. We used acasm to generate assemblers to the MIPS-I and SPARC-V8 architectures based on our ArchC models. We then compared the object files created by our assemblers with the ones created by the native gas and no difference between each pair of files was noticed, for both architectures / Mestrado / Mestre em Ciência da Computação

Eukaryotic genomes contain a large number of repetitive structures. Their detection and assembly today are the main challenges of bioinformatics. This work includes a classification of repetitive DNA and represents an implementation of a novel de novo assembler focusing on searching and constructing LTR retrotransposons and satellite DNA. Assembler accepts on his input short reads (single or pair-end), obtained from next-generation sequencing machines (NGS). This assembler is based on Overlap Layout Consensus approach.

This Diploma thesis deals with creation and realisation of extensions for medical dental unit Vizio. Specifically, it deals with electrotechnical solution and software for capacitive keyboard and with proposal of principle of control and regulation of speed for integrated brushless motor. The Diploma thesis contains both the description of used hardware components, and software solution implemented in assembly language. This device is already in commercial use.

This master's thesis describes the analysis, design and implementation of an application for automatic generation of UML class diagram. Application is designed as a web service, which provides remote access, especially permanent actuality of generated class diagram. Input of the service is a compiled application written for C# .NET or Java platform. The reader is acquainted with basics of reverse engineering of mentioned platforms and with structure of UML class diagram. Then are these knowledge applied in design and implementation of the service. The main goal is to facilitate and accelerate the activities of software development team members.

This thesis presents the process of creating disassembler for new designed processors. We demand automatic generation of the disassembler. Instruction set for processor is modeled by specialized language ISAC, which offers resources for description of the instruction set. For example it describes format of instruction in the assembly language or format of instruction in the binary form or behavior of this instruction. Internal model is coupled finite automata, which describes relation of textual form of the instruction and binary form of the instruction in formal way. The code of disassembler is generated from the internal model. This disassembler accepts program in binary code at the input and generate equivalent program in assembly language at the output.

This Master's thesis deals with design and a realisation of a device controlling an OLED display, Densitron DD-25664-1A. This display has a resolution of 256 x 64 pixels and allows displaying of 4-bit grayscale. The proposed utility software implements the initialization and termination functions, two sets of fonts { Latin and Greek letters and functions for rendering graphics and text. The result of the project is a device with the controlling software.