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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
31

Benchmarking of Sleipnir DSP Processor, ePUMA Platform

Murugesan, Somasekar January 2011 (has links)
Choosing a right processor for an embedded application, or designing a new pro-cessor requires us to know how it stacks up against the competition, or sellinga processor requires a credible communication about its performance to the cus-tomers, which means benchmarking of a processor is very important. They arerecognized world wide by processor vendors and customers alike as the fact-basedway to evaluate and communicate embedded processor performance. In this the-sis, the benchmarking of ePUMA multiprocessor developed by the Division ofComputer Engineering, ISY, Linköping University, Sweden will be described indetails. A number of typical digital signal processing algorithms are chosen asbenchmarks. These benchmarks have been implemented in assembly code withtheir performance measured in terms of clock cycles and root mean square errorwhen compared with result computed using double precision. The ePUMA multi-processor platform which comprises of the Sleipnir DSP processor and Senior DSPprocessor was used to implement the DSP algorithms. Matlab inbuilt models wereused as reference to compare with the assembly implementation to derive the rootmean square error values of different algorithms. The execution time for differentDSP algorithms ranged from 51 to 6148 clock cycles and the root mean squareerror values varies between 0.0003 to 0.11.
32

Modified (Q, r) Inventory Control Policy for an Assemble-to-Order Environment

Seijo, Roberto L. 2009 August 1900 (has links)
The traditional (Q,r) inventory control model assumes that the date at which the order is entered is the same as the date at which it is requested or expected to be delivered. Hence, the penalty cost is incurred when the customer places the order if inventory is unavailable. This is a reasonable assumption for retail systems and most distribution centers (DC), but not for an assemble-to-order (ATO) environment. In this scenario, there is a delivery time which is usually pre-negotiated and in addition to considering the manufacturing process time and in some cases the outbound transportation time, it also has some safety time built-in. This safety time is defined by the manufacturer and represents information related to when the penalty is incurred. The main objective of this research is to develop a modified (Q,r) policy that incorporates the safety time, and to evaluate this policy in terms of expected inventory cost and expected penalty cost / late orders. The problem is addressed following the heuristic approach discussed by Hadley and Whitin (1963). Two main models are developed based on the following assumptions: 1) early shipments are allowed by the customer, and 2) no early shipments are allowed. The behavior of both models is analyzed mathematically and by means of numerical examples. It is shown that from a manufacturer perspective, the first model is preferred over the traditional (Q,r) model. However, it poses a threat for the long term business relationship with the customer because the service level deteriorates, and for the implications that early shipments have on the customer inventory. The behavior of the second model is strictly related to the problem being addressed. Its merits with respect to the traditional and the "early shipment" model are discussed. This discussion is centered on the coefficient of variation of the lead-time demand, the ratio (IC/pi), and the location of the supplier. A final model which is a hybrid of the previous two shipping policies is developed. The models developed in the course of this research are generalizations of the traditional (Q,r) model.
33

Konstruktion av Laborationskort med PIC-processorn / Construction of a laboration card with the PIC-processor

Wessman, Richard, Svensson, Jonny January 2002 (has links)
<p>In this report you can get a complete instruction about how to build your own development system for the PIC-processor. This card will be used for laborations for the students at LITH-ITN. With this card you can send new assembler codes (new instructions) down to the microprocessor via the Serialport on your computer. Then the new instructions for the microprocessor will start to execute. We made a solder paste stencil at Campus Norrköping solder paste stencil laboratory. The software we made makes it possible to receive and transmit the new code to the board. </p><p>The first part of our report contains some information about why we chose the components that we did. There are also some preferences about how these components are working. We also explain the architecture of the microprocessor because it is then easier to understand how to program it, which is explained later. We have made a guide for Microchips development kit MPLAB and some discussions about it. The components that we use are necessary to initiate and therefore we show in detail how this works. The software for transmitting the code from the computer to the card is presented and so is the code on the board that receives the transmitted data. When the board receives new code through the serial port it puts the code in the memory and start to execute it. To test our construction we made programs, which initiates and reads a temperature from one digital temperature sensor and one analog temperature sensor. We also got the opportunity to learn how the manufacturing of a solder paste stencil is proceeded. This proceed we have described in this report. All software is described in assembler but you can also make your programs in C. Additionally we have made a short investigation about how the C-compiler CCS is installed and used in MPLAB.</p>
34

Kamerasensor : Sensor för att identifiera objekt på bilden från en videokamera

Söderlund, Mikael January 2006 (has links)
<p>Syftet är att konstruera en sensor för att identifiera objekt på bilden från en videokamera. Sensorn består av en mikroprocessor som programmeras i assembler samt en enkel CMOS-videokamera och tillhörande analag elektronik. Sensorn är främst tänkt att användas för övervakning inom tillverkningsindustrin.</p>
35

Integração entre P&D e planejamento estratégico / Integration between strategic planning and R&D

Gilnei Luiz de Moura 19 December 2008 (has links)
Um dos determinantes da competitividade é a inovação. O P&D (Pesquisa e Desenvolvimento) de uma organização pode levar a um diferencial competitivo. Por isso o planejamento estratégico deve ficar atento à decisão estratégica de qual P&D empreender, e em que nível de recursos e prioridade. A integração entre as estratégias de P&D com as tecnologias e estratégias de negócios da organização é tão fundamental quanto a inclusão na administração organizacional do processo de P&D. Todavia a integração entre P&D e planejamento estratégico organizacional é uma tarefa árdua e complexa para qualquer organização. Esta pesquisa aponta para uma proposta de discutir a idéia de que o P&D e o planejamento estratégico devem ser simultaneamente integrados, i.e., o P&D deve conhecer e se envolver nas viabilidades econômico-comerciais de seus projetos e o planejamento estratégico deve considerá-lo nas macro-estratégias da corporação. De forma objetiva, pretende-se não só investigar a relação P&D e o processo de planejamento estratégico, como também examinar sua integração e complementaridade por meio dos processos decisórios e alinhamentos estratégicos em organizações que têm a P&D como importante diferencial competitivo. Para tanto, definem-se como esfera a ser analisada as subsidiárias brasileiras das montadoras de automóveis. Este trabalho caracteriza-se como uma pesquisa aplicada e tem um \'design\' do tipo de avaliação. Trata-se, portanto, de uma pesquisa exploratória. Quanto aos procedimentos, o trabalho apresenta características tanto de uma pesquisa experimental como de um estudo de caso. O plano de pesquisa adotado foi o de pesquisa exploratória, com vieses de pesquisa descritiva, em que os dados coletados foram tanto de natureza qualitativa como quantitativa. A avaliação qualitativa nesta pesquisa deu-se pela descrição, compreensão e interpretação dos fatos coletados, em contraposição a algumas avaliações quantitativas. A população-alvo da presente pesquisa foi composta por executivos de alto escalão de sete montadoras automobilísticas (Fiat, Ford, GM, Nissan, Pegeout, Renault e Volkswagen) que têm influência e contato nos Processos de Planejamento Estratégico e P&D. Para a coleta dos dados primários foram utilizadas entrevistas em profundidade e questionários semi-abertos e semi-estruturados. Como resultados, tem-se que: (i) há participação da alta direção no processo decisório de P&D; (ii) o pessoal de P&D tem autonomia nas decisões em suas áreas de atuação e no levantamento dos problemas a serem discutidos e analisados; (iii) o pessoal de P&D participa constantemente da definição do risco técnico de um negócio em todas as empresas, mas em algumas não participam do risco comercial deste negócio; (iv) as competências tecnológicas são levadas em consideração no planejamento estratégico; (v) existem correlações entre o Planejamento Estratégico e o P&D das montadoras, baseadas na relação da missão, visão e valores com quatro estratégias tecnológicas: 1. aumento da tecnologia existente, 2. transformação de oportunidades em usos práticos, 3. processo integrado entre o (1) e (2), e 4. novos processos e novas tecnologias; (vi) os objetivos tecnológicos são compatíveis com os objetivos estratégicos; (vii) as atualizações da estratégia corporativa e da estratégia tecnológica ocorrem de acordo com a política de cada empresa, havendo muitas semelhanças entre as atualizações dessas duas estratégias. Como conclusão deste trabalho tem-se que, respaldando-se em seu referencial teórico, há evolução na aproximação dos gestores de inovação com os responsáveis pelo processo de planejamento estratégico, dados os altos investimentos em P&D nos últimos anos. Por fim, quatro suposições são levantadas ao término desta pesquisa: (a) nas montadoras há uma tendência de um estilo de gestão alternativa com vieses participativos; (b) o monitoramento da adaptabilidade explica a rapidez na disseminação das inovações nos produtos finais ao mercado consumidor; (c) as matrizes apresentam forte controle nas decisões ligadas às tecnologias adotadas pela direção de suas filiais; e (d) nas montadoras há uma sincronia entre a atualização da estratégia corporativa e a atualização da estratégia tecnológica. / Innovation is one of the most important determinants of competitiveness. The R&D (Research and Development) in an enterprise can take to a competitive advantage. Thus strategic planning should pay attention to which R&D strategic decisions undertake, and in what level of resources and priority. The integration between the strategies of R&D with the technology and business strategies of the firm is as fundamental as the inclusion of R&D in the management process. However, the integration between R&D and strategic planning is a difficult and complex task for any firm. This research points out a proposal to discuss the idea that R&D and corporate strategic planning should be simultaneously integrated, i.e., the R&D knowing and becoming involved with the economic-commercial viabilities of its projects and the strategic planning considering it in its macro-strategies. The aim of this research is to investigate the relationship of R&D and strategic planning, and to examine its integration and complementarity by means of the decision-making processes and strategic alignments in firms that have R&D as important competitive differential. For this purpose, the sphere to be analyzed is the Brazilian subsidiaries of car makers. This work is characterized as an applied research and has an evaluation type of design. Therefore it is an exploratory research. Considering the procedures the work has both characteristics of experimental research as well as case study. The research plan was of exploratory research biased to descriptive research, where the collected data were both of qualitative and quantitative nature. The qualitative evaluation in this research happened by the description, understanding and interpretation of the collected facts, in contrast to some quantitative evaluations. The target population of the present research was composed by executives of top level of seven automobile assemblers (Fiat, Ford, GM, Nissan, Peugeot, Renault and Volkswagen) that have influence and are involved with the processes of Strategic Planning and R&D. For the collection of the primary data in depth interviews were used and half-open and semistructured questionnaires. Research outcomes are: (i) there is participation of top management in the R&D decision-making process; (ii) R&D personnel has autonomy in the decisions concerning their areas of responsibility and in the survey of the problems that should be discussed and analyzed; (iii) R&D personnel usually participate of the technical risk definition of a business in all firms, but in some they do not participate in the commercial risk; (iv) the technological competences are taken in account in the strategic planning; (v) correlations between the strategic planning and R&D of the assemblers are noticed as existent, starting from the relationship of the mission, vision and values with four technological strategies: 1. to increase the existent technology; 2. to take opportunities in practical uses; 3. integrated process between the mentioned (1) and (2); and 4. new processes and new technologies; (vi) the technological objectives are aligned to the strategic objectives; and (vii) the updating of the corporate strategy and of the technological strategy happens according to the polices of each company, having a lot of likeness between the updating of these two strategies. This work concluded, based in its theoretical referential, that there is evolution in the approximation of innovation managers with the personnel responsible for the strategic planning process, given the high investments in R&D in the last years. Finally, four suppositions were raised at the end of this research: (a) in the assemblers there is a tendency of a style of alternative management with participative bias; (b) the monitoring of the adaptability explains the speed in the dissemination of the innovations in the final products to the consumer market; (c) the headquarters office have strong controls in the decisions linked to the technologies adopted by the board of its subsidiaries; and (d) in the assemblers there is a synchronization between the corporate strategy updating and the technological strategy updating.
36

A Multimedia DSP Processor Design / Design av en Multimedia DSP Processor

Gnatyuk, Vladimir, Runesson, Christian January 2004 (has links)
This Master Thesis presents the design of the core of a fixed point general purpose multimedia DSP processor (MDSP) and its instruction set. This processor employs parallel processing techniques and specialized addressing models to speed up the processing of multimedia applications. The MDSP has a dual MAC structure with one enhanced MAC that provides a SIMD, Single Instruction Multiple Data, unit consisting of four parallel data paths that are optimized for accelerating multimedia applications. The SIMD unit performs four multimedia- oriented 16- bit operations every clock cycle. This accelerates computationally intensive procedures such as video and audio decoding. The MDSP uses a memory bank of four memories to provide multiple accesses of source data each clock cycle.
37

Assembler Generator and Cycle-Accurate Simulator Generator for NoGAP

Akhlaq, Faisal, Loganathan, Sumathi January 2010 (has links)
System-on-Chip is increasingly built using ASIP(Application  Specific Instruction set Processor) due to the flexibility and efficiency obtained from ASIPs. NoGAP (Novel Generator of Accelerator and Processor framework) is an innovative approach for  ASIP design, which provides the advantage of both ADL (Architecture  Description Language) and HDL (Hardware Description Language) to the  designer. For the processors designed using NoGAP, software tools need to be automatically generated, to aid the  designer in programming and verifying the processor. As part of the master thesis work, we have developed two generators namely Assembler generator and Cycle-Accurate Simulator generator for NoGAP using C++. The Assembler generator automatically generates an assembler, which is used to convert the assembly code written by a programmer into relocatable binary code. The Cycle-Accurate Simulator generator automatically generates a cycle-accurate simulator to model the behavior of the designed processor. Both these generators are static, and can be used to generate the tools for any processor created using NoGAP. In this report, we have detailed the concepts behind the generators,and the implementation details of the generators. We have listed the results obtained from running assembler and cycle-accurate simulator on a test processor created using NoGAP. / NoGAP
38

Implementation of computer simulation software in learning low-level computer language: a case study

陳志雄, Chan, Chi-hown, Johnny. January 2001 (has links)
published_or_final_version / Education / Master / Master of Science in Information Technology in Education
39

Meta assembler and emulator for the Intel 8086 microprocessor

Shoaib, Rao Mohammad, 1960 - January 1989 (has links)
The thesis describes a Universal meta cross assembler and an emulator for the Intel 8086 microprocessor. The utility is designed to be used as an instructional tool to teach assembly language programming to students. One implementation is available to allow students to run Intel 8086 programs on the university's vax mainframe, so that students can test their programs at their convenience. This setup also results in low operating costs with no additional equipment requirements. Several options are provided in the emulator to debug the 8086 assembly language programs composed by students. The assembler, besides generating Intel 8086 machine code, has the capability to generate machine code for a number of microprocessors or microcontrollers. The machine code file generated by the assembler is the input to the emulator. Both the assembler and the emulator are completely portable and can be recompiled to run on any system with a standard C compiler.
40

Exact and heuristic methods for heterogeneous assembly line balancing problems of type 2. / Métodos exatos e heurísticos para problemas de balancemento de linhas de montagem heterogêneas do tipo 2

Borba, Leonardo de Miranda January 2018 (has links)
A diferença entre estações de trabalho é considerada desprezível em linhas de montagem tradicionais. Por outro lado, linhas de montagem heterogêneas consideram o problema de indústrias nas quais os tempos das tarefas variam de acordo com alguma característica a ser selecionada para a tarefa. No Problema de Balanceamento e Atribuição de Trabalhadores em Linhas de Montagem (do inglês Assembly Line Worker Assignment and Balancing Problem, ALWABP), os trabalhadores são responsáveis por estações de trabalho e de acordo com as suas habilidades, eles executam as tarefas em diferentes quantidades de tempo. Em alguns casos, os trabalhadores podem até ser incapazes de executar algumas tarefas. No Problema de Balanceamento de Linhas de Montagem Robóticas (do inglês Robotic Assembly Line Balancing Problem, RALBP), há diferentes tipos de robôs e o conjunto de tarefas de cada estação deve ser executada por um robô. Robôs do mesmo tipo podem ser usados múltiplas vezes. Nós propomos métodos exatos e heurísticos para a minimização do tempo de ciclo destes dois problemas, para um número fixo de estações. Os problemas têm características similares que são exploradas para produzir limitantes inferiores, métodos inferiores, models de programação inteira mista, e regras de redução e dominância. Para a estratégia de ramificação do método de branch-and-bound, entretanto, as diferenças entre os problemas forçam o uso de dois algoritmos diferentes. Uma estratégia orientada a tarefas tem os melhores resultados para o ALWABP-2, enquanto uma estratégia orientada a estações tem os melhores resultados para o RALBP-2. Nós mostramos que os limitantes inferiores, heurísticas, modelos de programação inteira mista e algoritmos de branch-and-bound para estes dois problemas são competitivos com os métodos do estado da arte da literatura. / The difference among workstations is assumed to be negligible in traditional assembly lines. Heterogeneous assembly lines consider the problem of industries in which the task times vary according to some property to be selected for the task. In the Assembly Line Worker Assignment and Balancing Problem (ALWABP), workers are assigned to workstations and according to their abilities, they execute tasks in different amounts of time. In some cases they can even be incapable of executing some tasks. In the Robotic Assembly Line Balancing Problem (RALBP) there are different types of robots and each station must be executed by a robot. Multiple robots of the same type may be used. We propose exact and heuristic methods for minimizing the cycle time of these two problems, for a fixed number of stations. The problems have similar characteristics that are explored to produce lower bounds, heuristic methods, mixed-integer programming models, and reduction and dominance rules. For the branching strategy of the branch-and-bound method, however, the differences among the problem force the use of two different algorithms. A task-oriented strategy has the best results for the ALWABP-2 while a station-oriented strategy has the best results for the RALBP-2. The lower bounds, heuristics, MIP models and branch-and-bound algorithms for these two problems are shown to be competitive with the state-of-the-art methods in the literature.

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