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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
41

Exact and heuristic methods for heterogeneous assembly line balancing problems of type 2. / Métodos exatos e heurísticos para problemas de balancemento de linhas de montagem heterogêneas do tipo 2

Borba, Leonardo de Miranda January 2018 (has links)
A diferença entre estações de trabalho é considerada desprezível em linhas de montagem tradicionais. Por outro lado, linhas de montagem heterogêneas consideram o problema de indústrias nas quais os tempos das tarefas variam de acordo com alguma característica a ser selecionada para a tarefa. No Problema de Balanceamento e Atribuição de Trabalhadores em Linhas de Montagem (do inglês Assembly Line Worker Assignment and Balancing Problem, ALWABP), os trabalhadores são responsáveis por estações de trabalho e de acordo com as suas habilidades, eles executam as tarefas em diferentes quantidades de tempo. Em alguns casos, os trabalhadores podem até ser incapazes de executar algumas tarefas. No Problema de Balanceamento de Linhas de Montagem Robóticas (do inglês Robotic Assembly Line Balancing Problem, RALBP), há diferentes tipos de robôs e o conjunto de tarefas de cada estação deve ser executada por um robô. Robôs do mesmo tipo podem ser usados múltiplas vezes. Nós propomos métodos exatos e heurísticos para a minimização do tempo de ciclo destes dois problemas, para um número fixo de estações. Os problemas têm características similares que são exploradas para produzir limitantes inferiores, métodos inferiores, models de programação inteira mista, e regras de redução e dominância. Para a estratégia de ramificação do método de branch-and-bound, entretanto, as diferenças entre os problemas forçam o uso de dois algoritmos diferentes. Uma estratégia orientada a tarefas tem os melhores resultados para o ALWABP-2, enquanto uma estratégia orientada a estações tem os melhores resultados para o RALBP-2. Nós mostramos que os limitantes inferiores, heurísticas, modelos de programação inteira mista e algoritmos de branch-and-bound para estes dois problemas são competitivos com os métodos do estado da arte da literatura. / The difference among workstations is assumed to be negligible in traditional assembly lines. Heterogeneous assembly lines consider the problem of industries in which the task times vary according to some property to be selected for the task. In the Assembly Line Worker Assignment and Balancing Problem (ALWABP), workers are assigned to workstations and according to their abilities, they execute tasks in different amounts of time. In some cases they can even be incapable of executing some tasks. In the Robotic Assembly Line Balancing Problem (RALBP) there are different types of robots and each station must be executed by a robot. Multiple robots of the same type may be used. We propose exact and heuristic methods for minimizing the cycle time of these two problems, for a fixed number of stations. The problems have similar characteristics that are explored to produce lower bounds, heuristic methods, mixed-integer programming models, and reduction and dominance rules. For the branching strategy of the branch-and-bound method, however, the differences among the problem force the use of two different algorithms. A task-oriented strategy has the best results for the ALWABP-2 while a station-oriented strategy has the best results for the RALBP-2. The lower bounds, heuristics, MIP models and branch-and-bound algorithms for these two problems are shown to be competitive with the state-of-the-art methods in the literature.
42

Exact and heuristic methods for heterogeneous assembly line balancing problems of type 2. / Métodos exatos e heurísticos para problemas de balancemento de linhas de montagem heterogêneas do tipo 2

Borba, Leonardo de Miranda January 2018 (has links)
A diferença entre estações de trabalho é considerada desprezível em linhas de montagem tradicionais. Por outro lado, linhas de montagem heterogêneas consideram o problema de indústrias nas quais os tempos das tarefas variam de acordo com alguma característica a ser selecionada para a tarefa. No Problema de Balanceamento e Atribuição de Trabalhadores em Linhas de Montagem (do inglês Assembly Line Worker Assignment and Balancing Problem, ALWABP), os trabalhadores são responsáveis por estações de trabalho e de acordo com as suas habilidades, eles executam as tarefas em diferentes quantidades de tempo. Em alguns casos, os trabalhadores podem até ser incapazes de executar algumas tarefas. No Problema de Balanceamento de Linhas de Montagem Robóticas (do inglês Robotic Assembly Line Balancing Problem, RALBP), há diferentes tipos de robôs e o conjunto de tarefas de cada estação deve ser executada por um robô. Robôs do mesmo tipo podem ser usados múltiplas vezes. Nós propomos métodos exatos e heurísticos para a minimização do tempo de ciclo destes dois problemas, para um número fixo de estações. Os problemas têm características similares que são exploradas para produzir limitantes inferiores, métodos inferiores, models de programação inteira mista, e regras de redução e dominância. Para a estratégia de ramificação do método de branch-and-bound, entretanto, as diferenças entre os problemas forçam o uso de dois algoritmos diferentes. Uma estratégia orientada a tarefas tem os melhores resultados para o ALWABP-2, enquanto uma estratégia orientada a estações tem os melhores resultados para o RALBP-2. Nós mostramos que os limitantes inferiores, heurísticas, modelos de programação inteira mista e algoritmos de branch-and-bound para estes dois problemas são competitivos com os métodos do estado da arte da literatura. / The difference among workstations is assumed to be negligible in traditional assembly lines. Heterogeneous assembly lines consider the problem of industries in which the task times vary according to some property to be selected for the task. In the Assembly Line Worker Assignment and Balancing Problem (ALWABP), workers are assigned to workstations and according to their abilities, they execute tasks in different amounts of time. In some cases they can even be incapable of executing some tasks. In the Robotic Assembly Line Balancing Problem (RALBP) there are different types of robots and each station must be executed by a robot. Multiple robots of the same type may be used. We propose exact and heuristic methods for minimizing the cycle time of these two problems, for a fixed number of stations. The problems have similar characteristics that are explored to produce lower bounds, heuristic methods, mixed-integer programming models, and reduction and dominance rules. For the branching strategy of the branch-and-bound method, however, the differences among the problem force the use of two different algorithms. A task-oriented strategy has the best results for the ALWABP-2 while a station-oriented strategy has the best results for the RALBP-2. The lower bounds, heuristics, MIP models and branch-and-bound algorithms for these two problems are shown to be competitive with the state-of-the-art methods in the literature.
43

Konstruktion av Laborationskort med PIC-processorn / Construction of a laboration card with the PIC-processor

Wessman, Richard, Svensson, Jonny January 2002 (has links)
In this report you can get a complete instruction about how to build your own development system for the PIC-processor. This card will be used for laborations for the students at LITH-ITN. With this card you can send new assembler codes (new instructions) down to the microprocessor via the Serialport on your computer. Then the new instructions for the microprocessor will start to execute. We made a solder paste stencil at Campus Norrköping solder paste stencil laboratory. The software we made makes it possible to receive and transmit the new code to the board. The first part of our report contains some information about why we chose the components that we did. There are also some preferences about how these components are working. We also explain the architecture of the microprocessor because it is then easier to understand how to program it, which is explained later. We have made a guide for Microchips development kit MPLAB and some discussions about it. The components that we use are necessary to initiate and therefore we show in detail how this works. The software for transmitting the code from the computer to the card is presented and so is the code on the board that receives the transmitted data. When the board receives new code through the serial port it puts the code in the memory and start to execute it. To test our construction we made programs, which initiates and reads a temperature from one digital temperature sensor and one analog temperature sensor. We also got the opportunity to learn how the manufacturing of a solder paste stencil is proceeded. This proceed we have described in this report. All software is described in assembler but you can also make your programs in C. Additionally we have made a short investigation about how the C-compiler CCS is installed and used in MPLAB.
44

Automatizované generování příkladů do předmětu Asemblery / Auto-Generation of Examples for Assembly Languages Course

Tomeček, Aleš January 2013 (has links)
{This study analyses approaches to generation of unique assignments for teaching purposes and their potential usefulness for computer labs of assemblers course. Based on that research we design and implement system for creating pseudo unique assignments. As part of the work is also included web application for use directly during course and other tools aiding further work with system itself.
45

Analýza a převod kódů do vyššího programovacího jazyka / Code Analysis and Transformation To a High-Level Language

Křoustek, Jakub Unknown Date (has links)
This paper describes methods and procedures used for code analysis and transformation. It contains basic information of a science discipline called reverse engineering and its use in information technologies. The primary objective is a construction of a generic reverse compiler or decompiler, i.e. tool that can recompile from binary form (optionally from symbolic machine code) to a high level language. This operation is highly dependent on the concrete instruction set and processor architecture. This problem is solved with description of semantic of each instruction by a special language designed for this use. The output is the high level language code and is functionally equivalent to the input. The program is therefore able to work with each instruction set and code written by it can be transformed into the chosen high level language. This proposal is implemented in practice as a part of project Lissom. Generic decompiler is completely new idea. The thesis contains entirely new techniques from theory of compilers and optimizations made by the author.
46

Controle e coleta de dados com microcomputadores : um sistema para experiências em efeito Raman

Navaux, Philippe Olivier Alexandre January 1973 (has links)
Este trabalho descreve o acoplamento entre um minicomputador genérico e uma experiência de defeito "RAMAN", com vistas ao conteole e aquisição dos dados da mesma. / This work describes an interface between a generic minicomputer and a Laser Raman spectrometer for control and data acquisition in experiments.
47

Theory of super power saving circuits and configurations for mixed signal CPU for smartcard application / Teori om extremt energisparande kretsar och konfigurationer för mixed signal CPU för smartcard applikation

Kleist, Anders January 2004 (has links)
<p>Designing an application specific integrated circuit (ASIC) must be starting with careful preparations, otherwise the chip will not be as good as possible. The theoretical studies must cover everything from the chip circuits to the application structure. In mobile applications there is extremely important that the current consumption becomes minimized because the battery power is limited. The power reductions studies must include the most power costing circuits on the chip. When the whole circuit or segments of the circuit is not in use, they must switch fast and simple into another mode that consume nearly none power. This mode is called sleep-mode. If the sleep-mode has very low leakage currents, the lifetime of the application will dramatically increase. </p><p>This report studies the most power costing circuits in smartcard application ASIC. The chip should be used to control a LCD display on the smartcard. The circuits that have been investigated are level shifters, charge pumps and LCD drivers, also sleep-mode configuration possibilities have been investigated. Other small preparing work is also included in the thesis.</p>
48

A study of CABAC hardware acceleration with configurability in multi-standard media processing / En studie i konfigurerbar hårdvaruaccelerering för CABAC i flerstandards mediabearbetning

Flordal, Oskar January 2005 (has links)
<p>To achieve greater compression ratios new video and image CODECs like H.264 and JPEG 2000 take advantage of Context adaptive binary arithmetic coding. As it contains computationally heavy algorithms, fast implementations have to be made when they are performed on large amount of data such as compressing high resolution formats like HDTV. This document describes how entropy coding works in general with a focus on arithmetic coding and CABAC. Furthermore the document dicusses the demands of the different CABACs and propose different options to hardware and instruction level optimisation. Testing and benchmarking of these implementations are done to ease evaluation. The main contribution of the thesis is parallelising and unifying the CABACs which is discussed and partly implemented. The result of the ILA is improved program flow through a specialised branching operations. The result of the DHA is a two bit parallel accelerator with hardware sharing between JPEG 2000 and H.264 encoder with limited decoding support.</p>
49

Theory of super power saving circuits and configurations for mixed signal CPU for smartcard application / Teori om extremt energisparande kretsar och konfigurationer för mixed signal CPU för smartcard applikation

Kleist, Anders January 2004 (has links)
Designing an application specific integrated circuit (ASIC) must be starting with careful preparations, otherwise the chip will not be as good as possible. The theoretical studies must cover everything from the chip circuits to the application structure. In mobile applications there is extremely important that the current consumption becomes minimized because the battery power is limited. The power reductions studies must include the most power costing circuits on the chip. When the whole circuit or segments of the circuit is not in use, they must switch fast and simple into another mode that consume nearly none power. This mode is called sleep-mode. If the sleep-mode has very low leakage currents, the lifetime of the application will dramatically increase. This report studies the most power costing circuits in smartcard application ASIC. The chip should be used to control a LCD display on the smartcard. The circuits that have been investigated are level shifters, charge pumps and LCD drivers, also sleep-mode configuration possibilities have been investigated. Other small preparing work is also included in the thesis.
50

Implementation And Comparison Of The Advanced Encryption Standard Finalist Algorithms On Tms320c54x

Serter, Ahmet Volkan 01 December 2005 (has links) (PDF)
Implementation aspects of Advanced Encryption Standard (AES) Contest finalist algorithms (MARS, RC6, RIJNDAEL, SERPENT and TWOFISH) are studied on TMS320C54X processor. The C codes written by Brian Gladman in 1999 are adapted to TMS320C54X and the speed and memory usage values are compared with the adaptation of Karol Gorski and Michal Skalski&rsquo / s implementation in 1999. The effects of implementation environment are investigated by comparing the two implementations. The sensitivities of the finalist algorithms to plaintext, key and key length variations together with the possible reasons are studied and scrutinized. Three of the algorithms, MARS, RC6 and RIJNDAEL, are implemented on the same platform by using the assembler language. The results show that assembler implementations are improved with respect to C implementations 13% for MARS, 16-20% for RIJNDAEL and 21-28% for RC6.

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