The thesis deals with definitions of new current- or mixed-mode circuit elements and their implementations and applications. Based on the analysis of the state-of-the-art, novel application circuits employing the above circuit elements are designed. For the purpose of the experimental verification, the active elements are implemented via commercial integrated circuits, and their applications are simulated via PSpice. The application circuits are focused on frequency filters, rectifiers, oscillators, and current-copy circuits. Selected applications are analyzed with respect on real influences, and measurements on circuit prototypes are also performed.

This thesis presents the design and development of two switching amplifiers used to drive the so-called smart material actuators. Different from conventional circuits, a smart material actuator is ordinarily a highly capacitive load. Its capacitance is non-linear and its strain is hysteretic with respect to its electrical control signal. This actuator's reactive load property usually causes a large portion of reactive power circulating between the power amplifier and the driven actuator, thus reduces the circuit efficiency in a linear power amplifier scenario. In this thesis, a switching amplifier design based on the PWM technique is proposed to develop a highly efficient power amplifier, and peak current mode control is proposed to reduce the actuator's hysteretic behavior. Since the low frequency current loop gain tends to be low due to the circuit's capacitive load, average current mode control is further proposed to boost the low frequency current loop gain and improve the amplifier's low frequency performance. Both of the circuits have been verified by prototype design and their experimental measurement results are given. / Master of Science

Efficiency and transient response are two key requirements for DC-DC converters. Topology and control are two key topics in this dissertation. A variety of techniques for DC-DC converter performance improvement are presented in this work. Focusing on the efficiency issue, a variety of clamping techniques including both active and passive methods are presented after the ringing issues in DC-DC converters are investigated. By presenting the clamping techniques, a big variety of energy management concepts are introduced. The active bridge-capacitor tank clamping and FET-diode-capacitor tank clamping are close ideas, which transfer the leakage inductor energy to clamping capacitor to prevent oscillation between leakage inductor and junction capacitor of MOSFETs. The two-FET-clamping tank employs two MOSFETs to freewheeling the leakage current when the main MOSFETs of the half-bridge are both off. Driving voltage variation on the secondary side Synchronous Rectifier (SR) MOSFETs in self-driven circuit due to input voltage variation in bus converter applications is also investigated. One solution with a variety of derivations is proposed using zerner-capacitor combination to clamping the voltage while maintaining reasonable power losses. Another efficiency improvement idea comes from phase-shift concept in DC-DC converters. By employing phase-shift scheme, the primary side and the secondary side two MOSFETs have complementary driving signals respectively, which allow the MOSFET to be turned on with Zero Voltage Switching (ZVS). Simulation verified the feasibility of the proposed phase-shifted DC-DC converter. From the control scheme point of view, a novel peak current mode control concept for half-bridge topologies is presented. Aiming at compensating the imbalanced voltage due to peak current mode control in symmetric half-bridge topologies, an additional voltage compensation loop is used to bring the half-bridge capacitor voltage back to balance. In the proposed solutions, one scheme is applied on symmetric half-bridge topology and the other one is applied on Duty-cycle-shifted (DCS) half-bridge topology. Both schemes employ simple circuitry and are suitable for integration. Loop stability issues are also investigated in this work. Modeling work shows the uncompensated half-bridge topology cannot be stabilized under all conditions and the additional compensation loop helps to prevent the voltage imbalance effectively.

MOS current mode logic (MCML) offers low noise digital circuits that reduce noise that can cripple analog components in mixed-signal integrated circuits, when compared to CMOS digital circuits. An MCML standard cell library was developed for the Cadence Virtuoso Integrated Circuit (IC) design software that gives IC designers the ability to design complex, low noise digital circuits for use in mixed-signal and noise sensitive systems at a high level of abstraction, allowing them to get superior products to market faster than competitors. The MCML standard cell library developed and presented here allows for fast development of mixed signal circuits by providing quiet digital building block gates that reduce the simultaneous switching noise (SSN) by an order of magnitude over conventional CMOS based designs [3]. This thesis project developed the following digital gates in MCML as a standard cell library for general-purpose low noise and very low noise applications: inverter, buffer, NAND, AND, NOR, OR, XOR, NXOR, 2:1 MUX, CMOS to MCML, MCML to CMOS, and double edge triggered flip-flop (DETFF).

No description available.

Due to unique characteristics, current-mode control architectures with different implementation approaches have been widely used in power converter design to achieve current sharing, AVP control, and light-load efficiency improvement. Therefore, an accurate model for current-mode control is indispensable to system design due to the existence of subharmonic oscillations. The fundamental difference between current-mode control and voltage-mode control is the PWM modulation. The inductor current, one of state variables, is used in the modulator in current-mode control while an external ramp is used in voltage-mode control. The dynamic nonlinearity of current-mode control results in the difficulty of obtaining the small-signal model for current-mode control in the frequency domain. There has been a long history of the current-mode control modeling. Many previous attempts have been made especially for constant-frequency peak current-mode control. However, few models are available for variable-frequency constant on-time control and V2 current-mode control. It's hard to directly extend the model of peak current-mode control to those controls. Furthermore, there is no simple way of modeling the effects of the capacitor ripple which may result in subharmonic oscillations in V2 current-mode control. In this dissertation, the primary objective to investigate a new and general modeling approach for current-mode control with different implementation methods. First, the fundamental limitation of average models for current-mode control is identified. The sideband components are generated and coupled with the fundamental component through the PWM modulator in the current loop. Moreover, the switching frequency harmonics cannot be ignored in the current loop since the current ripple is used for the PWM modulation. Available average models failed to consider the sideband effects and high frequency harmonics. Due to the complexity of the current loop, it is difficult to analyze current loop in the frequency domain. A new modeling approach for current-mode control is proposed based on the time-domain analysis. The inductor, the switches and the PWM modulator are treated as a single entity to model instead of breaking them into parts to do it. Describing function method is used. Proposed approach can be applied not only to constant-frequency modulation but also to variable-frequency modulation. The fundamental difference between different current-mode controls is elaborated based on the models obtained from the new modeling approach. Then, an equivalent circuit representation of current-mode control is presented for the sake of easy understanding. The effect of the current loop is equivalent to controlling the inductor current as a current source with certain impedance. The circuit representation provides both the simplicity of the circuit model and the accuracy of the proposed model. Next, the new modeling approach is extended to V2 current-mode control based on similar concept. The model for V2 current-mode control can accurately predict subharmonic oscillations due to the influence of the capacitor ripple. Two solutions are discussed to solve the instability issue. After that, a digital application of current-mode control is introduced. High-resolution digital pulse-width modulator (DPWM) is considered to be indispensable for minimizing the possibility of unpredicted limit-cycle oscillations, but results in high cost, especially in the application of voltage regulators for microprocessors. In order to solve this issue, a fully digital current-mode control architecture which can effectively limit the oscillation amplitude is presented, thereby greatly reducing the design challenge for digital controllers by eliminating the need for the high-resolution DPWM. The new modeling strategy is also used to model the proposed digital current-mode control to help system design. As a conclusion, a new modeling approach for current-mode control is fully investigated. Describing function method is utilized as a tool in this dissertation. Proposed approach is quite general and not limit by implementation methods. All the modeling results are verified through simulation and experiments. / Ph. D.

The trend in isolated DC/DC bus converters is to increase the output power in the same brick form factors that have been used in the past. Traditional intermediate bus converters (IBCs) use silicon power metal oxide semiconductor field effect transistors (MOSFETs), which recently have reached the limit in terms of turn on resistance (RDSON) and switching frequency. In order to make the IBCs smaller, the switching frequency needs to be pushed higher, which will in turn shrink the magnetics, lowering the converter size, but increase the switching related losses, lowering the overall efficiency of the converter. Wide-bandgap semiconductor devices are becoming more popular in commercial products and gallium nitride (GaN) devices are able to push the switching frequency higher without sacrificing efficiency. GaN devices can shrink the size of the converter and provide better efficiency than its silicon counterpart provides. A survey of current IBCs was conducted in order to find a design point for efficiency and power density. A two-stage converter topology was explored, with a multiphase buck converter as the front end, followed by an LLC resonant converter. The multiphase buck converter provides regulation, while the LLC provides isolation. With the buck converter providing regulation, the switching frequency of the entire converter will be constant. A constant switching frequency allows for better electromagnetic interference (EMI) mitigation. This work includes the details to design and implement a hard-switched multiphase buck converter with planar magnetics using GaN devices. The efficiency includes both the buck efficiency and the overall efficiency of the two-stage converter including the LLC. The buck converter operates with 40V - 60V input, nominally 48V, and outputs 36V at 1 kW, which is the input to the LLC regulating 36V – 12V. Both open and closed loop was measured for the buck and the full converter. EMI performance was not measured or addressed in this work. / Master of Science / Traditional silicon devices are widely used in all power electronics applications today, however they have reached their limit in terms of size and performance. With the introduction of gallium nitride (GaN) field effect transistors (FETs), the limits of silicon can now be passed with GaN providing better performance. GaN devices can be switched at higher switching frequencies than silicon, which allows for the magnetics of power converters to be smaller. GaN devices can also achieve higher efficiency than silicon, so increasing the switching frequency will not hurt the overall efficiency of the power converter. GaN devices can handle higher switching frequencies and larger currents while maintaining the same or better efficiencies over their silicon counterparts. This work illustrates the design and implementation of GaN devices into a multiphase buck converter. This converter is the front end of a two-stage converter, where the buck will provide regulation and the second stage will provide isolation. With the use of higher switching frequencies, the magnetics can be decreased in size, meaning planar magnetics can be used in the power converter. Planar magnetics can be placed directly inside of the printing circuit board (PCB), which allows for higher power densities and easy manufacturing of the magnetics and overall converter. Finally, the open and closed loop were verified and compared to the current converters that are on the market in the 48V – 12V area of intermediate bus converters (IBCs).

Various types of current mode control are being used in different applications. Model for current mode control is indispensable for proper system design. Since 1980s, modeling of current mode control has been a hot topic in power electronics field. In current mode control, sub-harmonic oscillation is a common issue, especially for constant frequency current mode control: like peak current mode control, valley current mode control, or average current mode control. Recently V2 control is becoming more and more popular due to its simple implementation ad super fast transient response. V2 control can also run into sub-harmonic oscillation just as current mode control. Efforts have been devoted to modeling of V2 control. A common property of different types of current mode control and V2 control is that they are all multi-loop structures and the inner loops are all highly nonlinear. Due to the nonlinearity of the inner loops, modeling of these structures is extremely difficult. Up to now, there are two main problems which haven't been solved: 1. modeling of average current mode control; 2. modeling of V2 control with composite capacitors. This thesis tries to solve these two problems and starts with V2 control. For V2 control with single type of bulk capacitors, an accurate model has been proposed previously. In this thesis, an equivalent circuit model is proposed to get better physical understanding. This method makes use of previous current mode control modeling result and relates V2 control with current mode control. To model V2 control with composite capacitors, capacitor currents and output voltage time domain waveforms are analyzed. Based on describing function method, transfer function from control to output is derived. The modeling result shows that with more parallel ceramic capacitors, system has smaller stability margin. For average current mode control, the structure is compared with V2 control. Similarity between the structures of current compensator in average current mode and output capacitor network in V2 control is identified. V2 model is utilized for average current mode control. The modeling derivation process is simplified. For the current compensator in average current mode control, it is not desired to have a high frequency pole from stability point of view. As a conclusion, a circuit model for V2 control with bulk capacitors is proposed and another two problems are examined: modeling of V2 control with composite capacitors and modeling of average current mode control. It has been demonstrated that there is similarity between these two structures. The modeling results are verified through simulation and experiments. / Master of Science

One of the greatest technological challenges of the world today is reducing the size and weight of the existing products to make them portable. Specifically, in electric vehicles such as electric cars, UAVs and aero planes, the size of battery chargers and inverters needs to be reduced so as to make space for more parts in these vehicles. Electromagnetic Interference (EMI) filters take up a more than 80 % of these power converters, the size of these filters can be reduced by pushing the switching frequency higher. High frequency operation (> 300 kHz) leads to a size in reduction of EMI filters though it also leads to an increase in switching losses thus compromising on efficiency. Thus, soft switching becomes necessary to reduce the losses, adding more electrical components to the converter to achieve soft switching is a common method. However, it increases the physical complexity of the system. Hence, advanced control methods are adopted for today's power converters that enable soft switching for devices specifically ZVS turn-on as the turn-off losses of next generation WBG devices are negligible. Thus, the goal of this research is to discover novel switching algorithms for soft turn-on. The state-of the-art control methods namely CRM and TCM achieve soft turn-on by enabling bi-directional current such that the anti-parallel body diode starts conducting before the device is turned on. CRM and TCM result in variable switching frequency which leads to asynchronous operation in multi-phase and multi-converter systems. Hence, TCM is modified in this dissertation to achieve constant switching frequency, as the goal of this research is to be able to achieve ZVS turn-on for a three-phase converter. Further, Triangular Current Mode (TCM) to achieve soft switching and phase synchronization for three-phase two-level converters is proposed. It is shown how soft switching and sinusoidal currents can be achieved by operating the phases in a combination of discontinuous conduction mode (DCM), TCM and clamped mode. The proposed scheme can achieve soft switching ZVS turn-on for all the three phases. The algorithm is tested and validated on a GaN converter, 99% efficiency is achieved at 0.7 kW with a density of 110 W/in3. The discussion of TCM in current literature is limited to unity power factor assumption, however this limits the algorithm's adoption in real world applications. It is shown how proposed TCM algorithm can be extended to accommodate phase shift with all the three phases operating in a combination of DCM+TCM+Clamped modes of operation. The algorithm is tested and validated on a GaN converter, 99% efficiency is achieved at 0.7 kVA with a density of 110 W/in3. TCM operation results in 33 % higher rms current which leads to higher conduction losses, as WBG devices have lower on-resistance, these devices are the ideal candidates for TCM operation, hence to accurately obtain the device parameters, a detailed device characterization is performed. Further, proposed TCM+DCM+Clamped control algorithm is extended to three-level topologies, the control is modified to extract the advantage of reduced Common Mode Voltage (CMV) switching states of the three-level topology, the switching frequency can thus be pushed to 3 times higher as compared to state-of-the-art SVPWM control while maintaining close to 99 % efficiency. Two switching schemes are presented and both of them have a very small switching frequency variation (6%) as compared to state-of-the-art methods with >200% switching frequency variation. / Doctor of Philosophy / Power supplies are at the heart of today's advanced technological systems like aero planes, UAVs, electrical cars, uninterruptible power supplies (UPS), smart grids etc. These performance driven systems have high requirements for the power conversion stage in terms of efficiency, density and reliability. With the growing demand of reduction in size for electromechanical and electronic systems, it is highly desirable to reduce the size of the power supplies and power converters while maintaining high efficiency. High density is achieved by pushing the switching frequency higher to reduce the size of the magnetics. High switching frequency leads to higher losses if conventional hard switching methods are used, this drives the need for soft switching methods without adding to the physical complexity of the system. This dissertation proposes novel soft switching techniques to improve the performance and density of AC/DC and DC/AC converters at high switching frequency without increasing the component count. The concept and the features of this new proposed control scheme, along with the comparison of its benefits as compared to conventional control methodologies, have been presented in detail in different chapters of this dissertation.

One of the fundamental characteristics of the microprocessor application is its property of dynamic load change. Although idle most of the time, it wakes up in nanoseconds to support sudden workload demands, which are becoming increasingly severe in today's multi-core processors with large core count. From the standpoint of its voltage regulator (VR) design, it must have very good efficiency at light loads, while also supporting a very fast transient response. Thus, the variable-frequency constant on-time current-mode (COTCM) control scheme is widely used in the VRs, as it can automatically reduce its switching frequency during light-load conditions. But, from transient point of view, it has some limitations in response to heavy-load demands by microprocessors; this is resolved by adding different nonlinear controls in state-of-the-art control schemes. These nonlinear controls are difficult to optimize for the widely variable transient conditions in processors. Another major issue for this ripple-based COTCM control is that when the combined inductor-current ripple in multiphase operation becomes zero because of the ripple-cancellation effect, COTCM loses its controllability. Therefore, the goal of this research is to discover a new adaptive COT control scheme that is concurrently very efficient at light-load conditions and also provides a fast and optimized transient response without adding any nonlinear control; hence providing a complete solution for today's high-performance microprocessors. Firstly, the overview of state-of-the-art COTCM control is discussed in detail, and its limitations are analyzed. Analysis shows that one issue plaguing the COTCM control is its slow transient response in both single and multiphase operation. In this context, two methods have been proposed to improve the transient performance of conventional COTCM control in single and multiphase operations. These two methods can effectively reduce the output capacitor count in system, but the ripple-cancellation and phase overlapping issues in multiphase operation are yet to be improved. This provides motivation to search for a new COT control technique that can resolve all these problems together. Therefore, a new concept of inverse charge constant on-time (IQCOT) control is proposed to replace the conventional ripple-based COTCM; the goals are to improve noise immunity at the ripple-cancellation point without adding any external ramp into the system, and to improve the load step-up transient performance in multiphase operation by achieving natural and linear pulse overlapping without adding any nonlinear control. Additionally, the transient performance of the proposed IQCOT has been further improved by naturally increasing or decreasing the TON time during the load step-up or step-down transient period without adding any nonlinear control. As this transient property is inherent in proposed IQCOT control, it is adaptive to the widely variable transient requirements of processors, and always produces an optimized transient response. In order to design the proposed control with high bandwidth for supporting fast transient response, an accurate high-frequency small-signal model needs to be derived. Therefore, a high-frequency model for the proposed IQCOT control is derived using the describing function method. The model is also verified by simulation and hardware results in different operating conditions. From the derived model it is found that the quality factor (Q) of one double-pole set varies with changes in duty cycle. To overcome this challenge, an auto-tuning method for Q-value control is also proposed in this dissertation. / Ph. D. / High performance microprocessors are the heart of all the fascinating computing devices in use today- ranging from the large servers in data centers to the small smartphones. To supply power to these high performance microprocessors, obviously high performance voltage regulators will be required and the expectations from these voltage regulators are increasing day by day with the complexities of the modern microprocessors. The main focus of this research work is to investigate the state-of-the-art control methodologies of today’s voltage regulators, along with the study of their limitations for future challenging requirements, and therefore, propose some effective methodologies to overcome these limitations. In this regard, a novel control method, called ‘Inverse Charge Constant On-Time (IQCOT)’ control, has been proposed in this dissertation. The concept and the features of this new proposed control scheme, along with the comparison of its benefits with the conventional control methodologies, have been presented in detail in different chapters of this dissertation.