In this era of constant evolution of Internet, Network Virtualization is a powerful platform for the existence of heterogeneous and customized networks on a shared infrastructure. Virtual network embedding is pivotal step for network virtualization and also enables the usage of virtual network mapping techniques. The existing state- of-the-art mapping techniques addresses the issues relating to bandwidth, processing capacity and location constraints very effectively. But due to the advancement of real- time and delay sensitive applications on the Internet, there is a need to address the issue of delay in virtual network mapping techniques. As none of the existing state- of-the-art mapping algorithms do not address this issue, in this thesis we address this issue using VHub-Delay and other mapping algorithms. Based on the study and observations, we designed a new mapping technique that can address the issue of delay and finally the effectiveness of the mapping technique is validated by extensive simulations.

The high-dimensional property of delay differential equations makes them useful for various purposes. The applications of systems modelled with delay differential equations demand different degrees of complexity. One solution to tune this property is to make the dynamics of the current state dependent on more delayed states. How the system responds to more delayed states depends on the system under study, as both decreases and increases in the complexity were observed in different nonlinear systems. However, it is also known that when there is an infinite number of delays that follow a continuous distribution, simpler dynamics usually expected due to the averaging over previous states that the delay kernel provides. The present thesis investigates the role of multiple delays in nonlinear time delay systems, as well as methods for evaluating their complexity. Through the use of pseudospectral differentiation, we first compute the Lyapunov exponents of such multi-delay systems. In systems with a large number of delays, chaos is found to be less likely to occur. However, in systems with oscillatory feedback functions, the entropy can increase just by adding a few delays. Our study also demonstrates that the transition to simpler dynamics in nonlinear delay systems can be either monotonous or abrupt. This is particularly true in first-order nonlinear systems, where increasing the width of the distribution of delays results in complexity collapse, even in the presence of a few discrete delays. The roots of the characteristic equation around a fixed point can be used to approximate the degree of complexity of the dynamics of such time-delay systems, as they can be linked to other dynamical invariants such as the Kolmogorov-Sinai entropy. The phenomenon of complexity collapse uncovered in our work was further studied in an 80/20 ratio excitatory-inhibitory neural network. We found that the smaller the time delay, the higher the likelihood of chaotic dynamics, and this also promotes asynchronous spiking activity. But for larger values of the delay, the neurons show synchronized oscillatory spiking activity. A global inhibition at a longer delay results in a novel dynamical pattern of randomly occurring epochs of synchrony within the chaotic dynamics. The final part of the thesis examines the behavior of time delay reservoir computing when there are multiple time delays. It is shown that the choice of spacing between time delays is crucial, and depends on the task at hand. The system was studied for a prediction task with one chaotic input as well as for a mixture of two chaotic inputs. It was found that, similar to the single delay case, there is a resonance when the difference between delays is equal to the clock cycle. Together, our research provides valuable insights into the dynamics and complexity of nonlinear multi-delay systems and the importance of the spacing between delays.

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Stochastic delay differential equations (SDDEs) are systems of differential equations with a time lag in a noisy or random environment. There are many nonlinear SDDEs where a linear growth condition is not satisfied, for example, the stochastic delay Lotka-Volterra model of food chain discussed by Xuerong Mao and Martina John Rassias in 2005. Much research has been done using discrete delay where the dynamics of a process at time t depend on the state of the process in the past after a single fixed time lag \tau. We are researching processes with continuously distributed delay which depend on weighted averages of past states over the entire time lag interval [t-\tau,t].By using martingale concepts, we prove sufficient conditions for the existence of a unique solution, ultimate boundedness, and non-extinction of one-dimensional nonlinear SDDE with continuously distributed delay. We give generalized Khasminskii-type conditions which along with local Lipschitz conditions are sufficient to guarantee the existence of a unique global solution of certain n-dimensional nonlinear SDDEs with continuously distributed delay. Further, we give conditions under which Euler-Maruyama numerical approximations of such nonlinear SDDEs converge in probability to their exact solutions.We give some examples of one-dimensional and 2-dimensional stochastic differential equations with continuously distributed delay which satisfy the sufficient conditions of our theorems. Moreover, we simulate their solutions and analyze the error of approximation using MATLAB to implement the Euler-Maruyama algorithm.

Today's Cyber-Physical Systems (CPS) are typically distributed over several computing nodes communicating by way of shared buses such as Controller Area Network (CAN). Their control performance gets degraded due to variable delays (jitters) incurred by messages on the shared CAN bus due to contention and network overhead. This work presents a novel online delay prediction approach that predicts the message delay at runtime based on real-time traffic information on CAN. It leverages the proposed method to improve control quality, by compensating for the message delay using the Model Predictive Control (MPC) algorithm in designing the controller. By simulating an automotive Cruise Control system and a DC Motor plant in a CAN environment, it goes on to demonstrate that the delay prediction is accurate, and that the MPC design which takes the message delay into consideration, performs considerably better. It also implements the proposed method on an 8-bit 16MHz ATmega328P microcontroller and measures the execution time overhead. The results clearly indicate that the method is computationally feasible for online usage. / Master of Science / In today’s world, most complicated systems such as automobiles employ a decentralized modular architecture with several nodes communicating with each other over a shared medium. The Controller Area Network (CAN) is the most widely accepted standard as far as automobiles are concerned. The performance of such systems gets degraded due to the variable delays (jitters) incurred by messages on the CAN. These delays can be caused by messages of higher importance delaying bus access to the messages of lower importance, or due to other network related issues. This work presents a novel approach that predicts the message delays in real-time based on the traffic information on CAN. This approach leverages the proposed method to improve the control quality by compensating for the message delay using an advanced controller algorithm called Model Predictive Control (MPC). By simulating an automotive Cruise Control system and a DC motor plant in a CAN environment, this work goes on to demonstrate that the delay prediction is accurate, and that the MPC design which takes the message delay into consideration, performs considerably better. It also implements the proposed approach on a low end microcontroller (8bit, 16MHz ATmega328P) and measures the time taken for predicting the delay for each message (execution overhead). The obtained results clearly indicate that the method is computationally feasible for use in a real-time scenario.

Public bus transit operates within an intricate network of routes and stops, where delays are common and can propagate throughout the transit system, affecting systemreliability, passenger satisfaction, and operational efficiency. Existing research on bus delay propagation has primarily focused on route-level delays correlation-basedanalysis, lacking a comprehensive understanding of underlying causal mechanisms of bus delay propagation from a network-level perspective. To enhance our understanding of bus delay propagation within urban transit systems, this study aims to develop a new approach that captures the causal relationshipsbetween stop delays, integrating their temporal and spatial characteristics. Utilizing a causal discovery algorithm for time series data, the thesis infers causal relationshipsfrom bus operation time series data. It then analyze the resulting causal graphs based on complex network measurement indicators. A case study using GTFS data of Stockholm, Sweden, was conducted. The results reveal that stops with a high degree of connections significantly influence delay propagation, with the network exhibiting a community structure that includes both high-degree and low-degree stops. Stops are classified based on their levels into four distinct delay propagation patterns. Critical stops are identified as either delay aggravation or absorption stops, based on their Momentary Conditional Independence (MCI) values. A new metric was constructed, underscoring the importance of considering delays across the entire network rather than isolating analysis to individual routes. The comparison with traditional correlation-based analysis highlights instances of low correlation among stops with high causality and high correlations without underlying causality, emphasizing the deeper insight from the causal approach

Made available in DSpace on 2016-04-29T13:17:49Z (GMT). No. of bitstreams: 1 Paulo Andre Barbosa Panetta.pdf: 927797 bytes, checksum: 1ff8351aa10bad0896b16ccf3e937863 (MD5) Previous issue date: 2013-07-01 / The production of delay of reinforcement with abstains of responses in the delay was studied with four rats. Four experiments were conducted, with one rat in each experiment, and a unique procedure for each study. It was planned an increase in one second upon the duration of the delay in Experiment I, after every three consecutive sessions without responding during the delays. In Experiment II, the delay of reinforcement was kept constant at eight seconds. Experiment III was identical to the previous one, except that the delay periods were signaled. The delay was also signaled in Experiment IV, with an increase of one second on it s duration after every three consecutive sessions without responding during the delay periods. It was only in the last experiment that the occurrence of three consecutive sessions without emissions on the delay periods was observed. This happed on Phases I and II, but not in Phase III. In some few sessions of Experiment I, there was no responding during reinforcement delay, but not for three consecutive sessions. In Experiments II and III, there was not a session without responding upon the delays periods. But it was recorded a reduction in the frequency of emissions during the sessions of both of the experiments, especially in Experiment II. The results indicate that, unless there is an explicit training, emissions will be recorded in the delay periods. The results were discussed from the procedures outlined for each experiment, focusing on the signal functions, the length of delay and the different effects between reinforcement delay resetting and non resetting / Quatro ratos participaram do estudo, que tinha como objetivo geral produzir períodos de atraso fixo de reforço non resetting, através de um treino com resetting, aumento gradual na duração do período de atraso e sinalização apresentada durante o período de atraso. O estudo foi dividido em quatro experimentos, com a participação exclusiva de um sujeito em cada. Foi delineado um procedimento distinto em cada experimento. No Experimento I, foi planejado um aumento de um segundo na duração do atraso de reforço a cada três sessões consecutivas sem emissões nos períodos de atraso. No Experimento II, a duração do atraso de reforço foi mantida constante em oito segundos, sem aumento gradual. O Experimento III foi idêntico ao anterior, com a diferença que os períodos de atraso eram sinalizados pela apresentação de som. No Experimento IV, foi planejado um aumento de um segundo na duração do atraso de reforço, sinalizado pela apresentação do som, a cada três sessões consecutivas sem emissões nos períodos de atraso de reforço. Nos resultados, foi observado apenas no ultimo experimento a ocorrência de três sessões consecutivas sem emissões nos períodos de atraso, durante as Fases Experimentais I e II. Porém, não na Fase Experimental III. Em algumas sessões do Experimento I, não ocorreram emissões durante o atraso de reforço, mas não por três sessões consecutivas. Nos Experimentos II e III, não houve o registro de uma sessão sem emissões nos períodos de atraso, mas foi registrado um redução na frequência de emissões ao longo das sessões dos experimentos, principalmente no Experimento II. Os resultados apontam que, caso não ocorra um treino explicito, emissões serão registradas nos períodos de atraso. Os resultados foram discutidos a partir dos procedimentos delineados para cada experimento, enfocando as funções da sinalização, a duração dos períodos de atraso e os efeitos distintos entre atraso de reforço non resetting e resetting

Delay in commercial commitments and its consequences The purpose of the thesis is to describe all the aspects of delay in commercial commitments in the law system of the Czech Republic with focus on the consequences a delay may cause. Even though the history of the respective legislation is long and uninterrupted (it basically dates back to the Austrian General Civil Code from 1811), certain cases of indistinct interpretation in every-day use of the rules may still arise and that is the reason for elaborating the research. Legislation, expert interpretation of the legislation, papers from professional journals and a number of judicatures, mostly decisions of the Supreme Court of the Czech Republic, are used to thoroughly analyse the topic. The Czech Commercial Code recognises two general kinds of delay - debtor's delay, which occurs if the debtor does not fulfil their (usually contractual) duties in time and/or properly and creditor's delay, that is initiated by the creditor if they do not accept proper fulfilment from the debtor and that supersedes the debtor's delay, if it may be in place. In case of the debtor's delay the law automatically guarantees the creditor several rights. They have the right to insist on the proper fulfilment to be delivered or they are entitled to cancel the contract, if...

With the continued and successful scaling of CMOS, process, voltage, and temperature (PVT), variations are increasing with each technology generation. The process variability impacts all design goals like performance, power budget and reliability of circuits significantly, resulting in yield loss. Hence, variability needs to be modeled and cancelled out by design techniques during the design phase itself. This thesis addresses the variability issues in 65 nm CMOS, across the domains of process technology, device physics and circuit design, with an eventual goal of accurate modeling and prediction of propagation delay and power dissipation. We have designed and optimized 65 nm gate length NMOS/PMOS devices to meet the specifications of the International Technology Roadmap for Semiconductors (ITRS), by two dimensional process and device simulation based design. Current design sign-off practices, which rely on corner case analysis to model process variations, are pessimistic and are becoming impractical for nanoscale technologies. To avoid substantial overdesign, we have proposed a generalized statistical framework for variability-aware circuit design, for timing sign-off and power budget analysis, based on standard cell characterization, through mixed-mode simulations. Two input NAND gate has been used as a library element. Second order statistical hybrid models have been proposed to relate gate delay, static leakage power and dynamic power directly in terms of the underlying process parameters, using statistical techniques of Design Of Experiments - Response Surface Methodology (DOE-RSM) and Least Squares Method (LSM). To extend this methodology for a generic technology library and for computational efficiency, analytical models have been proposed to relate gate delays to the device saturation current, static leakage power to device drain/gate resistance characterization and dynamic power to device CV-characterization. The hybrid models are derived based on mixed-mode simulated data, for accuracy and the analytical device characterization, for computational efficiency. It has been demonstrated that hybrid models based statistical design results in robust and reliable circuit design. This methodology is scalable to a large library of cells for statistical static timing analysis (SSTA) and statistical circuit simulation at the gate level for estimating delay, leakage power and dynamic power, in the presence of process variations. This methodology is useful in bridging the gap between the Technology CAD and Design CAD, through standard cell library characterization for delay, static leakage power and dynamic power, in the face of ever decreasing timing windows and power budgets. Finally, we have explored the gate-to-source/drain overlap length as a device design parameter for a robust variability-aware device structure and demonstrated the presence of trade-off between performance and variability, both at the device level and circuit level.