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Dissertation (Ph.D.)--Auburn University, 2007. / Abstract. Vita. Includes bibliographic references (p.107-111).

Este trabalho visa propor uma metodologia de análise da variabilidade do tempo de atraso de propagação no FPGA. Para alcançar esse objetivo são utilizados três circuitos diferentes: o circuito 1 mede a diferença de atrasos de dois circuitos, o circuito 2 identifica o atraso menor de dois circuitos e, por fim, o terceiro circuito que consiste do oscilador em anel. Cada circuito foi avaliado individualmente numa estrutura BIST, implementada nos FPGA XC3S200-FT256 e EP2C35F672C6. Os métodos utilizados para análise dos dados foram a média móvel, o plano de mínimos quadrados e o teste t-student. A metodologia permitiu mostrar a variabilidade within-die e suas componentes sistêmica e randômica. / This work aims to propose a methodology of analysis of variability of propagation-delay time in FPGA. To achieve this goal three different circuits are implemented: the circuit 1 measures the delay difference of two logic paths, the circuit 2 identifies smallest delay of two logic paths, and finally the third circuit consists of a ring oscillator. Each circuit has been assessed individually in a BIST structure, implemented in FPGAs XC3S200-FT256 and EP2C35F672C6. The methods used for data analysis were the moving average, least-squares plane and the t-student test. The methodology has allowed to evaluate the within-die variability and its systemic and random components.

Embedded/real-time systems are becoming ubiquitous in today's world and their pervasive nature is increasing with the advent of cyber-physical systems. Providing temporal guarantees is paramount in such systems. Most of the normal operation in real-time systems is modelled using periodic tasks. Event-driven behaviour is modelled using aperiodic jobs. To ensure an acceptable Quality of Service for aperiodic jobs without jeopardizing safety of periodic tasks, aperiodic servers were introduced [2], [3]. Aperiodic servers are used to reserve a quota for the execution of aperiodic jobs. However, they do not take into account, cache-related delays that the execution of aperiodic jobs could impose on periodic tasks, thereby making their use in systems with caches unsafe. In this thesis, we introduce Cache Related Delay Servers to solve this problem. Statically, every periodic task's worst-case execution time includes a pre-determined delay quota for delay caused by aperiodic jobs. During system operation, the aperiodic server is allowed to execute only if periodic jobs that may be affected by it have sufficient delay quota to accommodate its execution. Otherwise, the priority of the aperiodic server is temporarily decreased to the level of the lowest-priority periodic job with insufficient quota, thereby ensuring safe execution of periodic tasks.

Este trabalho visa propor uma metodologia de análise da variabilidade do tempo de atraso de propagação no FPGA. Para alcançar esse objetivo são utilizados três circuitos diferentes: o circuito 1 mede a diferença de atrasos de dois circuitos, o circuito 2 identifica o atraso menor de dois circuitos e, por fim, o terceiro circuito que consiste do oscilador em anel. Cada circuito foi avaliado individualmente numa estrutura BIST, implementada nos FPGA XC3S200-FT256 e EP2C35F672C6. Os métodos utilizados para análise dos dados foram a média móvel, o plano de mínimos quadrados e o teste t-student. A metodologia permitiu mostrar a variabilidade within-die e suas componentes sistêmica e randômica. / This work aims to propose a methodology of analysis of variability of propagation-delay time in FPGA. To achieve this goal three different circuits are implemented: the circuit 1 measures the delay difference of two logic paths, the circuit 2 identifies smallest delay of two logic paths, and finally the third circuit consists of a ring oscillator. Each circuit has been assessed individually in a BIST structure, implemented in FPGAs XC3S200-FT256 and EP2C35F672C6. The methods used for data analysis were the moving average, least-squares plane and the t-student test. The methodology has allowed to evaluate the within-die variability and its systemic and random components.

Radio networks are expanding, becoming more advanced, and pushing the limits of what is possible. Services utilizing the radio networks are also being developed in order to provide new functionality to end-users worldwide. When discussing 5G radio networks, concepts such as driverless vehicles, drones and near zero communication delay are recurrent. However, measures of delay are needed in order to verify that such services can be provided -- and measuring this is an extensive task. Ericsson has developed a platform for simulating a radio environment surrounding a radio base station. Using this simulator, this project involved measuring one-way packet delay in a radio network, and performing a Quality of Service evaluation of a radio network with a number of network applications in concern. Application data corresponding to video streams, or Voice over IP conversations, were simulated and packet delay measurements were used to calculate and evaluate the Quality of Service provided by a radio network. One of the main conclusions of this project was that packet delay variations are asymmetric in uplink, which suggests usage of non-conventional jitter measurement techniques.

Este trabalho visa propor uma metodologia de análise da variabilidade do tempo de atraso de propagação no FPGA. Para alcançar esse objetivo são utilizados três circuitos diferentes: o circuito 1 mede a diferença de atrasos de dois circuitos, o circuito 2 identifica o atraso menor de dois circuitos e, por fim, o terceiro circuito que consiste do oscilador em anel. Cada circuito foi avaliado individualmente numa estrutura BIST, implementada nos FPGA XC3S200-FT256 e EP2C35F672C6. Os métodos utilizados para análise dos dados foram a média móvel, o plano de mínimos quadrados e o teste t-student. A metodologia permitiu mostrar a variabilidade within-die e suas componentes sistêmica e randômica. / This work aims to propose a methodology of analysis of variability of propagation-delay time in FPGA. To achieve this goal three different circuits are implemented: the circuit 1 measures the delay difference of two logic paths, the circuit 2 identifies smallest delay of two logic paths, and finally the third circuit consists of a ring oscillator. Each circuit has been assessed individually in a BIST structure, implemented in FPGAs XC3S200-FT256 and EP2C35F672C6. The methods used for data analysis were the moving average, least-squares plane and the t-student test. The methodology has allowed to evaluate the within-die variability and its systemic and random components.

Submitted by Fabio Sobreira Campos da Costa (fabio.sobreira@ufpe.br) on 2016-08-05T13:16:00Z No. of bitstreams: 2 license_rdf: 1232 bytes, checksum: 66e71c371cc565284e70f40736c94386 (MD5) Dissertação Armando Muchanga.pdf certa.pdf: 9213756 bytes, checksum: e7f44528d62ad3cf348371353e3934a6 (MD5) / Made available in DSpace on 2016-08-05T13:16:00Z (GMT). No. of bitstreams: 2 license_rdf: 1232 bytes, checksum: 66e71c371cc565284e70f40736c94386 (MD5) Dissertação Armando Muchanga.pdf certa.pdf: 9213756 bytes, checksum: e7f44528d62ad3cf348371353e3934a6 (MD5) Previous issue date: 2016-02-01 / CNPq / O desenvolvimento urbano depende de vários setores, e o mais importante, além de mais caro nos custos de urbanização é o setor de infraestrutura de transporte, responsável pela pavimentação e manutenção das vias. Com o aumento acelerado de veículos que trafegam nas vias, para um departamento de transporte manter uma rede viária urbana sob os níveis de desempenho requeridos ao longo da vida útil do pavimento é necessário que haja um melhor gerenciamento das atividades de manutenção. De todos os tipos de defeitos dos pavimentos, os que mais preocupam os usuários das vias, gestor e os técnicos da manutenção são os buracos. Alinhada a este fato exposto, esta dissertação propõe um modelo Delay Time para determinar o período ótimo de inspeção e manutenção preventiva dos pavimentos asfálticos urbanos, em particular das vias da cidade de Recife, de modo a minimizar os custos de manutenção. Primeiro são exploradas as abordagem de modelo Delay Time, para analisar a que se adequa aos pavimentos asfáltico. E a abordagem proposta é Delay Time do sistema complexo, sujeito a várias falhas, com inspeção perfeita e taxa de chega de defeitos homogênea. Os pavimentos são sujeitos a vários tipos de defeitos, mas este trabalho considerou os buracos por serem os defeitos que mais gastam no custo de manutenção. Também é feita uma revisão dos trabalhos que contribuíram para investigação e aplicação do modelo Delay Time. Ainda neste trabalha é apresentado uma revisão das normas dos pavimentos asfáltico, bem como a politica de manutenção “Operação Tapa-Buraco” praticada atualmente nas vias da cidade de Recife para tapar os buracos. O modelo proposto mostra se viável e não é sensível quando variam os parâmetros de entra, os resultados obtidos são fáceis de aplicar se o setor de manutenção de pavimento da cidade de Recife incluir as hipóteses do modelo na “Operação Tapa-Buraco”. / The urban development depends on several sectors, the most important, beyond most expensive, comes from the transport infrastructure sector - that is responsible for paving and maintenance of roads. Due the rapid increase of vehicles on roads, for the transport department to keep an urban road network under the performance levels required it is necessary to invest in a better management of maintenance activities. Among all types of floors of defects, the primary concern to road users, managers and maintenance technicians are the holes. In sum to this stated fact, this dissertation proposes a Delay Time model to determine the optimal period of inspection and preventive maintenance of urban asphalt pavements, particularly for the roads of the city of Recife, in order to minimize maintenance costs. First it was explored the Delay Time model approach to analyse which applies to the asphalt pavements. The proposed approach is Delay Time of complex system, subject to several failures, with perfect inspection and a homogeneous rate of defects arrival. Besides the floors being subject to various types of defects, this work only considers holes as defects that cause more impact on the maintenance cost. It is also made a review of the works that contributed to research and application of Delay Time Models. Also in this work is presented a review of the standards of asphalt pavements, as well as the maintenance policy "Operação Tapa-Buraco", currently practiced in Recife city roads to slap the holes. The proposed model shows that it is viable and is not sensitive when varying input parameters, the results are easy to apply to the Recife city pavement maintenance industry including the model assumptions in "Operação Tapa-Buraco".

Data aggregation is an important technique in wireless sensor networks. The data are gathered together by data fusion routines along the routing path, which is called data-centralized routing. We propose a localized, Delay-bounded and Energy-efficient Data Aggregation framework(DEDA) based on the novel concept of DEsired Progress (DEP). This framework works under request-driven networks with realistic MAC layer protocols. It is based on localized minimal spanning tree (LMST) which is an energy-efficient structure. Besides the energy consideration, delay reliability is also considered by means of the DEP. A node’s DEP reflects its desired progress in LMST which should be largely satisfied. Hence, the LMST edges might be replaced by unit disk graph (UDG) edges which can progress further in LMST. The DEP metric is rooted on realistic degree-based delay model so that DEDA increases the delay reliability to a large extent compared to other hop-based algorithms. We also combine our DEDA framework with area coverage and localized connected dominating set algorithms to achieve two more resilient DEDA implementations: A-DEDA and AC-DEDA. The simulation results confirm that our original DEDA and its two enhanced variants save more energy and attain a higher delay reliability ratio than existing protocols.

There has been a tremendous growth in the computer, television and RADAR fields. As a result, demands on the components that give time control over pulse information have led to the development of a great variety of delay lines. Delay lines are used in the systems that relate electrical information to time like computers, television, telemetering systems, guiding missiles, navigating systems, identifying coders and decoders, radar systems and video tape recorders are typical systems that use delay lines. Delay lines are also used in electronic objects for making decision point, in sound reinforcements. In a delay network, for a given bandwidth, the amount of delay increases as the order increases. Therefore we propose an idea of optimizing the poles of the filter in order to get more delay over a given order and bandwidth.