Lower k and low-leakage silicon carbonitride (SiCxNy ) films were fabricated using single precursor by using radio-frequency (RF) plasma-enhanced chemical vapor deposition (PECVD). We explored precursors with (1) cyclic-carbon-containing structures, (2) higher C/Si ratio, (3) multiple vinyl groups, as well as (4) the incorporation of porogen for developing low-k SiCxNy films as etch-stop/diffusion barrier (ES/DB) layer for copper interconnects in this study. SiCxNy films with k values between 3.0 and 3.5 were fabricated at T≦ 200 o C, and k~4.0-4.5 at 300-400 °C. Precursors with vinyl groups yielded SiCxNy films with low leakage, excellent optical transmittance and high mechanical strength due to the formation of cross-linked Si-(CH2)n-Si linkages.

Utilizing bulk micromachining technology, this thesis aimed to develop a flexural plate-wave(FPW) device with novel groove reflection microstructure for high-sensitivity and low insertion-loss biomedical microsystem applications. The influences of the amount and depth of the groove and the distance between the groove and the boundary of ZnO piezoelectric thin-film (DGB) on the reduction of insertion-loss and the enhancement of quality factor (Q) and electromechanical coupling coefficient (K2) were investigated. Three critical technology modules established in this thesis are including the development of (1) a sputtering deposition process of high C-axis (002) orientation ZnO piezoelectric thin-film, (2) an electrochemical etch-stop technique of silicon anisotropic etching and (3) an integration process of FPW device. Firstly, under the optimized conditions of the sputtering deposition process (300¢J substrate temperature, 200 W radio-frequency (RF) power and 30/70 Ar/O2 gas flow ratio), a high C-axis (002) orientated ZnO piezoelectric thin-film with a high X-ray diffraction (XRD) intensity (50,799 a.u.) and narrow full width at half maximum (FWHM = 0.383¢X) can be demonstrated. The peak of XRD intensity of the standard ZnO film occurs at diffraction angle 2£c = 34.422¢X, which matches well with our results (2£c = 34.357¢X). Secondary, an electrochemical etch-stop system with three electrode configuration has been established in this research and the etching accuracy can be controlled to less than 1%. Thirdly, this thesis has successfully integrated the main fabrication processes for developing the FPW device which are including six thin-film deposition processes and six photolithography processes. The implemented FPW device with RIE etched groove reflection microstructure presents a low insertion-loss of -12.646 dB, center frequency of 114.7 MHz, Q factor of 12.76 and K2 value of 0.1876%.

This thesis presents the development of electrochemical etch-stop techniques (ECES) to achieve high precision 3-dimensional integrated MEMS sensors with wet anisotropic etching by applying proper voltages to various regions in silicon. The anisotropic etchant is selected as tetra methyl ammonium hydroxide, TMAH, considering its high silicon etch rate, selectivity towards SiO2, and CMOS compatibility, especially during front-side etching of the chip/wafer. A number of parameters affecting the etching are investigated, including the effect of temperature, illumination, and concentration of the etchant over the etch rate of silicon, surface roughness, and biasing voltages. The biasing voltages for passivating the n-well and enhancing the etching reactions on p-substrate are determined as -0.5V and -1.6V, respectively, after a series of current-voltage characteristic experiments. The surface roughness due to TMAH etching is prevented with the addition of ammonium peroxodisulfate, AP. A proper etching process is achieved using a 10wt.% TMAH at 85&deg / C with 10gr/lt. AP. Different silicon etch samples are produced in METU-MET facilities to understand and optimize ECES parameters that can be used for CMOS microbolometers. The etch samples are fabricated using various processes, including thermal oxidation, boron and phosphorus diffusions, aluminum and silicon nitride layer deposition processes. Etching with the prepared samples shows the dependency of the depletion layer between p-substrate and n&amp / #8209 / well, explaining the reason of the previous failures during post-CMOS etching of CMOS microbolometers from the front side. Succesfully etched CMOS microbolometers are achieved with back side etching in 6M KOH at 90 &deg / C, where &amp / #8209 / 3.5V and 1.5V are applied to the p-substrate and n-well. In summary, this study provides an extensive understanding of the ECES process for successful implementations of integrated MEMS sensors.

In this work, we have developed two different fabrication processes for relaxed Si₁₋xGex-on-insulator (SGOI) substrates: (1) SGOI fabrication by etch-back approach, and (2) by "smart-cut" approach utilizing hydrogen implantation. Etch-back approach produces SGOI substrate with less defects in SiGe film, but the SiGe film uniformity is inferior. "Smart-cut" approach has better control on the SiGe film thickness and uniformity, and is applicable to wider Ge content range of the SiGe film. We have also fabricated strained-Si n-MOSFET’s on SGOI substrates, in which epitaxial regrowth was used to produce the surface strained Si layer on relaxed SGOI substrate, followed by large-area n-MOSFET’s fabrication on this structure. The measured electron mobility shows significant enhancement (1.7 times) over both the universal mobility and that of co-processed bulk-Si MOSFET’s. This SGOI process has a low thermal budget and thus is compatible with a wide range of Ge contents in Si₁₋xGex layer. / Singapore-MIT Alliance (SMA)

<p>Semiconductor wafer bonding has been a subject of interestfor many years and a wide variety of wafer bonding techniqueshave been reported in literature. In adhesive wafer bondingorganic and inorganic adhesives are used as intermediatebonding material. The main advantages of adhesive wafer bondingare the relatively low bonding temperatures, the lack of needfor an electric voltage or current, the compatibility withstandard CMOS wafers and the ability to join practically anykind of wafer materials. Adhesive wafer bonding requires nospecial wafer surface treatmentssuch as planarisation.Structures and particles at the wafer surfaces can be toleratedand compensated for some extent by the adhesive material.Adhesive wafer bonding is a comparably simple, robust andlowcost bonding process. In this thesis, adhesive wafer bondingtechniques with different polymer adhesives have beendeveloped. The relevant bonding parameters needed to achievehigh quality and high yield wafer bonds have been investigated.A selective adhesive wafer bonding process has also beendeveloped that allows localised bonding on lithographicallydefined wafer areas.</p><p>Adhesive wafer bonding has been utilised in variousapplication areas. A novel CMOS compatible film, device andmembrane transfer bonding technique has been developed. Thistechnique allows the integration of standard CMOS circuits withthin film transducers that can consist of practically any typeof crystalline or noncrystalline high performance material(e.g. monocrystalline silicon, gallium arsenide,indium-phosphide, etc.). The transferred transducers or filmscan be thinner than 0.3 µm. The feature sizes of thetransferred transducers can be below 1.5 µm and theelectrical via contacts between the transducers and the newsubstrate wafer can be as small as 3x3 µm2. Teststructures for temperature coefficient of resistancemeasurements of semiconductor materials have been fabricatedusing device transfer bonding. Arrays of polycrystallinesilicon bolometers for use in uncooled infrared focal planearrays have been fabricated using membrane transfer bonding.The bolometers consist of free-hanging membrane structures thatare thermally isolated from the substrate wafer. Thepolycrystalline silicon bolometers are fabricated on asacrificial substrate wafer. Subsequently, they are transferredand integrated on a new substrate wafer using membrane transferbonding. With the same membrane transfer bonding technique,arrays of torsional monocrystalline silicon micromirrors havebeen fabricated. The mirrors have a size of 16x16 µm2 anda thickness of 0.34 µm. The advantages of micromirrorsmade of monocrystalline silicon are their flatness, uniformityand mechanical stability. Selective adhesive wafer bonding hasbeen used to fabricate very shallow cavities that can beutilised in packaging and component protection applications. Anew concept is proposed that allows hermetic sealing ofcavities fabricated using adhesive wafer bonding. Furthermore,microfluidic devices, channels and passive valves for use inmicro total analysis systems are presented.</p><p>Adhesive wafer bonding is a generic CMOS compatible bondingtechnique that can be used for fabrication and integration ofvarious microsystems such as infrared focal plane arrays,spatial light modulators, microoptical systems, laser systems,MEMS, RF-MEMS and stacking of active electronic films forthree-dimensional high-density integration of electroniccircuits. Adhesive wafer bonding can also be used forfabrication of microcavities in packaging applications, forwafer-level stacking of integrated circuit chips (e.g. memorychips) and for fabrication of microfluidic systems.</p>

Semiconductor wafer bonding has been a subject of interestfor many years and a wide variety of wafer bonding techniqueshave been reported in literature. In adhesive wafer bondingorganic and inorganic adhesives are used as intermediatebonding material. The main advantages of adhesive wafer bondingare the relatively low bonding temperatures, the lack of needfor an electric voltage or current, the compatibility withstandard CMOS wafers and the ability to join practically anykind of wafer materials. Adhesive wafer bonding requires nospecial wafer surface treatmentssuch as planarisation.Structures and particles at the wafer surfaces can be toleratedand compensated for some extent by the adhesive material.Adhesive wafer bonding is a comparably simple, robust andlowcost bonding process. In this thesis, adhesive wafer bondingtechniques with different polymer adhesives have beendeveloped. The relevant bonding parameters needed to achievehigh quality and high yield wafer bonds have been investigated.A selective adhesive wafer bonding process has also beendeveloped that allows localised bonding on lithographicallydefined wafer areas. Adhesive wafer bonding has been utilised in variousapplication areas. A novel CMOS compatible film, device andmembrane transfer bonding technique has been developed. Thistechnique allows the integration of standard CMOS circuits withthin film transducers that can consist of practically any typeof crystalline or noncrystalline high performance material(e.g. monocrystalline silicon, gallium arsenide,indium-phosphide, etc.). The transferred transducers or filmscan be thinner than 0.3 µm. The feature sizes of thetransferred transducers can be below 1.5 µm and theelectrical via contacts between the transducers and the newsubstrate wafer can be as small as 3x3 µm2. Teststructures for temperature coefficient of resistancemeasurements of semiconductor materials have been fabricatedusing device transfer bonding. Arrays of polycrystallinesilicon bolometers for use in uncooled infrared focal planearrays have been fabricated using membrane transfer bonding.The bolometers consist of free-hanging membrane structures thatare thermally isolated from the substrate wafer. Thepolycrystalline silicon bolometers are fabricated on asacrificial substrate wafer. Subsequently, they are transferredand integrated on a new substrate wafer using membrane transferbonding. With the same membrane transfer bonding technique,arrays of torsional monocrystalline silicon micromirrors havebeen fabricated. The mirrors have a size of 16x16 µm2 anda thickness of 0.34 µm. The advantages of micromirrorsmade of monocrystalline silicon are their flatness, uniformityand mechanical stability. Selective adhesive wafer bonding hasbeen used to fabricate very shallow cavities that can beutilised in packaging and component protection applications. Anew concept is proposed that allows hermetic sealing ofcavities fabricated using adhesive wafer bonding. Furthermore,microfluidic devices, channels and passive valves for use inmicro total analysis systems are presented. Adhesive wafer bonding is a generic CMOS compatible bondingtechnique that can be used for fabrication and integration ofvarious microsystems such as infrared focal plane arrays,spatial light modulators, microoptical systems, laser systems,MEMS, RF-MEMS and stacking of active electronic films forthree-dimensional high-density integration of electroniccircuits. Adhesive wafer bonding can also be used forfabrication of microcavities in packaging applications, forwafer-level stacking of integrated circuit chips (e.g. memorychips) and for fabrication of microfluidic systems.

Lower k and low-leakage silicon carbonitride (SiCxNy ) films were fabricated using single precursor by using radio-frequency (RF) plasma-enhanced chemical vapor deposition (PECVD). We explored precursors with (1) cyclic-carbon-containing structures, (2) higher C/Si ratio, (3) multiple vinyl groups, as well as (4) the incorporation of porogen for developing low-k SiCxNy films as etch-stop/diffusion barrier (ES/DB) layer for copper interconnects in this study. SiCxNy films with k values between 3.0 and 3.5 were fabricated at T≦ 200 o C, and k~4.0-4.5 at 300-400 °C. Precursors with vinyl groups yielded SiCxNy films with low leakage, excellent optical transmittance and high mechanical strength due to the formation of cross-linked Si-(CH2)n-Si linkages.