Face aux défis actuels liés à la conception de capteurs d'images à forte résolution comme la limitation de la consommation électrique, l'augmentation du flux de données ainsi que le traitement de données associé, on propose, à travers cette thèse, un capteur d'image novateur asynchrone à échantillonnage non uniforme.Ce capteur d’images asynchrone est basé sur une matrice de pixels événementiels qui intègrent un échantillonnage non uniforme par traversée de niveaux. Contrairement aux imageurs conventionnels, où les pixels sont lus systématiquement lors de chaque trame, les pixels événementiels proposés sont consultés que lorsqu’ils contiennent une information pertinente. Cela induit un flux de données réduit et dépendant de l’image.Pour compléter la chaîne de traitement des pixels, on présente également une architecture numérique de lecture dédiée conçue en utilisant de la logique asynchrone et destinée à contrôler et à gérer le flux de données des pixels événementiels. Ce circuit de lecture numérique permet de surmonter les difficultés classiques rencontrées lors de la gestion des demandes simultanées des pixels événementiels sans dégrader la résolution et le facteur de remplissage du capteur d’images. En outre, le circuit de lecture proposé permet de réduire considérablement les redondances spatiales dans une image ce qui diminue encore le flux de données.Enfin, en combinant l'aspect échantillonnage par traversée de niveau et la technique de lecture proposée, on a pu remplacer la conversion analogique numérique classique de la chaîne de traitement des pixels par une conversion temps-numérique (Time-to-Digital Conversion). En d'autres termes, l'information du pixel est codée par le temps. Il en résulte une diminution accrue de la consommation électrique du système de vision, le convertisseur analogique-numérique étant un des composants les plus consommant du système de lecture des capteurs d'images conventionnels / In order to overcome the challenges associated with the design of high resolution image sensors, we propose, through this thesis, an innovative asynchronous event-driven image sensor based on non-uniform sampling. The proposed image sensor aims the reduction of the data flow and its associated data processing by limiting the activity of our image sensor to the new captured information.The proposed asynchronous image sensor is based on an event-driven pixels that incorporate a non-uniform sampling crossing levels. Unlike conventional imagers, where the pixels are read systematically at each frame, the proposed event-driven pixels are only read when they hold new and relevant information. This induces a reduced and scene dependent data flow.In this thesis, we introduce a complete pixel reading sequence. Beside the event-driven pixel, the proposed reading system is designed using asynchronous logic and adapted to control and manage the flow of data from event pixels. This digital reading system overcomes the traditional difficulties encountered in the management of simultaneous requests for event pixels without degrading the resolution and fill factor of the image sensor. In addition, the proposed reading circuit significantly reduces the spatial redundancy in an image which further reduces the data flow.Finally, by combining the aspect of level crossing sampling and the proposed reading technique, we replaced the conventional analog to digital conversion of the pixel processing chain by a time-to-digital Conversion (TDC). In other words, the pixel information is coded by time. This results in an increased reduction in power consumption of the vision system, the analog-digital converter being one of the most consuming reading system of conventional image sensors components

Submitted by Kleber Silva (kleberbs@ufba.br) on 2017-06-06T18:36:46Z No. of bitstreams: 1 thesis_Almerindo.pdf: 28859099 bytes, checksum: 174d845c1992efdff75a145e0ec76a4d (MD5) / Approved for entry into archive by Vanessa Reis (vanessa.jamile@ufba.br) on 2017-06-16T15:25:18Z (GMT) No. of bitstreams: 1 thesis_Almerindo.pdf: 28859099 bytes, checksum: 174d845c1992efdff75a145e0ec76a4d (MD5) / Made available in DSpace on 2017-06-16T15:25:18Z (GMT). No. of bitstreams: 1 thesis_Almerindo.pdf: 28859099 bytes, checksum: 174d845c1992efdff75a145e0ec76a4d (MD5) / O advento do Kinect desencadeou o crescimento de aplicações voltadas à interação natural, reconhecimento de gestos e ambientes interativos. Com o tempo, percebeu-se que as soluções de interfaces baseadas nesses novos tipos de interação cresciam de maneira rápida e desordenada, sem qualquer preocupação com a formalização de etapas de desenvolvimento. Além disso, questões relativas à forma de representar estas interações, ao contexto onde elas ocorrem e qual o comportamento do ambiente em resposta a estas interações tornaram-se relevantes. Neste sentido, esse trabalho traz como contribuição uma abordagem prática para o desenvolvimento de ambientes interativos através do modelo Where-What-Why-How, ou simplesmente, 3W1H. A solução teve como base uma compilação de tarefas comumente executadas neste tipo de desenvolvimento e relatadas em diversos trabalhos correlatos. A solução parte de três questões principais: (I) quais as reações devem ser disparadas no ambiente interativo; (II) quais as situações que disparam a execução destas reações no ambiente; e, (III) qual o comportamento esperado uma vez que estas situações sejam reconhecidas. O comportamento esperado do ambiente pode ser visto como um conjunto de estados que definem o controle das reações e mudanças dentro do ambiente real ou virtual. A transição entre estes estados comportamentais é feita a partir da composição entre eventos associados, por exemplo, ao reconhecimento de gestos do usuário quando interage com o sistema. A validação da proposta é feita através de alguns estudos de casos completos, que contemplam todas as fases de desenvolvimento e a implementação física do ambiente interativo. Os estudos de caso foram construídos com o auxílio do framework Touch The Air - TTair, uma outra contribuição importante do trabalho.

Le développement des réseaux de capteurs sans fil (WSN) profite des progrès récents en consommation énergétique dans les systèmes électroniques et des progrès en technologies de récupération d'énergie pour construire des entités de contrôle intelligentes utilisées dans des domaines variés comme la santé ou l'agriculture. Grâce aux consommations toujours plus faibles des circuits de communication radiofréquence, il est possible de créer des réseaux de systèmes de capteurs capables d'extraire des données de l'environnement et de les transmettre à une entité maîtresse. Les durées de vie limitées des batteries sont un frein au développement de tels réseaux pour des raisons de coût et de difficulté de maintenance. Grâce à la récupération d'énergie dans l'environnement, qu'elle soit solaire, thermique ou mécanique, il est alors envisageable d'alimenter un système de capteurs et sa communication sans fil afin d'accroitre l'autonomie globale du réseau. Les travaux réalisés dans le cadre de cette thèse visent à étudier la gestion d'énergie au sein d'un nœud de capteurs communicant sans fil. Grâce à l'utilisation d'une architecture d'alimentation avancée à chemins de puissance multiples, basée notamment sur un chemin direct à haut rendement entre les récupérateurs d'énergie et les charges consommantes, le système peut optimiser son rendement énergétique lorsque l'énergie est récupérée dans l'environnement. Cette architecture d'alimentation requiert néanmoins un contrôle numérique fin afin de déterminer à tout moment le chemin de puissance optimal entre les récupérateurs, les capacités et batterie de stockage, et les charges consommantes. Un contrôleur intégré asynchrone réalise une gestion événementielle de ces chemins de puissance et permet au système d'être robuste face aux variations énergétiques environnementales. Après une modélisation et une analyse des gains de l'architecture avancée de gestion de puissance, un contrôleur événementiel adapté aux systèmes de capteurs communicants est proposé. Ce contrôleur est implémenté en logique asynchrone quasi insensible aux délais (QDI) et offre au système une robustesse intrinsèque forte aux variations environnementales en addition à sa très faible consommation. Un circuit de gestion d'alimentation pour nœud de capteurs communicant est ainsi fabriqué en technologie CMOS 180nm et intègre des innovations tant architecturales que de gestion numérique applicative. Sa consommation globale proche d'1µW permet ainsi la réalisation de systèmes de capteurs fonctionnels pour des applications mettant en jeu des puissances de l'ordre du microwatt, autorisant en conséquence la mise en place de réseaux de capteurs ultra faible consommation. / Wireless Sensor Networks (WSN) development leverages recent progress in electronic devices power consumption and in energy harvesting technologies in order to create smart sensing structures useful for improvements in various topics such as health monitoring or farming. Thanks to wireless communication circuits lower power consumption, it becomes possible to create networks of sensing systems capable of extracting information from the environment and of transmitting data through the network to the global intelligence. Because of hard and costly maintenance requirements, limited lifespans batteries are a brake on such networks development. Thanks to environmental energy harvesting on solar, thermal or mechanical sources, a system containing sensors and a wireless communication circuit can be powered. Global energy autonomy is thus improved and the node's life is enhanced. Works done during this PhD aim to study energy management within a sensing wireless communicating node. Thanks to the use of advanced multiple power paths architecture leveraging direct power path between the sources and the power loads, the power management system can optimize its energy efficiency when energy is harvested in the environment. Nevertheless, a precise digital control is mandatory to continuously determine the best power path between the energy harvesters, the energy storing capacitors and batteries, and the power loads. An integrated asynchronous controller implements an event-driven management of the power paths and gives the system robustness to environmental energy variations. After modeling and analyzing the power efficiency gain granted by the advanced architecture, an event-driven controller is proposed to ease implementation of wireless sensing applications. The controller is implemented in asynchronous quasi delay insensitive (QDI) logic and presents high intrinsic robustness to environemental variations while maintaining ultra low power consumption. A power management circuit suited for wireless sensing systems is thus fabricated using 180nm CMOS process and includes both architecture and digital management innovations. Its global power consumption close to 1µW allows considering the creation of wireless sensing nodes running for applications in the range of microwatts, consequently enabling development of ultra low power wireless sensor networks.

A key part in the development and verification of digital systems is simulation. But hardware simulators are expensive, and software simulation is not fast enough for designs with a large number of gates. As today’s digital zesigns constantly grow in size (number of gates), and that trend shows no signs to end, faster simulators handling millions of gates are needed. We investigate how to create a software gate-level simulator able to simulate a high number of gates fast. This involves a trade-off between memory requirement and speed. A compact netlist representation can utilize cache memories more efficient but requires more work to interpret, while high memory requirements can limit the performance to the speed of main memory. We have selected the Counting Algorithm to implement the experimental simulator MICA. The main reasons for this choice is the compact way in which gates can be stored, but still be evaluated in a simple and standard way. The report describes the issues and solutions encountered and evaluate the resulting simulator. MICA simulates a SPARC architecture processor called Leon. Larger netlists are achieved by simulating several instances of this processor. Simulation of 128 instances is done at a speed of 9 million gates per second using only 3.5MB memory. In MICA this design correspond to 2.5 million gates.

Emulering och simulering omfattar ett brett spektrum av varierande tekniker på olika nivåer, som involverar både mjuk-, och hårdvaruparadigm. Denna rapport är utformad utifrån ett arkitekturellt perspektiv och ämnar att återge en kortfattad studie av ämnen relaterade till design av en generell referensarkitektur för emulatorer. Särskilt fokus har lagts på sammansättningen av de olika komponenter som vanligtvis utgör en emulator, och dessa ställs sedan i jämförelse med den arkitektur, skapad av Von-Neumann, som idag används i den moderna datorn. Målet är att identifiera de mest lämpade arkitekturella strategierna för att kunna uppnå kvalitetskrav som flexibilitet, generalitet och funktionell lämplighet. Vid skapandet av en prototyp görs en avvägning mellan olika tekniker, vilket resulterar i en hybrid mellan tidskritiska och händelsedrivna paradigm. Vidare jämförs befintliga arkitekturer där modularitet mellan komponenter visar sig vara en återkommande egenskap inom samtliga designer. Det viktigaste resultatet vi kom fram till är att en tillståndsmaskin ofta har en betydande roll inom händelsedrivna system. För den prototyp som designats resulterade detta i en tillståndsmaskin med svagt kopplade deltillstånd som tillsammans leder till aktivering av olika huvudtillstånd, något som går i linje med icke-Von Neumann-alternativ. / The field of emulation and simulation comprises of a broad spectrum of various levels and techniques that spans over both software and hardware paradigms. Written, from mainly an architectural point of view, this paper offers a brief study on sporadic topics related to this broad field which in a wholeness provides relevant and useful insights for the design of a general reference architecture for emulators. Special focus lies on the different components that an emulator comprises of and a parallel is drawn to the physical architecture of the modern computing machine with its well-known Von-Neumann architecture. The goal is to identify best architectural strategies for fulfilling flexibility, generality and functional applicability quality requirements. A narrowed down scope is however kept in mind for a prototype model that will be a hybrid consisting of the event-driven and time-critical paradigms. Different real world architectural examples are compared and modularity with regard to components is identified as a recurrent characteristic in all designs. One of the important findings we made is the inclusion of a state machine component, an important part which allows the event-driven system to function properly. This is with a weak coupled setup of various substates that together activate mainstates, which is in line with alterior thinking to Von Neumann-based systems.

La boucle à verrouillage de phase est essentielle dans la génération et la synthèse de fréquence, présent dans les communications RF, l’instrumentation, les capteurs ainsi que beaucoup d’autres domaines. Il existe deux types de dispositifs: la PLL numérique et la PLL analogique. La PLL numérique est essentiellement utilisée dans le domaine de l’instrumentation et dans la génération d’horloge, où les fréquences sont relativement faibles. Quant à la PLL analogique, elle est plus utilisée dans les communications sans fil ainsi que dans les transmetteurs à haut débit, dont la fréquence de fonctionnement est de l’ordre du GHz. Etant donné qu’une PLL est au moins du second ordre, elle peut être sujette à une instabilité pouvant mener à un disfonctionnement du système. Ainsi la méthodologie de conception d’un tel système comporte plusieurs étapes : 1) modélisation linéaire, 2) modélisation comportemental, 3) simulation niveau transistor. Les simulations électriques du comportement transitoire d’une PLL sont très gourmandes en temps. En effet des calculs dont la complexité croit avec le facteur de division sont effectués à chaque itération du signal de référence. Cela constitue un frein technologique, et rend la conception d’une PLL très difficile. Cette thèse se focalise sur le modèle comportemental des PLL analogiques fonctionnant avec des pompes de charge commandées en tension, dont la caractéristique du temps de démarrage qui est hautement non linéaire et même des fois chaotique est sujet critique. L’objectif principal est d’établir une méthodologie de conception efficiente pour les PLL analogiques et leur caractérisation en utilisant la technique évènementielle. / The Charge-Pump Phase Locked Loop (CP-PLL) is a mixed-signal system and the important block for the frequency generation or frequency synthesis in radio frequency communications, instrumentations, metrology, sensors and so on. There are two types of devices: a full digital PLL and an analog PLL. The fully digital PLL is mainly used in instrumentation field and in clock and data recovery circuits where moderate frequency operation is used. For wireless communication or high data-rate optical transceiver analog CP-PLL is the most used architecture where the operating frequency is in the range of GHz. Since a PLL is at least a second order system, it is subjected to an instability that can lead to non-functional device. Thus, common design methodology contains several steps including i) Linear models ii) Behavioral modeling iii) and transistor level simulations. Electrical simulation (like SPICE) of the transient operation of PLL is time consuming and may take up to several weeks. In fact, the simulator must perform, for each time step of the reference signal, calculations where complexity increases with the division factor. This is known as technological bottleneck, designing a PLL at transistor level is very hard in a reasonable time. In this thesis the work is focused on the behavioral modeling of CP-PLL operating with voltage switched charge-pump (VSCP), where the characterization of its transient time “off-locking” and highly non-linear and even in chaotic mode remains a critical issue. The main objective is to establish a fast and efficient modeling and design methodology of high order CP-PLL and its characterization using the event driven technique.

The fast growing local human population, especially through immigration from countries north of South Africa, is placing the Soutpansberg and Blouberg areas under increasing pressure. The insatiable demand for more arable land within these agriculturally marginal and semi-arid areas is leading to severe degradation of the remaining natural resources. The Soutpansberg–Blouberg region has been recognized as a Centre of Endemism and is regarded as a region of exceptionally high biological diversity. The Soutpansberg Conservancy and the Blouberg Nature Reserve reveal extremely rich diversities of plant communities relative to the sizes of these conservation areas. The Major Vegetation Types and plant communities of the Soutpansberg Centre of Endemism are described in detail with special reference to the Soutpansberg Conservancy and the Blouberg Nature Reserve. Phytosociological data from 466 sample plots were ordinated using a Detrended Correspondence Analysis (DECORANA) and classified using Two–way Indicator Species Analysis(TWINSPAN). The resulting classification was further refined with table–sorting procedures based on the Braun–Blanquet floristic–sociological approach of vegetation classification using MEGATAB. Eight Major Vegetation Types were identified and described as Eragrostis lehmanniana var. lehmanniana–Sclerocarya birrea subsp. caffra BNR Northern Plains Bushveld, Euclea divinorum–Acacia tortilis BNR Southern Plains Bushveld, Englerophytum magalismontanum–Combretum molle BNR Mountain Bushveld, Adansonia digitata–Acacia nigrescens Soutpansberg Arid Northern Bushveld, Catha edulis–Flueggia virosa Soutpansberg Moist Mountain Thickets, Diplorhynchus condylocarpon–Burkea africana Soutpansberg Leached Sandveld, Rhus rigida var. rigida–Rhus magalismontanum subsp. coddii Soutpansberg Mistbelt Vegetation and Xymalos monospora–Rhus chirendensis Soutpansberg Forest Vegetation. Plant communities of each of the Major Vegetation Types are described. The primary ecological drivers of the event-driven and the classic climax vegetation types are discussed and management recommendations are made for effective conservation of these last remaining pockets of wilderness. The available data supports the recognition of the region as an important Centre of Plant Endemism and Biological Diversity requiring conservation attention. Copyright / Thesis (PhD)--University of Pretoria, 2010. / Plant Science / unrestricted

Main focus of the thesis lies in the corporate management decision support deploying and using IT / ICT. Specific technology described is Business Activity Monitoring. The contribution of the work lies primarily in two planes. The first plane is to create as far as the most comprehensive view of the BAM. The findings are collected from different directions and areas. The first direction of research is focused on the development of Business Intelligence and description of BAM as a trend of BI, including the stages of development and projections into the future. The second direction focuses primarily on a detailed circumscribe of BAM. Its definition, deployment assumptions, basic models, the way how business can benefit from BAM usage. The third guideline shows the classification of BAM surrounded by the other / similar technologies and business solutions -- BI and BSM, and the search key differences. The second level of the work is to support the AML implementation in a specific environment of banks using BAM. This is a practical demonstration of the possibility of using BAM in practice. Basic design solution lies in the analysis of risks arising from the law and the current state of the solution. By mapping of banking processes and searching for points of risk it is then possible to deploy these risks BAM tools for their management. Motion of support lies mainly in conceptual terms.

Web Intelligence has been quiet a popular topic lately. This thesis doesn't try to form the exact definition of Web Intelligence, because it's impossible. The aim is to demonstrate practical use of WI in retail banking instead. Since Web Intelligence can be seen as some kind of advanced Web Analytics system, the text starts off with explaining basics of Web Analytics. Then a hypothetical story about Mr. Cerny ' looking for a bank that would give him a mortgage loan is told. Meanwhile, a bank that provides Mr. Cerny 's current account tries to sell its own mortgage loan to him. Unfortunately, wrong channel at a wrong time is used to communicate the message which ends up with Mr. Cerny denying the offer instantly. Obvious mistakes made by the bank are then picked up and discussed. The conclusion is you need to know your customer very good to have long and healthy relationship. One way to achieve this is to deployWeb Intelligence solution that would reveal online habits of every one of your customers. Event Driven Marketing online campaigns can then be used to identify customers needs and target them at the right time, through the right channel and with the right message. If everything works well, the customer starts to percieve marketing communication as a personal support rather than annoying advertisement.

The thesis is mainly driven by the modelling of business processes focusing on process optimization namely processes related to Investment Banking. The main goal of the thesis is driven by the EPC process modelling for optimization the key Investment process in a particular company APS HOLDING SE. The theoretical part contains processes descriptions optimizations and process modelling standards. The practical part is devoted to design and optimize of the process related to Debt Assets Investment Banking under the EPC modelling standards. Each part of the Investment process is described below the model. Reader can feel more comfortable by using the glossary of terms attached in appendix. Focus on higher efficiency of the Investment management process will be the key goal for the company management in 2016.