Thesis (M.S.)--Miami University, Dept. of Geology, 2005. / Title from first page of PDF document. Document formatted into pages; contains [1], v, 72 p., [64] plates : ill. Includes bibliographical references (p. 65-71).

Thesis (Ph. D.)--University of Washington, 2005. / Vita. Includes bibliographical references (leaves 59-60).

Thesis (Ph. D.)--University of Montana, 2007. / Title from title screen. Description based on contents viewed Oct. 10, 2007. Includes bibliographical references.

Thesis (M.S.)--University of Wyoming, 2007. / Title from PDF title page (viewed on Mar. 4, 2009). Includes bibliographical references (p. 50-59).

Σε αυτή την διπλωματική εργασία γίνεται μελέτη της συμπεριφοράς εναέριων γραμμών διανομής μέσης τάσης από καταπονήσεις κεραυνών. Οι κεραυνοί είναι ένα φυσικό φαινόμενο που δημιουργούν μεγάλα προβλήματα στις ηλεκτρικές συσκευές, στα ηλεκτρικά συστήματα καθώς και στην ασφάλεια του ανθρώπου. Ένα κεραυνικό πλήγμα μπορεί να είναι άμεσο ή έμμεσο αλλά προκαλεί βραχυκυκλώματα και στις δυο περιπτώσεις ειδικότερα εάν η γραμμή διανομής είναι απροστάτευτη. Επειδή είναι ένα φυσικό φαινόμενο, δεν είναι εφικτό να προβλέψουμε απόλυτα την έκβαση του. Διάφορες παράμετροι όπως η πυκνότητα κεραυνών ή ο αριθμός των άμεσων κεραυνικών πληγμάτων απέχουν από τα πραγματικά στοιχεία. Η διπλωματική εργασία αναλύει και παρέχει με ακρίβεια προβλέψεις για σφάλματα από κεραυνικά πλήγματα στις γραμμές διανομής ηλεκτρικής ενέργειας μέσης τάσης.Στο δεύτερο κεφάλαιο της διπλωματικής εργασίας αναφέρεται η οδηγία της ΙΕΕΕ για τη συμπεριφορά έναντι κεραυνών των εναέριων γραμμών διανομής ηλεκτρικής ενέργειας. Σκοπός της είναι να παρουσιάσει λύσεις για τη μείωση των βραχυκυκλωμάτων που προκαλούνται από κεραυνό στις εναέριες γραμμές διανομής.Το τρίτο κεφάλαιο της διπλωματικής εργασίας εστιάζεται αναλυτικά στα καταγεγραμμένα σφάλματα που προκλήθηκαν από πτώσεις κεραυνών στο δίκτυο μέσης τάσης σε μετασχηματιστές καθώς και στις γραμμές διανομής μέσης τάσης για μια δεκαετία στην περιοχή της Αχαΐας. Η μελέτη γίνεται σε τέσσερις γραμμές διανομής μέσης τάσης με αφετηρία την περιοχή του Αιγίου, γραμμή R21 Αιγίου–Βλασιάς, γραμμή R23 Αιγίου–Διακοπτού, γραμμή R 22 Αιγίου–Ακράτας και γραμμή R29 N. Ερινεού. Το πραγματικό μήκος των συγκεκριμένων γραμμών υπολογίστηκε από τα μονογραμμικά σχέδια που μας παρείχε η ΔΕΔΔΗΕ. Επομένως χρησιμοποιώντας την μεθοδολογία της ΙΕΕΕ οδηγίας, υπολογίζεται η θεωρητική τιμή των κεραυνικών σφαλμάτων. Έπειτα τα καταγεγραμμένα σφάλματα από κεραυνικά πλήγματα συλλέχτηκαν και κατηγοριοποιήθηκαν από την βάση δεδομένων της ΔΕΔΔΗΕ Αιγίου για την χρονική περίοδο 2003-2012 παρέχοντας την πραγματική τιμή των κεραυνικών σφαλμάτων. Στο τελευταίο κεφάλαιο αναφέρονται τα συμπεράσματα καθώς και μια λεπτομερής σύγκριση θεωρητικών και πραγματικών δεδομένων με διαγράμματα, κατηγοριοποιώντας τα σφάλματα ανά χρόνο και ανά μήνα για τα έτη 2003- 2012. / This diploma thesis focuses on the lightning performance of electric power overhead distribution lines. Lightning is a physical phenomenon which often causes several problems to the distribution systems, building structures, electrical appliances and more importantly to the safety of human beings. When lightning strikes directly to the distribution line or to the nearby area is responsible for temporary or permanent faults on the overhead distribution line. The nature of lightning is impossible to predict with precision. Parameters such as lightning intensity measured by ground flash density (GFD), or estimating the number of direct strikes to a distribution line may have significant errors. This diploma thesis intends to provide most precise estimates of lightning-caused faults. The second chapter of the thesis describes the “IEEE Guide for Improving the Lightning Performance of Electric Power Overhead Distribution Lines”. The main purpose is to present alternative solutions to reduce the number of flashovers caused by the lightning strike on overhead distribution lines. Specifically we deal with the lightning performance of the overhead distribution lines during lightning (either direct strike or induced flashover), the insulation level of distribution lines, the protection of the distribution lines with a shield wire or arresters. The third chapter analyzes the recorded lightning faults to the distribution network of the region of Achaia, Greece for the last ten years. It focuses on four distribution lines all starting from the region of Aegio. Moreover using the methodology from the IEEE guide, a theoretical value of lightning faults has been calculated. The recorded data that has been collected along with the theoretical value of lightning faults are being detailed compared in the last chapter in order to provide us with a better understanding of the results.

Vibration-based fault diagnosis (FD) with a simple spectrum can be complex, especially when considering FD of rotating machinery with multiple bearings like a multi-stage turbine. Various studies have sought to better interpret fault spectra, but the process remains equivocal. Consequently, it has been accepted that the simple spectra requires support from additional techniques, such as orbit analysis. But even orbit analysis can be inconclusive. Though promising, attempts at developing viable methods that rival the failure coverage of spectrum analysis without gaining computational complexity remain protracted. Interestingly, few researchers have developed FD methods for transient machine operation, however, these have proven to be involved. Current practices limit vibration data to a single machine, which usually requires a large unique data history. However, if sharing of data between similar machines with different foundations was possible, the need for unique histories would be mitigated. From readily available works, this has not been encountered. Therefore, a simple but robust vibration-based approach is warranted. In light of this, a novel on-bearing vibration response integration approach for condition monitoring of shaft-related faults irrespective of speed and foundation type is proposed in the present study. Vibration data are acquired at different speeds for: a baseline, unbalance, bow, crack, looseness, misalignment, and rub conditions on three laboratory rigs with dynamically different foundations, namely: rigid, flexible support 1 (FS1) and flexible support 2 (FS2). Testing is done on the rigid rig set up first, then FS1, and afterwards FS2. Common vibration features are computed from the measured data to be input to the proposed approach for further processing. First, the proposed approach is developed through its application to a machine at a steady speed in a novel Single-speed FD technique which exploits a single vibration sensor per bearing and fusion of features from different bearings for FD. Initially, vibration features are supplemented with bearing temperature readings with improved classification compared to vibration features alone. However, it is observed that temperature readings are insensitive to faults on the FS1 and FS2 rigs, when compared to vibration features, which are standardised for consistent classification on the different rigs tested. Thus, temperature is not included as a final feature. The observed fault classifications on the different rigs at different speeds with the standardised vibration features are encouraging. Thereafter, a novel Unified Multi-speed FD technique that is based on the initial proposed approach and which works by fusion of vibration features from different bearings at different speeds in a single analysis step for FD is proposed. Experiments on the different rigs repeatedly show the novel Multi-speed technique to be suitable for transient machine operation. Then, a novel generic Multi-foundation Technique (also based on the proposed approach) that allows sharing of vibration data of a wide range of fault conditions between two similarly configured machines with similar speed operation but different foundations is implemented to further mitigate data requirements in the FD process. Observations made with the rigs during steady and transient speed tests show this technique is applicable in situations where data history is available on one machine but lacking on the other. Comparison of experimental results with results obtained from theoretical simulations indicates the approach is consistent. Thus, the proposed approach has the potential for practical considerations.

La sécurité de l'information repose étroitement sur les circuits intégrés (CI). Malheureusement, les CIs sont soumis à de nombreuses menaces telles que les attaques par canaux auxiliaires ou par injection de fautes. Ce travail se concentre sur les petites vulnérabilités et les contremesures liées à l’algorithme ECDSA. La motivation est qu’une source de vulnérabilité peut être utilisée dans différent scénario d’attaque. En corrigeant la vulnérabilité, les attaques existantes sont évitées mais également les attaques non découvertes ou non publiées utilisant la vulnérabilité en question. De plus, bien que le scalaire sur courbe elliptique soit au cœur de la sécurité de tous les schémas cryptographiques à base de courbe elliptique, l’ensemble du système a besoin d’être sécurisé. Une vulnérabilité concernant simplement quelques bits de secret peut suffire à récupérer la clef privée et donc doit être évité.L’ECDSA peut être implémenté de différentes façons, en logiciel ou via du matériel dédié ou un mix des deux. De nombreuses architectures différentes sont donc possibles pour implémenter un système à base d’ECDSA. Pour cette raison, ces travaux se concentrent principalement sur les contremesures algorithmiques. / Information security heavily relies on integrated circuits (ICs). Unfortunately, ICs face a lot of threats such as side channel or fault attacks. This work focuses on small vulnerabilities and countermeasures for the Elliptic Curve Digital Signature Algorithm (ECDSA). The motivation is that leakage sources may be used in different attack scenarios. By fixing the leakage, existing attacks are prevented but also undiscovered or non-disclosed attacks based on the leakage. Moreover, while the elliptic curve scalar algorithm is at the heart of the security of all elliptic curve related cryptographic schemes, all the ECDSA system needs security. A small leakage of few secret bits may conduct to fully disclose the private key and thus should be avoided.The ECDSA can be implemented in different flavors such as in a software that runs on a microcontroller or as a hardware self-contained block or also as a mix between software and hardware accelerator. Thus, a wide range of architectures is possible to implement an ECDSA system. For this reason, this work mainly focuses on algorithmic countermeasures as they allow being compliant with different kinds of implementations.

This thesis was focused on theme Human Resource Management. The aim was to idetify and assess the actual state of the selected organization, in the sphere individual personnel activities. On the basis of theoretical and practical knowledge, it was to show the faults in the human resource management. It was suggested to eliminate of the established faults.

Este trabalho apresenta uma ferramenta configurável, denominada de CFT-tool, capaz de aplicar automaticamente técnicas de detecção de erros em software com o objetivo de proteger processadores com diferentes arquiteturas e organizações contra falhas transientes no hardware. As técnicas baseadas em redundância e comparação são aplicadas pela CFT-tool no código assembly de um programa desprotegido, compilado para a arquitetura alvo. A ferramenta desenvolvida foi validada utilizando dois processadores distintos: miniMIPS e LEON3. O processador miniMIPS foi utilizado para verificar a eficiência, em termos de taxa de detecção de erros, tempo de execução e ocupação de memória, das técnicas de detecção em software aplicadas pela CFT-tool, comparando os resultados obtidos com os presentes na literatura. O processador LEON3 foi selecionado por ser amplamente utilizado em aplicações espaciais e por ser baseado em uma arquitetura diferente da arquitetura do processador miniMIPS. Com o processador LEON3 é verificada a configurabilidade da CFT-tool, isto é, a capacidade dela de aplicar técnicas de detecção em software em um código compilado para um diferente processador, o mantendo funcional e sendo capaz de detectar erros. A CFT-tool pode ser utilizada para proteger programas para outras arquiteturas e organizações através da modificação dos arquivos de configuração da ferramenta. A configuração das técnicas é definida segundo as especificações da aplicação, recursos do processador e seleções do usuário. Programas foram protegidos e falhas foram injetadas em nível lógico em ambos os processadores. Para o processador miniMIPS, as taxas de detecção de erros, os tempos de execução e as ocupações de memórias dos programas protegidos se mostraram compatíveis com os resultados presentes na literatura. Resultados semelhantes foram encontrados para o processador LEON3. Diferenças entre os resultados ocorrem devido às características da arquitetura. A ferramenta CFT-tool por ser configurável pode proteger o código na integralidade ou selecionar partes do código e registradores que serão redundantes e protegidos. A vantagem de proteger parte do código é reduzir o custo final em termos de tempo de processamento e ocupação de memória. Uma análise do impacto da seleção seletiva de registradores na taxa de detecção de erros é apresentada. E diretivas de alcançar um comprometimento ótimo entre quantidade de registradores protegidos, taxa de detecção de erros e custo são discutidas. / This work presents a configurable tool, called CFT-tool, capable of automatically applying software-based error detection techniques aiming to protect processors with different architectures and organizations against transient faults in the hardware. The techniques are based on redundancy and comparison. They are applied by CFT-tool in the assembly code of an unprotected program, compiled to the target architecture. The developed tool was validated using two distinct processors: miniMIPS and LEON3. The miniMIPS processor has been utilized to verify the efficiency of the software-based techniques applied by CFT-tool in the assembly code of unprotected programs in terms of error detection rate, runtime and memory occupation, comparing the obtained results with those presented in the literature. The LEON3 processor was selected because it is largely adopted in space applications and because it is based on a different architecture that miniMIPS processor. The configurability of the CFT-tool is verified with the LEON3 processor, that is, the capability of the tool at applying software-based detection techniques in a code compiled to a different processor, maintaining it functional and capable of detecting errors. The CFT-tool can be utilized to protect programs compiled to other architectures and organizations by modifying the configuration files of the tool. The configuration of the techniques is defined by the specifications of the application, processor resources and selections of the user. Programs were protected and faults were injected in logical level in both processors. When using the miniMIPS processor, the error detection rates, runtimes and memory occupations of the protected programs are comparable to the results presents in the literature. Similar results are reached with the LEON3 processor. Differences between the results are due to architecture features. The CFT-tool can be configurable to protect the entire code or to select portions of the code or registers that will be redundant and protected. The advantage of protecting portions of the code is to reduce the final cost in terms of runtime and memory occupation. An analysis of the impact of selective selection of registers in the error detection rate is also presented. And policies to reach an optimum committal between amount of protected registers, error detection rate and cost are discussed.

Partículas radioativas, ao atingirem o hardware dos sistemas computacionais, podem resultar em comportamentos inesperados durante a execução de um software. Tais comportamentos inesperados podem persistir por toda a vida útil do sistema ou podem ter uma duração limitada. Nesse último caso, temos o que chamamos de falhas transientes. Falhas transientes podem fazer com que as instruções do programa executem em uma sequência incorreta, o que chamamos de erros de fluxo de controle (Control-flow errors - CFEs). Estudos mostram que entre 33% e 77% das falhas transientes que afetam o hardware se manifestam como erros de fluxo de controle, dependendo do tipo do processador. Se o sistema não realizar nenhuma verificação em tempo de execução, um erro de fluxo de controle pode não ser detectado, o que pode resultar em uma execução incorreta do programa. Sistemas projetados para aplicações de baixo custo voltados para sistemas embarcados, onde os custos e desempenho são os fatores principais, utilizam técnicas baseadas em software para aumentar a confiabilidade do sistema. As técnicas baseadas em software para detecção de CFEs são conhecidas como signature monitoring ou signature checking. Essas técnicas introduzem código extra em todos os blocos básicos do programa com a finalidade de detectar os CFEs. Esse código extra implica em overhead, que pode ter uma grande variação dependendo da técnica utilizada. Na tentativa de minimizar o overhead imposto pelas técnicas de detecção de CFEs, neste trabalho foi desenvolvida a técnica de detecção e proteção de blocos básicos suscetíveis através da análise sistemática de single bit-flip. O objetivo da técnica é detectar os blocos básicos suscetíveis do programa através da análise sistemática de single bit-flip e proteger apenas esses blocos básicos. A técnica foi avaliada em termos de sua taxa de cobertura de falhas e desempenho. Para avaliar a taxa de cobertura falhas foram realizadas várias campanhas de injeção de falhas nos programas da suíte de benchmarks Mibench. A avaliação de desempenho foi feita com base na quantidade de instruções de máquina executadas pelos benchmarks, comparando quantidade de instruções antes e depois da utilização da técnica detecção e proteção de blocos básicos suscetíveis. Os resultados dos experimentos mostram que é possível reduzir em até 27,93% a quantidade de blocos básicos protegidos e ao mesmo tempo manter uma alta taxa de cobertura de falhas. Porém, em termos de desempenho, o ganho não ficou na mesma proporção da quantidade de blocos básicos não protegidos, ficando abaixo do esperado. / Radioactive particles hitting the hardware of computer systems may result in unexpected behavior during software execution. Such unexpected behavior may persist for the lifetime of the system or may have a limited duration. In the latter case, we have what is called a transient fault. Transient faults may cause the program instructions to execute in an incorrect sequence. This incorrect sequence is called a control flow error (CFE). Research show that between 33% to 77% of transient faults manifest themselves as CFEs, depending on the type of the processor. If the system does not perform any verification at runtime, a control flow error may be not detected, which can result in incorrect program execution. Systems projected to low-cost embedded applications, where cost and performance are the main factors, use software based techniques to improve system reliability. Software based techniques to detect CFEs are known as signature monitoring or signature checking. These techniques insert extra code in each basic block of the program in order to detect CFEs. This extra code add an undesirable overhead in the program, which can have large variation depending on the technique used. In the attempt to minimize the overhead added by CFEs detection techniques, this work developed a technique of detection and protection of susceptible basic blocks through systematic bit-flip analysis. The purpose of this technique is to detect the susceptible basic blocks of the program through the systematic bit-flip analysis and to protect only these basic blocks. The technique was evaluated based on its fault coverage rate and performance. To evaluate the fault coverage rate a fault injection campaing was performed in the programs of the Mibench benchmark suite. The performance evaluation was based in the number of instruction executed by each benchmark, comparing the number of instructions before and after the use of the proposed technique. The experimental results show that is possible to reduce up to 27,93% the amount of protected basic blocks, while keeping a high faults coverage hate. However, in terms of performance, the gain was not in the same proportion, being lower than expected.