L'objectif de ce travail de recherche est l'élaboration et l'optimisation de transistors à effet de champ organiques de type N (OTFTs). Des transistors en structure Bottom Gate Bottom Contact sont fabriqués à basse température T<120°C. Trois différentes molécules organiques conductrices d'électrons, déposées par évaporation thermiques, sont utilisées pour la couche active. Les OTFTs à base de la première molécule à corps LPP présentent de faibles mobilités à effet de champ de l'ordre de 10-5cm2/V.s. L'étude d'optimisation menée sur les conditions de dépôt de cette dernière n'a pas permis d'améliorer ses performances électriques. L'étude de stabilité électrique ''Gate Bias Stress'' a mis en évidence les instabilités de cette molécule. Les OTFTs à base des deux dérivés indénofluorènes (IF) possèdent des mobilités plus importantes. Dans les conditions optimales la molécule IF(CN2)2 méta permet d'atteindre une mobilité d'effet de champ µFE=2.1x10-4 cm2/V, alors que la molécule IF(CN2)2 para permet d'obtenir des mobilités µFE=1x10-2cm2/V.s après recuit. L'étude de stabilité électrique a mis en évidence une meilleure stabilité des OTFTs à base de IF(CN2)2 para. Une étude des phénomènes de transport de charges est menée pour les deux types de molécules. Les OTFTs de type N réalisés sont utilisés pour la réalisation d'un circuit logique de type inverseur pseudo-CMOS. Finalement, ce procédé basse température nous a permis de réaliser des OTFTs sur substrat flexible. / The main goal of this present work consists in the fabrication and optimization of N type organic field effect transistors. Bottom Gate Bottom Contact transistors are performed at low temperature T<120°C. Three different electro-deficient organic molecules are thermally evaporated and used as active layer. OTFTs based on LPP core molecule present low field effect mobility around 10-5cm2/V.s. The optimization study investigated on deposition parameters of this molecule on OTFTs performances does not allow improving this mobility. Moreover gate bias stress measurements reveal important instabilities related to this molecule. Indenfluorene derivatives core (IF) based OTFTs show better performances. Field effect mobility µFE=2.1x10-4 cm2/V is reached using IF(CN2)2 meta in optimized deposition conditions and µFE=1x10-2 cm2/V.s is obtained using IF(CN2)2 para after annealing treatment. The investigated gate bias stress study highlights the good electrical stability of IF(CN2)2 para based OTFTs. Temperature measurements allow us studying the charge transport phenomenon in these indenofluorene derivatives. Fabricated N-type OTFTs are used to perform a first electronic circuit that consists in a logic gate (invertor).Finally this low temperature process led us to achieve OTFTs devices on flexible substrates (PEN).

When a temperature differential is applied across a semiconductor, a thermal voltage develops across it in response. The ratio of this thermal voltage to the applied temperature differential is the Seebeck coefficient, a transport coefficient that complements measurements of electrical and thermal conductivity. The physical interpretation of the Seebeck coefficient is the entropy per charge carrier divided by its charge and is hence a direct measurement of the carrier entropy in the solid state. This PhD thesis has three major outcomes. The first major outcome is a demonstration of how the Seebeck coefficient can be used as a tool to quantify the role of energetic disorder in organic semiconductors. To this end, a microfabricated chip was designed to perform accurate measurements of the Seebeck coefficient within the channel of the active layer in a field-effect transistor (FET). When measured within an FET, the Seebeck coefficient can be modulated using the gate electrode. The extent to which the Seebeck coefficient is modulated gives a clear idea of charge carrier trapping and the distribution of the density of states within the organic semiconductor. The second major outcome of this work is the observation that organic semiconducting polymers show Seebeck coefficients that are temperature independent and strongly gate voltage modulated. The extent to which the Seebeck coefficient is modulated in the polymer PBTTT is found to be larger than that in the polymer IDTBT. Taken together with conventional charge transport measurements on IDTBT, the voltage modulated Seebeck coefficient confirms the existence of a vanishingly small energetic disorder in this material. In the third and final outcome of this thesis, the magnitude of the Seebeck coefficient is shown to be larger for organic small molecules as compared to organic polymers. The basis for this is not yet clear. There are reports that such an observation is substantiated through a larger contribution from vibrational entropy that adds to the so called entropy-of-mixing contribution so as to boost the magnitude of the Seebeck coefficient in organic small molecules. As of now, this remains an open question and is a potential starting point for future work. The practical implications of this PhD thesis lie in building cost-effective and environmentally friendly waste-heat to useful energy converters based on organic polymers. The efficiency of heat to energy conversion by organic polymers tends to be higher than that for conventional semiconductors owing to the presence of narrow bands in organic polymer semiconductors.

Metal oxide reactions at metal oxide surfaces or at metal-metal oxide interfaces are of exceptional significance in areas such as catalysis, micro- and nanoelectronics, chemical sensors, and catalysis. Such reactions are frequently complicated by the presence of high electric fields and/or H2O-containing environments. The focus of this research was to understand (1) the iron oxide growth mechanism on Fe(111) at 300 K and 500 K together with the effect of high electric fields on these iron oxide films, and (2) the growth of alumina films on two faces of Ni3Al single crystal and the interaction of the resulting films with water vapor under non-UHV conditions. These studies were conducted with AES, LEED, and STM. XPS was also employed in the second study. Oxidation of Fe(111) at 300 K resulted in the formation of Fe2O3 and Fe3O4. The substrate is uniformly covered with an oxide film with relatively small oxide islands, i.e. 5-15 nm in width. At 500 K, Fe3O4 is the predominant oxide phase formed, and the growth of oxide is not uniform, but occurs as large islands (100 - 300 nm in width) interspersed with patches of uncovered substrate. Under the stress of STM induced high electric fields, dielectric breakdown of the iron oxide films formed at 300 K occurs at a critical bias voltage of 3.8 ± 0.5 V at varying field strengths. No reproducible result was obtained from the high field stress studies of the iron oxide formed at 500 K. Ni3Al(110) and Ni3Al(111) were oxidized at 900 K and 300 K, respectively. Annealing at 1100 K was required to order the alumina films in both cases. The results demonstrate that the structure of the 7 Å alumina films on Ni3Al(110) is k-like, which is in good agreement with the DFT calculations. Al2O3/Ni3Al(111) (γ'-phase) and Al2O3/Ni3Al(110) (κ-phase) films undergo drastic reorganization and reconstruction, and the eventual loss of all long-range order upon exposure to H2O pressure > 10-5 Torr. Al2O3/Ni3Al(110) film is significantly more sensitive to H2O vapor than the Al2O3/Ni3Al(111) film, and this may be due to the incommensurate nature of the oxide/Ni3Al(110) interface. STM measurements indicate that this effect is pressure- rather than exposure- dependent, and that the oxide instability is initiated at the oxide surface, rather than at the oxide/metal interface. The effect is not associated with formation of a surface hydroxide, yet is specific to H2O (similar O2 exposures have no effect).

Reconfigurable field effect transistors (RFET) have the ability to toggle polarity between n- and p- conductance at runtime [1], [2]. The here presented multiple independent gate (MIG) RFET expands the device functionality by offering additional logical inputs, valuable for e.g. efficient XOR or majority gate implementations [3], [4] or the here originally presented multiplexer circuit. Moreover,https://inspec.iet.org/ideas/#controlled-terms for the first time with a top-down RFET approach equal ON-currents are obtained for every configuration while requiring only one supply voltage (VDD).

We report on a novel silicon nanowire-based field effect transistor with integrated ferroelectric gate oxide. The concept allows tuning the carrier transport in a non-volatile approach by switching the polarization in the ferroelectric layer close to the source Schottky-junction. We interpret the results in terms of tuning the transmissibility of the Schottky-junction for charge carriers. The experimental results provide a first step towards the integration of memory-in-logic concepts with reconfigurable nanowire transistors.

Logic-in-memory circuits promise to overcome the von-Neumann bottleneck, which constitutes one of the limiting factors to data throughput and power consumption of electronic devices. In the following we present four-input logic gates based on only two ferroelectric FETs (FeFETs) with hafnium oxide as the ferroelectric material. By utilizing two complementary inputs, a XOR and a XNOR gate are created. The use of only two FeFETs results in a compact and nonvolatile design. This realization, moreover, directly couples the memory and logic function of the FeFET. The feasibility of the proposed structures is revealed by electrical measurements of HKMG FeFET memory arrays manufactured in 28nm technology.

This doctoral thesis is focused on the preparation of graphene layers by Chemical Vapor Deposition (CVD) and their utilization for fabrication and characterization of field effect transistors. The theoretical part of the thesis deals with different methods of graphene production and measurement of its transport properties. In the first part of the experimental section the growth of polycrystalline graphene and individual graphene crystals with sizes up to 300 m is investigated. Further, graphene layer was also grown on an atomically flat copper foils, which were fabricated in order to achieve the growth of graphene of higher quality. Subsequently, the transport properties of field effect transistors produced from the grown layers were measured. The last two chapters deal with a doping of graphene layer by gallium atoms and X-ray radiation. Whereas the deposition of gallium atoms on the graphene surface causes chemical doping of graphene layer by charge transfer, X-ray irradiation of graphene field effect transistors induces the ionization of positively charged defects in dielectrics, which electrostatically dope a graphene layer.

This thesis deals with the automation of transport experiments on graphene using the graphical programming language LabVIEW. Specifically, the experiments with graphene relative humidity sensors are based on: a two-point graphene structure, a two-point structure of SiO$_2$ and a four-point graphene structure in the form of a Hall bar. In all of these experiments, relative humidity, input electrical parameters, SPM measurements, and macroscopic transport properties are measured simultaneously. The program DeviceManager developed in framework of this thesis simplifies the implementation of these experiments.

The development of new materials and processes for electronic devices has been driven by the integrated circuit (IC) industry since the dawn of the computer era. After several decades of '"Moore's Law"-type innovation, future miniaturization may be slowed down by materials and processing limitations. By way of comparison, the nascent field of flexible electronics is not driven by the smallest possible circuit dimension, but instead by cost and form-factor where features typical of 1970s CMOS (i.e., channel length - IO μm) will enable flexible electronic technologies such as RFID, e-paper, photovoltaics and health monitoring devices. In this thesis. cyclohexasilane is proposed and used as a key reagent in solution processing of poly-Si and Co-Si thin films with the former used as the active layer in thin film transistors (TFTs) and the latter as the gate metal in metal-oxide-semiconductor (MOS) capacitors. A work function of 4.356 eV was determined for the Co-Si thin films via capacitance-voltage (C-Y) characterization which differs slightly from that extracted from ultraviolet photoemission spectroscopy (UPS) data (i.e., 4.8 eV). Simulation showed the difference between the C-V and UPS-derived data may be attributed to the existence of 8.3 x 10 (exponent 10) cm-2 interface charge density in the oxide-semiconductor junction. Poly-Si TFTs prepared using Si6 H12-based inks maintained the following electrical attributes: field effect mobility of 0.1 cm2V-1s-1; threshold voltage of 66 V; and, an on/off ratio of 1630. A BSIM3 version 3 NFET model was modified through global parametric extraction procedure to match the transfer characteristics of the fabricated poly-Si TFT. It is anticipated that this model can be utilized for future design simulation for solution-processed poly-Si circuits.

<div>With the transistor dimensions scaling down to a few atoms, quantum phenomena - like quantum tunneling and entanglement - will dictate the operation and performance of the next generation of electronic devices, post-CMOS era. While quantum tunneling limits the scaling of the conventional transistor, Tunneling Field Effect Transistor (TFET) employs band-to-band tunneling for the device operation. This mechanism can reduce the sub-threshold swing (S.S.) beyond the Boltzmann's limit, which is fundamentally limited to 60 mV/dec in a conventional Si-based metal-oxide-semiconductor field-effect transistor (MOSFET). A smaller S.S. ensures TFET operation at a lower supply voltage and, therefore, at lesser power compared to the conventional Si-based MOSFET.</div><div><br></div><div>However, the low transmission probability of the band-to-band tunneling mechanism limits the ON-current of a TFET. This can be improved by reducing the body thickness of the devices i.e., using 2-Dimensional (2D) materials or by utilizing heterojunction designs. In this thesis, two promising methods are proposed to increase the ON-current; one for the 2D material TFETs, and another for the III-V heterojunction TFETs.</div><div><br></div><div>Maximizing the ON-current in a 2D material TFET by determining an optimum channel thickness, using compact models, is presented. A compact model is derived from rigorous atomistic quantum transport simulations. A new doping profile is proposed for the III-V triple heterojunction TFET to achieve a high ON-current. The optimized ON-current is 325 uA/um at a supply voltage of 0.3 V. The device design is optimized by atomistic quantum transport simulations for a body thickness of 12 nm, which is experimentally feasible.</div><div> </div><div>However, increasing the device's body thickness increases the atomistic quantum transport simulation time. The simulation of a device with a body thickness of over 12 nm is computationally intensive. Therefore, approximate methods like the mode-space approach are employed to reduce the simulation time. In this thesis, the development of the mode-space approximation in modeling the triple heterojunction TFET is also documented.</div><div><br></div><div>In addition to the TFETs, quantum computing is an emerging field that utilizes quantum phenomena to facilitate information processing. An extra chapter is devoted to the electronic structure calculations of the Si:P delta-doped layer, using the empirical tight-binding method. The calculations agree with angle-resolved photoemission spectroscopy (ARPES) measurements. The Si:P delta-doped layer is extensively used as contacts in the Phosphorus donor-based quantum computing systems. Understanding its electronic structure paves the way towards the scaling of Phosphorus donor-based quantum computing devices in the future.</div>