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This thesis proposes a modified inductively degenerated common-emitter low-noise amplifier. To add a series-shunt feedback capacitance in series to the base of the cascode transistor for increasing the load impedance of the common-emitter transistor and enhancing the Miller effect, it is applied to improve the circuit¡¦s performance. By thoroughly studying the Miller effect for the input matching, noise, and linearity analysis and derivation of the modified structure, the theoretical analysis and experiments demonstrate the improved linearity and well noise performance. In addition, the proposed method is presented with the good figure of merit. The proposed method is presented in a hybrid circuit with the NEC 2S5010 NPN transistor for 900 MHz applications. It demonstrates that this method improves the linearity and the figure of merit has been increased by 50 to 70 percent. Moreover, the novel low noise amplifier is designed with a 0.35£gm SiGe BiCMOS process supported by the TSMC for 5.7 GHz WLAN band applications. It is found that the circuit has the characteristic of IM3 nonlinearity cancellation because the cascode transistor eliminates the third-order intermodulation genaerated by the common-emitter transistor. This thesis establishes a realizable method for high-linearity low-noise amplifier.

Kyoto University (京都大学) / 0048 / 新制・課程博士 / 博士(工学) / 甲第16862号 / 工博第3583号 / 新制||工||1541(附属図書館) / 29537 / 京都大学大学院工学研究科電子工学専攻 / (主査)教授 木本 恒暢, 教授 藤田 静雄, 准教授 浅野 卓 / 学位規則第4条第1項該当

This dissertation describes the development of III-nitride (III-N) bipolar devices for optoelectronic and electronic applications. Research mainly involves device design, fabrication process development, and device characterization for Geiger-mode gallium nitride (GaN) deep-UV (DUV) p-i-n avalanche photodiodes (APDs), indium gallium nitride (InGaN)/GaN-based violet/blue laser diodes (LDs), and GaN/InGaN-based npn radio-frequency (RF) double-heterojunction bipolar transistors (DHBTs). All the epitaxial materials of these devices were grown in the Advanced Materials and Devices Group (AMDG) led by Prof. Russell D. Dupuis at the Georgia Institute of Technology using the metalorganic chemical vapor deposition (MOCVD) technique. Geiger-mode GaN p-i-n APDs have important applications in DUV and UV single-photon detections. In the fabrication of GaN p-i-n APDs, the major technical challenge is the sidewall leakage current. To address this issue, two surface leakage reduction schemes have been developed: a wet-etching surface treatment technique to recover the dry-etching-induced surface damage, and a ledged structure to form a surface depletion layer to partially passivate the sidewall. The first Geiger-mode DUV GaN p-i-n APD on a free-standing (FS) c-plane GaN substrate has been demonstrated. InGaN/GaN-based violet/blue/green LDs are the coherent light sources for high-density optical storage systems and the next-generation full-color LD display systems. The design of InGaN/GaN LDs has several challenges, such as the quantum-confined stark effect (QCSE), the efficiency droop issue, and the optical confinement design optimization. In this dissertation, a step-graded electron-blocking layer (EBL) is studied to address the efficiency droop issue. Enhanced internal quantum efficiency (ɳi) has been observed on 420-nm InGaN/GaN-based LDs. Moreover, an InGaN waveguide design is implemented, and the continuous-wave (CW)-mode operation on 460-nm InGaN/GaN-based LDs is achieved at room temperature (RT). III-N HBTs are promising devices for the next-generation RF and power electronics because of their advantages of high breakdown voltages, high power handling capability, and high-temperature and harsh-environment operation stability. One of the major technical challenges to fabricate high-performance RF III-N HBTs is to suppress the base surface recombination current on the extrinsic base region. The wet-etching surface treatment has also been employed to lower the surface recombination current. As a result, a record small-signal current gain (hfe) > 100 is achieved on GaN/InGaN-based npn DHBTs on sapphire substrates. A cut-off frequency (fT) > 5.3 GHz and a maximum oscillation frequency (fmax) > 1.3 GHz are also demonstrated for the first time. Furthermore, A FS c-plane GaN substrate with low epitaxial defect density and good thermal dissipation ability is used for reduced base bulk recombination current. The hfe > 115, collector current density (JC) > 141 kA/cm², and power density > 3.05 MW/cm² are achieved at RT, which are all the highest values reported ever on III-N HBTs.

Šiuolaikiniai Si/SiGe, AlGaAs/GaAs bei InGaP/GaAs įvarialyčiai dvipoliai tranzistoriai (ĮDT) pasižymi dideliu informacijos perdavimo greičiu, dideliu signalo stiprinimu, žemu triukšmų lygiu ir mažu signalo iškraipymu. Disertaciniame darbe atlikti Si/SiGe ir InGaP/GaAs ĮDT aukštadažnių charakteristikų ir triukšmo tyrimai dažnių ruože nuo 1 iki 30 GHz naudojant ir voltamperines charakteristikas. Tranzistorių triukšmų modeliavimas atliktas atsižvelgiant į tranzistoriaus šratinio triukšmo šaltinių koreliaciją, smūginę jonizaciją, tranzistoriaus parametrų temperatūrines priklausomybes. Dvipolių tranzistorių analitinis modelis, išvestas naudojant π –tipo ekvivalentinę grandinę, buvo įdiegtas į dvipolių tranzistorių kompaktinį (sutelktų parametrų) modelį HICUM (angl. high current model). Ši kompaktinio modelio versija gali aprašyti bazės ir kolektoriaus srovių šratinio triukšmo šaltinių koreliaciją. Kambario temperatūroje smūginės jonizacijos sąlygotas SiGe ĮDT triukšmo parametrų kitimas buvo tirtas hidrodinaminiu, dreifo - difuzijos ir kompaktiniu HICUM modeliais, taikant Chynowetho smūginės jonizacijos dėsnį griūtinių srovių įvertinimui. SiGe ĮDT temperatūriniai voltamperinių, aukštadažnių ir triukšmo charakteristikų tyrimai atlikti plačiame aplinkos temperatūrų ruože 4 – 423 K. Tyrimai parodė, kad hidrodinaminis ir kompaktinis HICUM modeliai galioja tik 300 – 423K temperatūrų ruože. / Modern Si/SiGe, AlGaAs/GaAs and InGaP/GaAs heterojunction bipolar transistors (HBTs) exhibit high-speed and high-frequency operation, high gain, low noise and low signal distortion. This work deals with an investigation of DC, microwave and noise characteristics of Si/SiGe and InGaP/GaAs HBTs in the relevant frrequency range of 1-30 GHz. Noise simulation and modeling of HBTs have been performed including correlation of shot noise sources, impact ionization and temperature dependences. Analytical model for bipolar transistor, based on π- type equivalent circuit was derived and implemented in the bipolar transistor compact model HICUM. This compact model HICUM version includes correlation between base and collector current noise sources. The noise behavior resulting from impact ionization was investigated at room temperature for SiGe HBTs. Modeling was performed with a hydrodynamic model, drift - diffusion models and the compact model HICUM using a Chynoweth’s law for avalanche generation. DC, high frequency characteristics and noise of SiGe HBTs were investigated in a wide ambient temperature range 4 – 423 K Both hydrodynamic device simulation and compact model HICUM view agreement with experimental data only in the temperature range of 300 – 423K.

Modern Si/SiGe, AlGaAs/GaAs and InGaP/GaAs heterojunction bipolar transistors (HBTs) exhibit high-speed and high-frequency operation, high gain, low noise and low signal distortion. This work deals with an investigation of DC, microwave and noise characteristics of Si/SiGe and InGaP/GaAs HBTs in the relevant frrequency range of 1-30 GHz. Noise simulation and modeling of HBTs have been performed including correlation of shot noise sources, impact ionization and temperature dependences. Analytical model for bipolar transistor, based on π- type equivalent circuit was derived and implemented in the bipolar transistor compact model HICUM. This compact model HICUM version includes correlation between base and collector current noise sources. The noise behavior resulting from impact ionization was investigated at room temperature for SiGe HBTs. Modeling was performed with a hydrodynamic model, drift - diffusion models and the compact model HICUM using a Chynoweth’s law for avalanche generation. DC, high frequency characteristics and noise of SiGe HBTs were investigated in a wide ambient temperature range 4 – 423 K Both hydrodynamic device simulation and compact model HICUM view agreement with experimental data only in the temperature range of 300 – 423K. / Šiuolaikiniai Si/SiGe, AlGaAs/GaAs bei InGaP/GaAs įvarialyčiai dvipoliai tranzistoriai (ĮDT) pasižymi dideliu informacijos perdavimo greičiu, dideliu signalo stiprinimu, žemu triukšmų lygiu ir mažu signalo iškraipymu. Disertaciniame darbe atlikti Si/SiGe ir InGaP/GaAs ĮDT aukštadažnių charakteristikų ir triukšmo tyrimai dažnių ruože nuo 1 iki 30 GHz naudojant ir voltamperines charakteristikas. Tranzistorių triukšmų modeliavimas atliktas atsižvelgiant į tranzistoriaus šratinio triukšmo šaltinių koreliaciją, smūginę jonizaciją, tranzistoriaus parametrų temperatūrines priklausomybes. Dvipolių tranzistorių analitinis modelis, išvestas naudojant π –tipo ekvivalentinę grandinę, buvo įdiegtas į dvipolių tranzistorių kompaktinį (sutelktų parametrų) modelį HICUM (angl. high current model). Ši kompaktinio modelio versija gali aprašyti bazės ir kolektoriaus srovių šratinio triukšmo šaltinių koreliaciją. Kambario temperatūroje smūginės jonizacijos sąlygotas SiGe ĮDT triukšmo parametrų kitimas buvo tirtas hidrodinaminiu, dreifo - difuzijos ir kompaktiniu HICUM modeliais, taikant Chynowetho smūginės jonizacijos dėsnį griūtinių srovių įvertinimui. SiGe ĮDT temperatūriniai voltamperinių, aukštadažnių ir triukšmo charakteristikų tyrimai atlikti plačiame aplinkos temperatūrų ruože 4 – 423 K. Tyrimai parodė, kad hidrodinaminis ir kompaktinis HICUM modeliai galioja tik 300 – 423K temperatūrų ruože.

As Si-manufacturing compatible SiGe HBTs are making rapid in-roads into RF through mm-wave circuit applications, with performance levels steadily marching upward, the use of these devices under extreme environment conditions are being studied extensively. In this work, test structures of SiGe HBTs were designed and put into extremely low temperatures, and a new negative differential resistance effect and a novel collector current kink effect are investigated in the cryogenically-operated SiGe HBTs. Theory based on an enhanced positive feedback mechanism associated with heterojunction barrier effect at deep cryogenic temperatures is proposed. The accumulated charge induced by the barrier effect acts at low temperatures to enhance the total collector current, indirectly producing both phenomena. This theory is confirmed using calibrated 2-D DESSIS simulations over temperature. These unique cryogenic effects also have significant impact on the ac performance of SiGe HBTs operating at high-injection. Technology evolution plays an important role in determining the magnitude of the observed phenomena, and the scaling implications are addressed. Circuit implication is discussed.

Les travaux de thèse, présentés dans ce manuscrit, portent sur la caractérisation et la modélisation des sources de bruit basse fréquence dans les transistors bipolaires à hétérojonction Si/SiGe:C issus des filières BiCMOS 130 et 55 nm utilisées pour la réalisation de circuits intégrés dédiés aux futures applications dans le domaine du THz. A partir des mesures réalisées en fonction de la polarisation, de paramètres géométriques (surface et périmètre d'émetteur principalement) et de la température, la composante de bruit en 1/f, associée aux fluctuations du courant de base, a été entièrement caractérisée et les sources de bruit associées localisées. Les paramètres du modèle compact SPICE ont été extraits et comparés avec ceux de la littérature. Pour la technologie BiCMOS 130 nm, la valeur obtenue pour la figure de mérite KB égale 6,8 10-11 µm² ce qui représente le meilleur résultat publié à ce jour, toutes filières de transistors bipolaires confondues. Réalisée sur une plaque entière, l'étude statistique de la dispersion du niveau de bruit en 1/f a permis d'étendre la modélisation compacte de type SPICE. Mesuré sur une large gamme de température, le niveau de bruit en 1/f n'a pas présenté de variation significative. Pour la première fois, une étude complète de la composante de bruit en 1/f associée aux fluctuations du courant de collecteur est présentée et les paramètres du modèle SPICE extraits. Concernant la caractérisation des composantes de génération-recombinaison (présence non systématique), une étude statistique a montré que les transistors de plus petites dimensions étaient les plus impactés. La comparaison entre les différentes technologies montre que ces composantes sont beaucoup plus présentes dans les technologies les moins matures. Quand ces composantes ont été associées à du bruit RTS, une méthode de caractérisation temporelle et fréquentielle a été mise en œuvre. Enfin, dans certains cas, une étude en basses températures a permis d'extraire les énergies d'activation des pièges responsables de ces composantes de génération-recombinaison. / The presented thesis work, in this manuscript, focuses on the characterization and modeling of the low frequency noise sources in heterojunction bipolar transistors Si/SiGe :C derived from 130 to 55 nm BiCMOS technology used in the production of integrated circuits dedicated for THz domain applications. From measurements versus bias, geometrical parameters (emitter area and perimeter) and temperature, the 1/f noise component, associated to the base current fluctuations, has been fully characterized and the associated sources have been localized. The SPICE compact model parameters have been extracted and compared with those of the literature. For the BiCMOS 130 nm technology, the obtained figure of merit value of 6,8 10-11 µm2 represents the best published result so far in all bipolar transistors. The dispersion study of the 1/f noise component, performed over a complete wafer, allowed us to extend the SPICE type compact modeling. Measured over a large temperature range, the 1/f noise did not show any variations. For the first time, a complete characterization of the 1/f component at the output of the transistors is presented as well as the extraction of SPICE parameters. Regarding the characterization of generation-recombination components (unsystematic presence), a statistical study has showed that transistors with small emitter areas (Ae < 1 µm2) are affected more than the transistors with large emitter areas by the presence of g-r components. Comparison between different technologies shows that these components are much more present in the less mature technologies. When these components have been associated to RTS, time and frequency domain method is implemented. Finally, in some cases, a study at low temperatures was used to extract the activation energy of the traps responsible for the generation-recombination components.

This work investigates the fundamental device limits related to operational voltage constraints and linearity in state-of-the-art silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) in order to support the design of robust next-generation high-frequency transceivers. This objective requires a broad understanding of how much "usable" voltage exists compared to conventionally defined breakdown voltage specifications, so the role of avalanche-induced current-crowding (or "pinch-in") effects on transistor performance and reliability are carefully studied. Also, the effects of intermodulation distortion are examined at the transistor-level for new and better understanding of the limits and trade-offs associated with achieving enhanced dynamic range and linearity performance on existing and future SiGe HBT technology platforms. Based on these investigations, circuits designed for superior dynamic range performance are presented.

Les études qui seront présentées dans le cadre de cette thèse portent sur le développement et l’optimisation des techniques pour la modélisation compacte des transistors bipolaires à hétérojonction (TBH). Ce type de modélisation est à la base du développement des bibliothèques de composants qu’utilisent les concepteurs lors de la phase de simulation des circuits intégrés. Le but d’une technologie BiCMOS est de pouvoir combiner deux procédés technologiques différents sur une seule et même puce. En plus de limiter le nombre de composants externes, cela permet également une meilleure gestion de la consommation dans les différents blocs digitaux, analogiques et RF. Les applications dites rapides peuvent ainsi profiter du meilleur des composants bipolaires et des transistors CMOS. Le défi est d’autant plus critique dans le cas des applications analogiques/RF puisqu’il est nécessaire de diminuer la puissance consommée tout en maintenant des fréquences de fonctionnement des transistors très élevées. Disposer de modèles compacts précis des transistors utilisés est donc primordial lors de la conception des circuits utilisés pour les applications analogiques et mixtes. Cette précision implique une étude sur un large domaine de tensions d’utilisation et de températures de fonctionnement. De plus, en allant vers des nœuds technologiques de plus en plus avancés, des nouveaux effets physiques se manifestent et doivent être pris en compte dans les équations du modèle. Les règles d’échelle des technologies plus matures doivent ainsi être réexaminées en se basant sur la physique du dispositif. Cette thèse a pour but d’évaluer la faisabilité d’une offre de modèle compact dédiée à la technologie avancée SiGe TBH de chez ST Microelectronics. Le modèle du transistor bipolaire SiGe TBH est présenté en se basant sur le modèle compact récent HICUMversion L2.3x. Grâce aux lois d’échelle introduites et basées sur le dessin même des dimensions du transistor, une simulation précise du comportement électrique et thermique a pu être démontrée.Ceci a été rendu possible grâce à l’utilisation et à l’amélioration des routines et méthodes d’extraction des paramètres du modèle. C’est particulièrement le cas pour la détermination des éléments parasites extrinsèques (résistances et capacités) ainsi que celle du transistor intrinsèque. Finalement, les différentes étapes d’extraction et les méthodes sont présentées, et ont été vérifiées par l’extraction de bibliothèques SPICE sur le TBH NPN Haute-Vitesse de la technologie BiCMOS avancée du noeud 55nm, avec des fréquences de fonctionnement atteignant 320/370GHz de fT = fmax. / The aim of BiCMOS technology is to combine two different process technologies intoa single chip, reducing the number of external components and optimizing power consumptionfor RF, analog and digital parts in one single package. Given the respectivestrengths of HBT and CMOS devices, especially high speed applications benefit fromadvanced BiCMOS processes, that integrate two different technologies.For analog mixed-signal RF and microwave circuitry, the push towards lower powerand higher speed imposes requirements and presents challenges not faced by digitalcircuit designs. Accurate compact device models, predicting device behaviour undera variety of bias as well as ambient temperatures, are crucial for the development oflarge scale circuits and create advanced designs with first-pass success.As technology advances, these models have to cover an increasing number of physicaleffects and model equations have to be continuously re-evaluated and adapted. Likewiseprocess scaling has to be verified and reflected by scaling laws, which are closelyrelated to device physics.This thesis examines the suitability of the model formulation for applicability to production-ready SiGe HBT processes. A derivation of the most recent model formulationimplemented in HICUM version L2.3x, is followed by simulation studies, whichconfirm their agreement with electrical characteristics of high-speed devices. Thefundamental geometry scaling laws, as implemented in the custom-developed modellibrary, are described in detail with a strong link to the specific device architecture.In order to correctly determine the respective model parameters, newly developed andexisting extraction routines have been exercised with recent HBT technology generationsand benchmarked by means of numerical device simulation, where applicable.Especially the extraction of extrinsic elements such as series resistances and parasiticcapacitances were improved along with the substrate network.The extraction steps and methods required to obtain a fully scalable model library wereexercised and presented using measured data from a recent industry-leading 55nmSiGe BiCMOS process, reaching switching speeds in excess of 300GHz. Finally theextracted model card was verified for the respective technology.