Η παρούσα διπλωματική εργασία πραγματεύεται τη μελέτη, το σχεδιασμό και την κατασκευή ενός ηλεκτρονικού μετατροπέα ισχύος ανύψωσης συνεχούς μεταβαλλόμενης τάσης εισόδου σε σταθερή συνεχή τάση εξόδου. Η εργασία αυτή εκπονήθηκε στο Εργαστήριο Ηλεκτρομηχανικής Μετατροπής Ενέργειας του τμήματος Ηλεκτρολόγων Μηχανικών και Τεχνολογίας Υπολογιστών της Πολυτεχνικής Σχολής του Πανεπιστημίου Πατρών. Σκοπός της εργασίας είναι η κατασκευή ενός ηλεκτρονικού μετατροπέα συνεχούς τάσης σε συνεχή, ο οποίος θα τροφοδοτείται από ένα σύστημα ενεργειακών κυψελών και θα παρέχει σταθερή συνεχή τάση εξόδου 50V, ούτως ώστε στην συνέχεια να τροφοδοτείται ένας αντιστροφέας, ο οποίος θα οδηγεί ένα dc brushless κινητήρα. Το συγκεκριμένο σύστημα ενεργειακών κυψελών έχει μεταβαλλόμενη τάση εισόδου από 26-43Vdc και μέγιστη ισχύ 1200W. Αρχικά, παρουσιάζεται μια συνοπτική θεωρία, η οποία αναλύει την χαρακτηριστική V-I μιας ενεργειακής κυψέλης. Στην συνέχεια αναλύεται το σύστημα ενεργειακών κυψελών, το οποίο θα χρησιμοποιηθεί στην εφαρμογή μας. Στην συνέχεια, ακολουθεί η θεωρητική ανάλυση του απλού μετατροπέα ανύψωσης συνεχούς τάσης σε συνεχή αρχικά και έπειτα η θεωρητική ανάλυση του μετατροπέα ανύψωσης συνεχούς τάσης σε συνεχή με διαδοχική αγωγή τεσσάρων φάσεων, που κατασκευάστηκε για την συγκεκριμένη εφαρμογή. Ο συγκεκριμένος μετατροπέας της εφαρμογής προσομοιώθηκε στο πρόγραμμα PSpice ούτως ώστε να ελεγχθεί η συμπεριφορά του. Στο επόμενο βήμα, γίνεται αναλυτική παρουσίαση όλων των στοιχείων και κυκλωμάτων που χρησιμοποιήθηκαν για την κατασκευή του ηλεκτρονικού μετατροπέα. Τέλος αναλύονται τα δυο προγράμματα ελέγχου που σχεδιάστηκαν για τον έλεγχο της τάσης εξόδου στα 50V dc, το πρόγραμμα ανοικτού και κλειστού βρόγχου και παρουσιάζονται οι μετρήσεις που διεξήχθησαν στον μετατροπέα για την επιβεβαίωση και αξιολόγηση της θεωρητικής ανάλυσης. / The thesis deals with the design, study and construction of a dc/dc boost converter, having a variable input voltage and a constant output voltage. The work was conducted in the Laboratory of Electromechanical Energy Conversion, Department of Electrical and Computer Engineering School of Engineering, University of Patras. The aim is to construct a dc/dc converter, which will be supplied by a fuel cell system and will provide a constant dc output voltage at 50V, in order to supply then an inverter, which will drive a dc brushless motor. In the specific fuel cells system the voltage varies from 26-43V dc and it has maximum output power 1200W. First, a small theory is presented, which analyzes the polarization curve of a fuel cell. Then we analyze the fuel cell system, which will be used in this application. Next, a theoretical analysis of the simple boost converter and then the theoretical analysis of the interleaved multi-(four) channel boost converter, which was constructed, are presented. This converter is simulated with the program PSpice, in order to check its operation. In the next step, a comprehensive presentation of all of the chips and circuits which were used for the construction of the converter is done. Finally, the two programs designed for the control of the output voltage at 50V dc, the open and close loop programs, are analyzed and the experimental measurements carried out in the converter are displayed, so as to confirm and evaluate the theoretical analysis

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / Throughout the twentieth century, the supply of electricity, mainly obtained from fossil fuels like oil and coal, it has supported the growth and transformation of the world economy. In the early years of this century, the scenario has changed to a new reality, the need for sustainable development. In other words, the challenge is to gradually replace the traditional sources of electricity from renewable energy sources, in which the solar photovoltaic energy has highlighted. Photovoltaic inverters may be constituted in different ways, presenting in recent decades a high research progress. The main study efforts focus on getting high efficiency, high power density and high reliability, to increase the overall performance of the photovoltaic installation. In this direction, this Master Thesis aims to propose, analyze, design and implement a single-phase grid-tied photovoltaic inverter, which provides high efficiency and high power density. This circuit is called Transformerless Photovoltaic Interleaved Multilevel NPC Inverter , that use uncoupled inductors, Gallium Nitride power transistors and employs interleaving strategy beside the LCL filter, synthesizing 9 levels. Are introduced studies on the operation, modulation and design methodology of power stages, considering the static performance. Results are presented for the 1 kW, in order to support the validity of the proposed topology in conjunction with the standard aspects, especially in relation to THD (Total Harmonic Distortion) of grid current, leakage current, efficiency and power density. / Durante todo o século XX, a oferta de energia elétrica, obtida principalmente a partir dos combustíveis fósseis como petróleo e o carvão mineral, deu suporte ao crescimento e as transformações da economia mundial. Já nos primeiros anos do século atual, o cenário mudou para uma nova realidade, a necessidade do desenvolvimento sustentável. Em outras palavras, o desafio é substituir gradativamente as fontes tradicionais de energia elétrica por fontes de energia renovável, onde a energia solar fotovoltaica tem destaque. Os conversores eletrônicos para sistemas fotovoltaicos, também chamados de inversores, podem ser constituídos de diversas maneiras, apresentando nas últimas décadas um acentuado progresso de pesquisa. Os principais esforços de estudo tem se concentrado em obter alto rendimento, alta densidade de potência e alta confiabilidade, de modo a aumentar o desempenho global da instalação fotovoltaica. Neste horizonte, esta dissertação tem por objetivo propor, analisar, projetar e implementar um inversor fotovoltaico monofásico, para aplicação conectada à rede, de alto rendimento e alta densidade de potência. Esta estrutura é denominada de Inversor Fotovoltaico NPC Multinível Intercalado sem Transformador , que utiliza indutores não acoplados, interruptores de Nitreto de Gálio e emprega a técnica interleaving junto ao filtro LCL, sintetizando 9 níveis. No decorrer do trabalho são introduzidos estudos relativos à operação, modulação, metodologia de projeto e estágios de potência, estabelecendo critérios, enquanto considera a performance estática. São apresentados resultados, observando a potência de 1 kW, com a finalidade de corroborar a validade da topologia proposta juntamente as normativas e aspectos que norteiam a aplicação, especialmente com respeito à THD (Total Harmonic Distortion) da corrente da rede, corrente de fuga, rendimento e densidade de potência.

Made available in DSpace on 2014-06-11T19:30:51Z (GMT). No. of bitstreams: 0 Previous issue date: 2010-05-14Bitstream added on 2014-06-13T20:00:55Z : No. of bitstreams: 1 melo_ga_dr_ilha.pdf: 5228605 bytes, checksum: 52731e96bb6ac0861b1e6187109bafa8 (MD5) / Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES) / Esta tese apresenta o desenvolvimento e os principais resultados para um retificador monofásico pré-regulador ”boost” para aplicação em sistema trólebus, possibilitando sua alimentação em corrente alternada (CA) ou em corrente contínua (CC), mantendose o sistema tradicional de distribuição da alimentação a dois fios. A estrutura proposta é composta por um retificador monofásico convencional, conectado a um conversor “boost” entrelaçado com cinco células, operando no modo de condução descontínua (MCD), reduzindo as perdas de comutação no diodo “boost”, interferências eletromagnéticas (EMI - electromagnetic interference) e propiciando o controle de forma simples, robusta e confiável para a estrutura. Além disso, devido às características das linhas de distribuição, a estrutura proposta pode atuar como conversor CA para CC ou CC para CC, fornecendo nível de tensão dentro da faixa adequada para o barramento CC. Quando alimentado pelo sistema em CA monofásico, o conversor propicia elevado fator de potência com reduzida distorção harmônica total de corrente (DHTi), atendendo plenamente às restrições da norma internacional IEC 61000-3-4. Adicionalmente, uma técnica de correção para a corrente de entrada, utilizando referência da tensão de entrada, é utilizada para garantir os baixos níveis de distorção harmônica, uma vez que a operação do pré-regulador retificador “boost” entrelaçado em MCD ocorre com reduzido ganho estático. Para a implementação do controle da regulação de tensão e correção da corrente de entrada, é empregado um dispositivo FPGA (field programmable gate array) utilizando linguagem de descrição de hardware (VHDL - verilog hardware description language). Utilizando o mesmo dispositivo FPGA, foi desenvolvido um controle de gerenciamento da operação, promovendo a comutação automática quando... / This thesis presents the development and experimental analysis of a special input stage converter for a Trolleybus type vehicle allowing its operation in AC (two wires, singlephase) or DC distribution networks. The proposed input stage architecture is composed by a conventional single-phase rectifier connected with a five interleaved boost rectifiers operating in discontinuous conduction mode (DCM), avoiding commutation boost diode losses, electromagnetic interference (EMI) and promoting simple control actions, robustness and reliability for the structure. Furthermore, due to the power lines characteristics, the proposed input power structure can act as AC to DC or as DC to DC converter providing a proper DC output voltage range required to the DC bus. When operating as AC to DC, the converter is capable to provide high power factor with reduced input current harmonic distortion, complying with the imposed restrictions by IEC 61000-3-4 standard. In addition, a special input current correction technique, using input voltage reference, is employed in order to achieve low harmonic distortions considering operation with low voltage static gain for the DCM interleaved boost rectifier pre-regulator. For implementation of the output voltage control and input current correction was used a field programmable gate array (FPGA) device with verilog hardware description language (VHDL). In addition using the same FPGA device, a management control system was implemented, promoting the required automatic operation changes when the vehicle is commuted from the DC power supply to the AC power supply and viceversa, keeping the original electrical DC bus characteristics for the trolleybus. After a brief review, a development work process is presented, containing the design methodology with all needed mathematical expressions, simulations, control circuits, as well as a 3D Computer-Aided Designs... (Complete abstract click electronic access below)

La solution pour l'énergie génératrice issue de sources non polluantes configure un problème mondial, indéterminé, complexe et progressif. Et certainement, passe par la diversification de la matrice énergétique. La diversification signifie non seulement que des sources différentes sont converties en énergie utile, comme l'électricité, mais aussi décentraliser la production d'énergie afin de s'adapter à une plus grande adéquation de la demande, qui est décentralisée aussi. La Génération Distribuée propose ce type de développement, mais pour accroître sa pénétration, plusieurs obstacles techniques doivent être surpassés. L'un d'entre eux est lié aux systèmes de conversion, qui doivent être plus flexibles, modulaires, efficaces et compatibles avec les différentes sources d'énergie, car ils sont très spécifiques pour une certaine zone. La présente étude pousse ses efforts vers cette direction, c'est-à-dire comportant un système avec plusieurs entrées pour combiner différentes sources d'énergie renouvelables en un seul et efficace convertisseur de puissance pour la connexion au réseau. Elle porte sur la conception et le contrôle d'un système de production hybride de 11,7 kW utilisant des panneaux solaires photovoltaïques et une éolienne. Un convertisseur multicellulaire divisé en deux parties réalise la conversion: Convertisseur Côté Génération (GSC) et Convertisseur Côté Réseau (MSC). Les deux convertisseurs élévateurs (boost) responsables de la conversion photovoltaïque et du redresseur et de boost du générateur éolien, ainsi que les inductances d'entrée et les condensateurs, effectuent le GSC. La GSC permet la conversion en une tension de liaison CC fixe, mais garantit également la commande indépendante pour chaque entrée permettant le suivi du point de puissance maximum des panneaux et de l'éolienne. De l'autre côté, le MSC monophasé a quatre cellules effectue la connexion au réseau à travers un filtre LCL. Ce filtre utilise un Intercell Transformers (ICT) ou inducteurs couplés magnétiquement dans la première inductance pour réduire l'ondulation individuelle actuelle générée par la commutation. Le MSC contrôle la tension de la liaison CC et, ce faisant, il permet le flux de puissance des éléments de génération vers le réseau. / The solution for the generating energy derived from non-polluting sources configures a worldwide problem, which is undetermined, complex, and gradual; and certainly, passes through the diversification of the energetic matrix. Diversification means not only having different sources converted into useful energy, like the electricity, but also decentralizing the energy generation in order to fit with higher adequacy the demand, which is decentralized too. Distributed Generation proposes this sort of development but in order to increase its penetration several technical barriers must be overpassed. One of them is related to the conversion systems, which must be more flexible, modular, efficient and compatible with the different energy sources, since they are very specific for a certain area. The present study drives its efforts towards this direction, i.e. having a system with several inputs for combining different renewable energy sources into a single and efficient power converter for the grid connection. It focuses on the design and control of an 11.7 kW hybrid renewable generation system, which contains two parallel circuits of photovoltaic panels and a wind turbine. A multicell converter divided in two stages accomplishes the convertion: Generation Side Converter (GSC) and Mains Side Converter (MSC). Two boost converters responsible for the photovoltaic generation and a rectifier and a third boost, for the wind constitue the GSC. It allows the conversion to the fixed output DC voltage, controlling individually and performing the maximum power point tracking in each input. On the other side, the single-phase 4- cell MSC accomplishes the connection to the grid through an LCL filter. This filter uses an Intercell Transformer (ICT) in the first inductor for reducing the individual ripple generated by the swicthing. The MSC controls the DC-link voltage and, by doing that, it allows the power flow from the generation elements to the network.

Orientador: Dr. José L. Azcue Puma / Dissertação (mestrado) - Universidade Federal do ABC, Programa de Pós-Graduação em Engenharia Elétrica, 2016. / Este trabalho apresenta o estudo, modelagem e projeto de um sistema de conversão de energia para a conexão de um módulo fotovoltaico com a rede elétrica. Nesta pesquisa são abordados três conversores para adequar a energia gerada por um painel fotovoltaico e conectá-la à rede elétrica. O primeiro conversor é um Boost intercalado de dois níveis encarregado de implementar o MPPT (Maximum Power Point Tracking), o segundo conversor é um Ressonante LLC que realiza o isolamento galvânico e o terceiro conversor é um inversor em ponte completa que mantém a tensão de barramento em um valor determinado e realiza a conversão de corrente contínua para corrente alternada. Os três conversores são projetados, calculando os elementos passivos que os compõem e simulando os circuitos obtidos. Também, é realizada a modelagem dos conversores e o projeto dos controladores utilizando a análise de pequenos sinais. Os resultados de simulação são apresentados utilizando os softwares PSIM e MATLAB. Na parte experimental são verificados os dois primeiros conversores usando o kit High Voltage Isolated Solar MPPT fabricado pela Texas Instruments. / This work presents the study, modeling and design of a photovoltaic conversion system for the connection of a photovoltaic module with the grid. In this research three converters are approached to adequate the generated energy for a photovoltaic panel and to transfer the energy to the grid. The first converter is an interleaved two-level boost responsible for implementing the MPPT (Maximum Power Point Tracking) the second converter is a Resonant LLC that performs galvanic isolation and the third converter is a complete bridge inverter that keeps the bus voltage at a certain value and performs the conversion of continuos current to alternating current. The three converters are designed, calculating the passive elements that compose them and simulating the obtained circuits. Also, the modeling of the inverters and the design of the controllers are performed using small signal analysis. Simulation results are presented using the PSIM and MATLAB software. In the experimental part the first two inverters are verified using the High Voltage Isolated Solar MPPT kit manufactured by Texas Instruments.

Orientador: Carlos Alberto Canesin / Banca: Falcondes Jose Mendes de Seixas / Banca: Dionizio Paschoareli Junior / Banca: Luiz Carlos de Freitas / Banca: João Batista Vieira Junior / Resumo: Esta tese apresenta o desenvolvimento e os principais resultados para um retificador monofásico pré-regulador "boost" para aplicação em sistema trólebus, possibilitando sua alimentação em corrente alternada (CA) ou em corrente contínua (CC), mantendose o sistema tradicional de distribuição da alimentação a dois fios. A estrutura proposta é composta por um retificador monofásico convencional, conectado a um conversor "boost" entrelaçado com cinco células, operando no modo de condução descontínua (MCD), reduzindo as perdas de comutação no diodo "boost", interferências eletromagnéticas (EMI - electromagnetic interference) e propiciando o controle de forma simples, robusta e confiável para a estrutura. Além disso, devido às características das linhas de distribuição, a estrutura proposta pode atuar como conversor CA para CC ou CC para CC, fornecendo nível de tensão dentro da faixa adequada para o barramento CC. Quando alimentado pelo sistema em CA monofásico, o conversor propicia elevado fator de potência com reduzida distorção harmônica total de corrente (DHTi), atendendo plenamente às restrições da norma internacional IEC 61000-3-4. Adicionalmente, uma técnica de correção para a corrente de entrada, utilizando referência da tensão de entrada, é utilizada para garantir os baixos níveis de distorção harmônica, uma vez que a operação do pré-regulador retificador "boost" entrelaçado em MCD ocorre com reduzido ganho estático. Para a implementação do controle da regulação de tensão e correção da corrente de entrada, é empregado um dispositivo FPGA (field programmable gate array) utilizando linguagem de descrição de hardware (VHDL - verilog hardware description language). Utilizando o mesmo dispositivo FPGA, foi desenvolvido um controle de gerenciamento da operação, promovendo a comutação automática quando... (Resumo completo, clicar acesso eletrônico abaixo) / Abstract: This thesis presents the development and experimental analysis of a special input stage converter for a Trolleybus type vehicle allowing its operation in AC (two wires, singlephase) or DC distribution networks. The proposed input stage architecture is composed by a conventional single-phase rectifier connected with a five interleaved boost rectifiers operating in discontinuous conduction mode (DCM), avoiding commutation boost diode losses, electromagnetic interference (EMI) and promoting simple control actions, robustness and reliability for the structure. Furthermore, due to the power lines characteristics, the proposed input power structure can act as AC to DC or as DC to DC converter providing a proper DC output voltage range required to the DC bus. When operating as AC to DC, the converter is capable to provide high power factor with reduced input current harmonic distortion, complying with the imposed restrictions by IEC 61000-3-4 standard. In addition, a special input current correction technique, using input voltage reference, is employed in order to achieve low harmonic distortions considering operation with low voltage static gain for the DCM interleaved boost rectifier pre-regulator. For implementation of the output voltage control and input current correction was used a field programmable gate array (FPGA) device with verilog hardware description language (VHDL). In addition using the same FPGA device, a management control system was implemented, promoting the required automatic operation changes when the vehicle is commuted from the DC power supply to the AC power supply and viceversa, keeping the original electrical DC bus characteristics for the trolleybus. After a brief review, a development work process is presented, containing the design methodology with all needed mathematical expressions, simulations, control circuits, as well as a 3D Computer-Aided Designs... (Complete abstract click electronic access below) / Doutor

This Thesis addressed the challenge of ensuring balanced currents in the phases of a multi-kW, interleaved dc-dc converter by means of closed-loop digital control. The Thesis examines uniformly-sampled, valley-current, peak-current and average-current control for a dual interleaved boost converter with inter-phase transformer which might form part of the power train of an electric vehicle. Also, an enhancement of the average-current control is investigated in which the transistor duty-ratio is updated more rapidly, which allows an improvement of approximately ten times in the response speed of the system. Based on the theoretical analysis, the average-current control methodology was determined to be the most suitable technique for this type of converter as it ensures well-balanced phase currents over a wide range. To provide a basis for control system analysis and design for interleaved converters, a modelling methodology is developed based on a combination of multi-rate data-sampled theory and a small-signal averaged converter model. The model is shown to represent accurately the interaction between the interleaved phases, revealing a reduced stability range compared with a non-interleaved converter. The modelling and control methods are validated using switched and average value simulations obtained with the SABER software and by experimental results from a 25 kW, 30 kHz converter prototype. The control techniques were implemented on a Texas Instruments TMS320F28335 digital signal controller.

L'objectif de cette thèse est l'étude et la réalisation d'une nouvelle application des convertisseurs multicellulaires parallèles. Le but est de concevoir un système pouvant injecter des forts courants transitoires (milliers d'Ampères) dans l'âme conductrice de câbles haute tension à courant continu afin de mesurer la répartition des charges électriques dans l'isolant par la méthode de l'onde thermique. La structure proposée est basée sur la mise en parallèle de modules de convertisseurs DC/DC à phases couplées utilisant des transformateurs intercellules (ICT). La solution proposée permet de concevoir un dispositif à faible encombrement (portabilité). Une approche de dimensionnement des ICT cycliques basée sur la détermination d'un modèle analytique généralisé permettant de quantifier le flux et la densité de flux à travers le circuit magnétique, est présentée. Une méthode d'optimisation consistant en une permutation des ordres de commande des phases est utilisée pour réduire l'encombrement du coupleur magnétique. Un prototype de convertisseur multicellulaire utilisant un ICT cyclique planar de puissance a été réalisé. Il s'agit d'un module 12 phases, fonctionnant comme une source de courant régulé de 1200 A (grâce à une boucle de régulation de courant), et dont la puissance est de 30 KW. Des résultats expérimentaux validant la possibilité d'utiliser la solution proposée pour la caractérisation diélectrique des câbles haute tension à courant continu sont présentés dans le mémoire. / The purpose of this study is the design of a new application for parallel multi-cell converters. The aim is to setup a portable system that can inject a high current (several Amps current) within 2 s in the conducting core of a HVDC cable, and determinate the distribution of electrical space charge through the insulation using the Thermal Step Method (TSM). The proposed structure will be constituted of paralleled coupled multiphase buck converters using InterCell Transformers (ICT). A dimensioning theoretical approach of planar intercell transformer based on the magnetic core saturation condition is presented. The proposed method is based on calculating a generalized expression on the magnetic flux density matrix for any number of cells. Permutation method is used in order to reduce the magnetic core volume. Its principle is to reduce the flux concentration in the magnetic core by modifying the phase-shift of two successive cells.Finally, the experimental prototype (12-cells 30 kW power converter) using cyclic planar ICT is designed and tested. The converter is used to generate regulated current pulses of 1200 Amps (its operating mode is similar to a current source). Experimental results (thermal step current measurements) are includes in order to confirm the ability of using the proposed solution for power cable dielectric characterization.

This diploma thesis deals with DCE-MRI (Dynamic Contrast-Enhanced Magnetic Resonance Imaging) thus one of the contrast magnetic resonance imaging methods. It describes the principle of conventional continuous DCE-MRI, which uses single bolus of contrast agent and further it focuses on the dual bolus contrast agent techniques, especially the interleaved acquisition. The graphical interface for processing Bruker systems data was made. Synthetic data were used to evaluate the influence of this method on the perfusion parameters estimation. Simulations proved that the further the second bolus is from the first one, the better results are. Simulations of acquisition interruption did not lead to the clear result. However, two statements, which are expected to lead to as good estimation of perfusion parameters as possible, were formulated

Los cl'usters de computadores representan una soluci'on alternativa a los supercomputadores. En este tipo de sistemas, se suele restringir el espacio de direccionamiento de memoria de un procesador dado a la placa madre local. Restringir el sistema de esta manera es mucho m'as barato que usar una implementaci'on de memoria compartida entre las placas. Sin embargo, las diferentes necesidades de memoria de las aplicaciones que se ejecutan en cada placa pueden dar lugar a un desequilibrio en el uso de memoria entre las placas. Esta situaci'on puede desencadenar intercambios de datos con el disco, los cuales degradan notablemente las prestaciones del sistema, a pesar de que pueda haber memoria no utilizada en otras placas. Una soluci'on directa consiste en aumentar la cantidad de memoria disponible en cada placa, pero el coste de esta soluci'on puede ser prohibitivo. Por otra parte, el hardware de acceso a memoria remota (RMA) es una forma de facilitar interconexiones r'apidas entre las placas de un cl'uster de computadores. En trabajos recientes, esta caracter'¿stica se ha usado para aumentar el espacio de direccionamiento en ciertas placas. En este trabajo, la m'aquina base usa esta capacidad como mecanismo r'apido para permitir al sistema operativo local acceder a la memoria DRAM instalada en una placa remota. En este contexto, una plani¿caci'on de memoria e¿ciente constituye una cuesti'on cr'¿tica, ya que las latencias de memoria tienen un impacto importante sobre el tiempo de ejecuci'on global de las aplicaciones, debido a que las latencias de memoria remota pueden ser varios 'ordenes de magnitud m'as altas que los accesos locales. Adem'as, el hecho de cambiar la distribuci'on de memoria es un proceso lento que puede involucrar a varias placas, as'¿ pues, el plani¿cador de memoria ha de asegurarse de que la distribuci'on objetivo proporciona mejores prestaciones que la actual. La presente disertaci'on pretende abordar los asuntos mencionados anteriormente mediante la propuesta de varias pol'¿ticas de plani¿caci'on de memoria. En primer lugar, se presenta un algoritmo ideal y una estrategia heur'¿stica para asignar memoria principal ubicada en las diferentes regiones de memoria. Adicionalmente, se ha dise¿nado un mecanismo de control de Calidad de Servicio para evitar que las prestaciones de las aplicaciones en ejecuci'on se degraden de forma inadmisible. El algoritmo ideal encuentra la distribuci'on de memoria 'optima pero su complejidad computacional es prohibitiva dado un alto n'umero de aplicaciones. De este inconveniente se encarga la estrategia heur'¿stica, la cual se aproxima a la mejor distribuci'on de memoria local y remota con un coste computacional aceptable. Los algoritmos anteriores se basan en pro¿ling. Para tratar este defecto potencial, nos centramos en soluciones anal'¿ticas. Esta disertaci'on propone un modelo anal'¿tico que estima el tiempo de ejecuci'on de una aplicaci'on dada para cierta distribuci'on de memoria. Dicha t'ecnica se usa como un predictor de prestaciones que proporciona la informaci'on de entrada a un plani¿cador de memoria. El plani¿cador de memoria usa las estimaciones para elegir din'amicamente la distribuci'on de memoria objetivo 'optima para cada aplicaci'on que se est'e ejecutando en el sistema, de forma que se alcancen las mejores prestaciones globales. La plani¿caci'on a granularidad m'as alta permite pol'¿ticas de plani¿caci'on m'as simples. Este trabajo estudia la viabilidad de plani¿car a nivel de granularidad de p'agina del sistema operativo. Un entrelazado convencional basado en hardware a nivel de bloque y un entrelazado a nivel de p'agina de sistema operativo se han tomado como esquemas de referencia. De la comparaci'on de ambos esquemas de referencia, hemos concluido que solo algunas aplicaciones se ven afectadas de forma signi¿cativa por el uso del entrelazado a nivel de p'agina. Las razones que causan este impacto en las prestaciones han sido estudiadas y han de¿nido la base para el dise¿no de dos pol'¿ticas de distribuci'on de memoria basadas en sistema operativo. La primera se denomina on-demand (OD), y es una estrategia simple que funciona colocando las p'aginas nuevas en memoria local hasta que dicha regi'on se llena, de manera que se bene¿cia de la premisa de que las p'aginas m'as accedidas se piden y se ubican antes que las menos accedidas para mejorar las prestaciones. Sin embargo, ante la ausencia de dicha premisa para algunos de los benchmarks, OD funciona peor. La segunda pol'¿tica, denominada Most-accessed in-local (Mail), se propone con el objetivo de evitar este problema. / Cluster computers represent a cost-effective alternative solution to supercomputers. In these systems, it is common to constrain the memory address space of a given processor to the local motherboard. Constraining the system in this way is much cheaper than using a full-fledged shared memory implementation among motherboards. However, memory usage among motherboards may be unfairly balanced depending on the memory requirements of the applications running on each motherboard. This situation can lead to disk-swapping, which severely degrades system performance, although there may be unused memory on other motherboards. A straightforward solution is to increase the amount of available memory in each motherboard, but the cost of this solution may become prohibitive. On the other hand, remote memory access (RMA) hardware provides fast interconnects among the motherboards of a cluster computer. In recent works, this characteristic has been used to extend the addressable memory space of selected motherboards. In this work, the baseline machine uses this capability as a fast mechanism to allow the local OS to access to DRAM memory installed in a remote motherboard. In this context, efficient memory scheduling becomes a major concern since main memory latencies have a strong impact on the overall execution time of the applications, provided that remote memory accesses may be several orders of magnitude higher than local accesses. Additionally, changing the memory distribution is a slow process which may involve several motherboards, hence the memory scheduler needs to make sure that the target distribution provides better performance than the current one. This dissertation aims to address the aforementioned issues by proposing several memory scheduling policies. First, an ideal algorithm and a heuristic strategy to assign main memory from the different memory regions are presented. Additionally, a Quality of Service control mechanism has been devised in order to prevent unacceptable performance degradation for the running applications. The ideal algorithm finds the optimal memory distribution but its computational cost is prohibitive for a high number of applications. This drawback is handled by the heuristic strategy, which approximates the best local and remote memory distribution among applications at an acceptable computational cost. The previous algorithms are based on profiling. To deal with this potential shortcoming we focus on analytical solutions. This dissertation proposes an analytical model that estimates the execution time of a given application for a given memory distribution. This technique is used as a performance predictor that provides the input to a memory scheduler. The estimates are used by the memory scheduler to dynamically choose the optimal target memory distribution for each application running in the system in order to achieve the best overall performance. Scheduling at a higher granularity allows simpler scheduler policies. This work studies the feasibility of scheduling at OS page granularity. A conventional hardware-based block interleaving and an OS-based page interleaving have been assumed as the baseline schemes. From the comparison of the two baseline schemes, we have concluded that only the performance of some applications is significantly affected by page-based interleaving. The reasons that cause this impact on performance have been studied and have provided the basis for the design of two OS-based memory allocation policies. The first one, namely on-demand (OD), is a simple strategy that works by placing new pages in local memory until this region is full, thus benefiting from the premise that most of the accessed pages are requested and allocated before than the least accessed ones to improve the performance. Nevertheless, in the absence of this premise for some benchmarks, OD performs worse. The second policy, namely Most-accessed in-local (Mail), is proposed to avoid this problem / Serrano Gómez, M. (2013). Scheduling Local and Remote Memory in Cluster Computers [Tesis doctoral]. Editorial Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/31639 / Alfresco