International Telemetering Conference Proceedings / October 25-28, 1999 / Riviera Hotel and Convention Center, Las Vegas, Nevada / The U.S. Army’s Hardened Subminiature Telemetry and Sensor Systems (HSTSS) program has engaged the M/A-COM Corporation to work in the development of a highly accurate, crystal controlled telemetry transmitter chip set to be used in Army and other U.S. military munitions. A critical factor in this work is the operating environment of up to 100,000-g launch accelerations. To support the Army in this project, M/A-COM is developing integrated Voltage Controlled Oscillators (VCO) for L and S band, a silicon synthesizer/phase locked loop (PLL) IC, and a family of power amplifiers. Lastly, the transmitter module will be miniaturized and hardened using M/A-COM’s latest chip-onboard mixed technology manufacturing capabilities. This new chip set will provide the telemetry engineer with unprecedented design flexibility. This paper will review the overall transmitter system design and provide an overview for each functional integrated circuit.

Bakgrund: Patienter som ofta vårdas inom den psykiatriska slutenvården är patienter med psykotiska störningar, depression och patienter med risk för självmord. Tvångsåtgärder som kan förekomma på en psykiatrisk vårdavdelning kan exempelvis vara bältesläggning, tvångsmedicinering och isolering. För att en sjuksköterska ska kunna vårda dessa patienter behövs såväl kunskap som förståelse. För att axla denna roll behöver sjuksköterskor mer forskning som är fokuserad på patienters erfarenheter. Syfte: Syftet med studien var att beskriva patienters erfarenheter av sluten psykiatrisk tvångsvård samt att beskriva de inkluderade artiklarnas urvalsmetod och undersökningsgrupp. Metod: Litteraturstudien genomfördes med en beskrivande design. Studien innefattas av elva stycken kvalitativa vetenskapliga artiklar som svarar på studiens syfte. Resultat: Fem teman var grunden till beskrivningen av denna litteraturstudie: Betydelsen av relationen till vårdpersonalen, Betydelsen av information, Förståelsen av att vårdas mot sin vilja, Erfarenheter av tvångsåtgärder samt Erfarenheter av vårdmiljön. Resultatet avslutas med en beskrivning av artiklarnas urvalsmetod och urvalsgrupp. Slutsats: Patienter beskrev både bra och dåliga erfarenheter av sluten psykiatrisk tvångsvård. Viktiga aspekter som framgick enligt patienterna var: God information, god relation till vårdpersonal, förståelse samt en god vårdmiljö. Det är av stor vikt att sjuksköterskan har god kunskap om patienters erfarenheter för att kunna ge så god omvårdnad som möjligt. / Background: Patient who is treated in a locked psychiatric coercive care unit is patient with psychotic disorders, depression and patients with risk for suicide. Coercive measures that may be present in a psychiatric ward could be, for example medical restraint, forced medication and isolation. For a nurse to be able to care this patients who is in a need for good care it´s important with knowledge and understanding. To handle this role, nurses need more research and focus at the experiences of patients. Purpose: The aim of this study was to describe patient´s experience of a locked psychiatric coercive care unit. Present the selected articles' selection method and study group. Method: This is a literature study with a descriptive design. In this study eleven articles of qualitative approach are included to answer to the purpose of this study. Results: The result is based on five themes: Significance of relationship with health professionals, Significance of information, Understandning of being cared against their own will, Experience of being cared under coercion and Experience of the care environment. The last part om the result descibe the selctions method and the of the study group of the article. Conclusion: Patients described both good and bad experiences of locked psychiatric care. According to the patient important aspects was: Good information, Good Relationships with the health professionals and understanding, God care environment. It´s of great importance that the nurses have good knowledge about patients experience to be able to give such good nursing care as possible.

International Telemetering Conference Proceedings / October 21, 2002 / Town & Country Hotel and Conference Center, San Diego, California / M/A-COM, Inc. has previously developed a highly integrated transmitter chip set for wireless telemetry applications for the military L and S band frequencies and the commercial 2.4GHz ISM band. The original chip set is comprised of a voltage controlled oscillator (VCO), a silicon phase locked loop (PLL), and a family of power amplifiers (PA's). Using these components, M/A-COM has produced a miniature IRIG-compliant transmitter module, which has been flight-tested by the U.S. Army’s Hardened Subminiature Telemetry and Sensor System (HSTSS) program. Since the initial offering, several product enhancements have been added. The module performance has been improved by tailoring the VCO specifically for direct frequency modulation applications. In addition to improving noise performance, these enhancements have produced improved modulation linearity, decreased lock time and increased carrier stability. Modulation rates in excess of 10Mbps have been demonstrated. High efficiency power amplifiers operating at 3V have also been added to the family of amplifiers (PAE > 50%). This greatly enhanced efficiency allows higher RF power output while maintaining the same miniature form factor for the transmitter. Further, M/A-COM has added a silicon-on-sapphire PLL to the chip set, which operates at frequencies up to 3.0GHz. This paper details the enhancements to the components within the chip set, and the improvement in performance of the transmitter module. Test data is presented for the transmitter modules and individual components.

Thesis (MScEng (Electrical and Electronic Engineering))--Stellenbosch University, 2008. / This thesis discusses the design, development and measured results of a phase-locked loop based frequency synthesiser for X-band Doppler radar. The objective is to obtain phase noise comparable or lower than that typically achieved with direct analogue frequency synthesis techniques. To meet this objective, a theoretical study of the noise contributions of individual components of the synthesiser and their effect on the total phase noise within and outside the loop bandwidth of the PLL is performed. The effect of different phase margins on the closed-loop frequency response of the PLL, and hence the total phase noise, is investigated. Based on the results, an optimal phase-frequency detector reference frequency, loop bandwidth, adequate phase margin, and suitable components are chosen for optimal phase noise performance. The total phase noise at the output of the synthesiser is calculated and it is shown that the phase noise specification can be met. A significant part of this thesis is devoted to the design, modelling and characterisation of a frequency multiplier, as well as to a combline and interdigital bandpass filter required for the frequency synthesiser. In the first case, a piecewise linear circuit model is used to model the behaviour of the nonlinear multiplier circuit. Fourier theory is used to calculate the large-signal driving point input and output impedances of the nonlinear circuit, enabling the computation of the circuit elements for the input and output matching networks. The measured response of the frequency multiplier under various different operating conditions is presented and discussed. The design of the microwave bandpass filters is based on the theory of coupling and external quality factors. To aid in the verification and optimisation of the design, a software simulation tool is used. The presented S-parameter measurements of the filters show how well the theory matches with what is obtained in practice. The measured spectral and phase noise response of various components comprising the synthesiser, are discussed. These measurements provide insight into the response of individual components under different operating conditions and show the behaviour of important subsystems of the synthesiser. The thesis culminates in the presentation of the measured phase noise of the complete synthesiser. It is shown how well the measured phase noise correlates with the calculated phase noise. In addition, the measured spectral content and transient behaviour of the synthesiser are investigated and discussed. High power spurious components at some output frequencies are indentified and reduced. The feasibility of using the developed prototype phase-locked loop based frequency synthesiser for coherent X-band Doppler radar is discussed and demonstrated.

High speed serial links are critical components for addressing the growing demand for I/O bandwidth in next-generation computing applications, such as many-core systems, backplane and optical data communications. Due to continued process scaling and circuit innovations, today's CMOS serial link transceivers can achieve tens of Gb/s per pin. However, most of their reported power efficiency improves much slower than the rise of data rate. Therefore, aggregate I/O power is increasing and will exceed the power budget if the trend for more off-chip bandwidth is sustained. In this work, a system level statistical analysis of serial links is first described, and compares the link performance of Non-Return-to-Zero (2-PAM) with higher-order modulation (duobinary) signaling schemes. This method enables fast and accurate BER distribution simulation of serial link transceivers that include channel and circuit imperfections, such as finite pulse rise/fall time, duty cycle variation, and both receiver and transmitter forwarded-clock jitter. Second, in order to address link power efficiency, two test chips have been implemented. The first one describes a quad-lane, 6.4-7.2 Gb/s serial link receiver prototype using a forwarded clock architecture. A novel phase deskew scheme using injection-locked ring oscillators (ILRO) is proposed that achieves greater than one UI of phase shift for multiple clock phases, eliminating phase rotation and interpolation required in conventional architectures. Each receiver, optimized for power efficiency, consists of a low-power linear equalizer, four offset-cancelled quantizers for 1:4 demultiplexing, and an injection-locked ring oscillator coupled to a low-voltage swing, global clock distribution. Measurement results show a 6.4-7.2Gb/s data rate with BER < 10⁻¹² across 14 cm of PCB, and an 8Gb/s data rate through 4cm of PCB. Designed in a 1.2V, 90nm CMOS process, the ILRO achieves a wide tuning range from 1.6-2.6GHz. The total area of each receiver is 0.0174mm², resulting in a measured power efficiency of 0.6mW/Gb/s. Improving upon the first test chip, a second test chip for 8Gb/s forwarded clock serial link receivers exploits a low-power super-harmonic injection-locked ring oscillator for symmetric multi-phase local clock generation and deskewing. Further power reduction is achieved by designing most of the receiver circuits in the near-threshold region (0.6V supply), with the exception of only the global clock buffer, test buffers and synthesized digital test circuits at nominal 1V supply. At the architectural level, a 1:10 direct demultiplexing rate is chosen to achieve low supply operation by exploiting high-parallelism. Fabricated in 65nm CMOS technology, two receiver prototypes are integrated in this test chip, one without and the other with front-end boot-strapped S/Hs. Including the amortized power of global clock distribution, the proposed serial link receivers consume 1.3mW and 2mW respectively at 8Gb/s input data rate, achieving a power efficiency of 0.163mW/Gb/s and 0.25mW/Gb/s. Measurement results show both receivers achieve BER < 10⁻¹² across a 20-cm FR4 PCB channel. / Graduation date: 2012

In this dissertation, an all-fiber-based single frequency nanosecond pulsed laser system at ~ 1918.4 nm in master-oscillator-power-amplifier (MOPA) configuration is present. The nanosecond pulse seed is achieved by directly modulating a continuous wave (CW) single frequency fiber laser using a fast electro-optical modulator (EOM) driven by an arbitrary waveform generator (AWG). One piece of single mode, large core, polarization-maintaining (PM) highly thulium-doped (Tm-doped) germanate glass fiber (LC-TGF) is used to boost the pulse power and pulse energy of these modulated pulses in the final power amplifier. This laser system can work in both high power and high energy regime: in high power regime, to the best of our knowledge, the highest average power 16 W and peak power 78.1 kW are achieved for single frequency transform-limited ~2.0 ns pulses at 500 kHz and 100 kHz repetition rate, respectively: In high energy regime, nearly 1 mJ and half mJ pulse energy is obtained for ~15 ns pulses at 1 kHz repetition rate and 5 kHz repetition rate, respectively. Theoretical modeling of the large-core highly Tm-doped germanate glass double-cladding fiber amplifier (LC-TG-DC-FA) is also present for 2&mum nanosecond pulse amplification. A good agreement between the theoretical and experimental results is achieved. The model can simulate the evolution of pump power, signal energy, pulse shape and the amplified stimulated emission (ASE) in the amplifier. It can also be utilized to investigate the dependence of the stored energy in the LC-TGF on the pump power, seed energy and repetition rate, which can be used to design and optimize the LC-TG-DC-FA to achieve higher pulse energy and average power. Two channel of high energy nanosecond pulses (at 1918.4 nm and 1938 nm) are utilized to generate THz wave in a quasi-phase-matched (QPM) gallium arsenide (GaAs) based on difference frequency generation. THz wave with ~ 5.4μW average power and ~18 mW peak power has been achieved. Besides, one model is built to simulate a singly resonated THz parametric oscillator. The threshold, the dependence of output THz energy on pump energy has been investigated through this model. One pump enhanced THz parametric oscillator has been proposed. The enhancement factor of the nanosecond pulses in a bow-tie ring cavity has been calculated for different pulse duration, cavity length and the transmission of the coupler. And the laser resonances in the ring cavity have been observed by using a piezo to periodically adjust the cavity length. We also build an all-fiber thulium-doped wavelength tunable mode-locked laser operating near 2&mum. Reliable self-starting mode locking over a large tuning range (>50 nm) using fiber taper based carbon nanotube (FTCNT) saturable absorber (SA) is observed. Spectral tuning is achieved by stretching another fiber taper. To the best of our knowledge, this is the first demonstration of an all-fiber wavelength tunable mode-locked laser near 2&mum.

Mixed-signal designs are becoming more and more complex every day. In order to adapt to the new market requirements, a formal process for design and verification of mixed signal systems i. e. top-down design and bottom-up verification methodology is required. This methodology has already been established for digital design. The goal of this research is to propose a new design methodology for mixed signal systems. In the first two chapters of this thesis, the need for a mixed signal design flow based on top-down design methodology will be discussed. The proposed design flow is based on behavioral modeling of the mixed signal system using one of the mixed signal behavioral modeling languages. These models can be used for design and verification through different steps of the design from system level modeling to final physical design. The other advantage of the proposed flow is analog and digital co-design. In the remaining chapters of this thesis, the proposed design flow was verified by designing an 800 MHz mixed signal PLL. The PLL uses a charge pump phase frequency detector, a single capacitor loop filter, and a feed forward error correction architecture using an active damping control circuit instead of passive resistor in loop filter. The design was done in 0. 18- <i>??</i> m CMOS process technology.

The concern of this dissertation is the understanding and improvement of a class of lasers that is responsible for some of the shortest optical pulses available today. In particular, we seek ways to produce from synchronously pumped mode-locked dye laser systems, shorter pulses of higher intensity with improved pulse-to-pulse consistency. Specific topics.that are discussed herein include the study of the role of the pump pulse in synchronously pumped mode-locked lasers, the study of the pulse shaping and shortening due to an intracavity saturable absorber, and the study of a fundamental pulse train instability associated with these lasers.

A dual-wavelength mode-locked semiconductor vertical-external-cavity-surface-emitting laser is demonstrated. A semiconductor saturable absorber mirror allows for simultaneous mode locking of pulses centered at two center wavelengths with variable frequency spacing. The difference-frequency control is achieved with an intracavity etalon. Changing the finesse of the etalon enables the adjustment of the pulse duration between 6 and 35 ps. The emitted two-color pulses are modulated by a beat frequency in the terahertz range. Self-starting mode-locking with 0.8-W average output power is demonstrated.

Phased array radar systems employ multiple antennas to create a radar beam that can be steered electronically. By manipulating the relative phase values of feeding signals among different antennas, the effective radiation pattern of the array can be synthesized to enhance the main lobe in a desired direction while suppressing the undesired side lobes in other directions. Hence the radar scanning angles can be electronically controlled without employing the bulky mechanical gimbal structure, which can significantly reduce radar system size, weight and power consumption. In recent years, phased array technologies have received great attentions and are explored in developing many new applications, such as smart communication systems, military radars, vehicular radar, etc. Most of these systems are narrow band systems, where the phase delays are realized with narrow band phase shifter circuits. For the impulse ground penetrating radar however, its operating frequency spans an ultrawide bandwidth. Therefore the traditional phase shifters are not applicable due to their narrow band nature. To resolve the issue, in this study, a true time delay approach is explored which can precisely control time delays for the feeding pulse signals among different antennas in the array. In the design, an on chip programmable delay generator is being developed using Global Foundry 0.18 µm 7 HV high voltage CMOS process. The time delay control is realized by designing a programmable phase locked loop (PLL) circuit which can generate true time delays ranging from 100 ps (picoseconds) to 500 ps with the step size of 25 ps. The PLL oscillator's frequency is programmable from 100MHz to 500MHz through two reconfigurable frequency dividers in the feedback loop. As a result, the antenna beam angle can be synthesized to change from 9.59° to 56.4° with a step of 2.75°, and the 3dB beamwidth is 10°. The power consumption of the time delay circuit is very low, where the supply voltage is 1.8V and the average current is as low as 472uA.