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This thesis describes the design, implementation and testing of a UHF frequency synthesizer. The synthesizer is designed to provide a sine wave output programmable from 400 MHz to 500 MHz in 0.1 MHz increments. The synthesis technique utilized is Digital Coherent Indirect Synthesis. This technique uses phase locking to provide a range of stable output frequencies all derived from a single crystal reference. Component design and system level analysis are presented in detail.

<p> The potential of a mode-locked semiconductor laser oscillator as a short pulse source for two-photon fluorescence microscopy is explored. Amplification of the 1075 nrn laser is performed with a single pass semiconductor optical amplifier or a ytterbium-doped fibre amplifier. The mode-locked diode oscillator amplified by the Yb-doped fibre amplifier has been shown to produce uncompressed pulses of 4-10 ps with an average power of up to ~0.8 W. Compression with a single pass modified grating pair compressor reduces the pulse duration to as short as 860 fs. The output power level can be easily scaled to higher values. </p> <p> The ability to tightly focus the Yb-doped fibre amplifier beam and semiconductor optical amplifier beam for the purpose of microscopy is studied. Results indicate that the fibre performs close to an ideal Gaussian laser beam source. The semiconductor optical amplifier beam does not focus as well. Measurements suggest that regions of the beam, when focused, do not significantly contribute to the generation of two-photon fluorescence. </p> <p> The efficiency of two-photon fluorescence generation of the two amplifiers is compared to that of the conventional two-photon excitation source: the mode-locked titanium sapphire laser. Results illustrate the need to improve certain operating parameters of the laser oscillator and two amplifiers to be considered practical for two-photon fluorescence microscopy. The mode-locked semiconductor laser oscillator amplified by the Yb-doped fibre amplifier is deemed to be close to being ready for two-photon imaging applications. </p> / Thesis / Master of Applied Science (MASc)

It is the responsibility of pavement engineers to design pavements that provide safe and smooth riding surfaces over their entire life cycle. Each year many people around the world lose their lives in vehicle crashes, which are one of the leading causes of death in the United States (US). One of the contributing factors in many of these crashes is inappropriate friction between tires and the pavement. To minimize the impact of this factor, state Departments of Transportation (DOTs) must monitor the friction of their pavement networks systematically and regularly. Several devices are used around the world for measuring friction. Locked-wheel skid trailers are the predominant technology for roadways in the U.S. However, Continues Friction Measuring Equipment (CFME) is emerging as a practical alternative, especially for network-level monitoring. This type of technology has been used for monitoring runway friction for many years and is starting to be used also for measuring roadway friction. This thesis evaluates the different operational characteristics of CFME to provide guidelines for highway agencies interested in using this technology for supporting their friction management programs. It follows a manuscript format and is composed of two papers. The first part of the thesis presents a methodology to objectively synchronize and compare CFME measurements using cross-correlation. This methodology allows for comparing the “shape” of the friction profiles, instead of only the average friction values. The methodology is used for synchronizing friction measurements and assessing the repeatability and reproducibility of the CFME using friction measurements taken on a wide range of surfaces at the Virginia Smart Road. The proposed approach provides highway agencies with a rigorous method to process CFME measurements. The second part of the thesis evaluates the impact of several operational characteristics on the CFME measurements using a field experiment. The results of the experiment confirmed that the measurements are significantly affected by (1) the direction of testing while testing on sections of road with a significant grade, (2) water film thickness, and (3) testing speed. The experiment showed that measurements taken downhill on a 6% grade were significantly higher than those taken uphill. The analysis also verified that, consistent with previous studies, the measured friction decreases with higher water depth and testing speeds. It also showed that the change of friction with speed is approximately linear over the range of speeds used in the experiment. In general, the thesis results suggest that CFME can provide repeatable and reproducible friction profiles that can be used to support friction management programs and other asset management business functions. However, care should be taken with regard to the operational conditions during testing since the measurements are affected by several factors. Further research is needed to (1) quantify the effect of these, and potentially other, operational factors; and (2) establish standard testing condition and approaches for correcting measurements taken under other conditions. / Master of Science

The recent trend in the RF and microwave industry has been a move towards increasing the number of components realized on one radio frequency integrated circuit (RFIC) (or microwave integrated circuit (MIC)). This trend has resulted in complex RFICs which often require reactive as well as other circuit components to be supplied in the form of an external circuit. Because the manufacturer's suggested circuit is often developed with a specific application in mind, the same circuit may not satisfy the demands of another application. Provided the necessary functionality and connections are possible, the external circuit may be altered such that the requirements of the other application can be met, thus extending the flexibility of the RFIC. The work presented here is focused on investigating modifications to RF Microdevices' suggested external circuit for the RF29X5 family of low cost, half duplex, FM/AM/ASK/FSK RFIC transceivers originally intended for operation in the 433, 868, or 902-928 MHz industrial, scientific, and measurement (ISM) bands. Examinations of the operating principles of the transceiver components were performed which facilitated the identification of suitable modifications. Among the modifications identified were implementation of a phase locked detector, various methods for extending the FSK data rate limitations of the transmitter, improving the phase noise of the VCO, and the implementation of a fractional-N synthesizer using the RF2905 internal phase-locked loop (PLL) components and external inexpensive logic circuits. In addition to these modifications to the external circuit, the investigation of the oscillators of the RF2905 resulted in a potentially improved implementation of the VCO by modifying the internal active circuitry as well. / Master of Engineering

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A Delay-Locked Loop (DLL) for the generation of multiple clock phases/delays is proposed. Several new techniques are used to help enhance the DLLs performance, specifically, to achieve wide lock range, short locking time, and reduced jitter. The DLL can be used for a variety of applications which require precise time intervals or phase shifts. The phase detector (PD), charge pump (CP), and voltage-controlled delay line (VCDL) are the three most important blocks in a DLL. In our research, we have proposed a novel structure which integrates the functionality of both the PD and CP. By using this structure, a fast switching speed can be achieved. Moreover, the combined PD and CP also lead to reduced chip area and better jitter performance. A novel phase detection algorithm is developed and implemented in the combined PD and CP structure. This algorithm also involves a start-control circuit to avoid locking failure or false lock to harmonics. With the help of this algorithm, the proposed DLL is able to achieve lock as long as the minimum VCDL delay is less than one reference clock cycle, which is the largest possible lock range that can be achieved by the DLL. The VCDL uses fully differential signaling to minimize jitter. The delay stage of the VCDL is built with a differential topology using symmetrical loads and replica-feedback biasing, which provides a low sensitivity to supply and substrate noise as well as a wide tuning range. In addition, a shift-averaging technique is used to improve the matching between delay stages and thus to equalize the delay of each individual stage.

Traditional implementations of optical receivers are designed to operate with external photodetectors or require integration in a hybrid technology. By integrating a CMOS photodetector monolithically with an optical receiver, it can lead to the advantage of speed performance and cost. This dissertation describes the implementation of a photodetector in CMOS technology and the design of an optical receiver front-end and a clock and data recovery system. The CMOS detector converts the light input into an electrical signal, which is then amplified by the receiver front-end. The recovery system subsequently processes the amplified signal to extract the clock signal and retime the data. An inductive peaking methodology has been used extensively in the front-end. It allows the accomplishment of a necessary gain to compensate for an underperformed responsivity from the photodetector. The recovery circuits based on a nonlinear circuit technique were designed to detect the timing information contained in the data input. The clock and data recovery system consists of two units viz. a frequency-locked loop and a phase-locked loop. The frequency-locked loop adjusts the oscillator’s frequency to the vicinity of data rate before phase locking takes place. The phase-locked loop detects the relative locations between the data transition and the clock edge. It then synchronises the input data to the clock signal generated by the oscillator. A system level simulation was performed and it was found to function correctly and to comply with the gigabit fibre channel specification. / Dissertation (MEng (Micro-Electronics))--University of Pretoria, 2007. / Electrical, Electronic and Computer Engineering / unrestricted