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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
31

Robust Wireless Communications with Applications to Reconfigurable Intelligent Surfaces

Buvarp, Anders Martin 12 January 2024 (has links)
The concepts of a digital twin and extended reality have recently emerged, which require a massive amount of sensor data to be transmitted with low latency and high reliability. For low-latency communications, joint source-channel coding (JSCC) is an attractive method for error correction coding and compared to highly complex digital systems that are currently in use. I propose the use of complex-valued and quaternionic neural networks (QNN) to decode JSCC codes, where the complex-valued neural networks show a significant improvement over real-valued networks and the QNNs have an exceptionally high performance. Furthermore, I propose mapping encoded JSCC code words to the baseband of the frequency domain in order to enable time/frequency synchronization as well as to mitigate fading using robust estimation theory. Additionally, I perform robust statistical signal processing on the high-dimensional JSCC code showing significant noise immunity with drastic performance improvements at low signal-to-noise ratio (SNR) levels. The performance of the proposed JSCC codes is within 5 dB of the optimal performance theoretically achievable and outperforms the maximum likelihood decoder at low SNR while exhibiting the smallest possible latency. I designed a Bayesian minimum mean square error estimator for decoding high-dimensional JSCC codes achieving 99.96% accuracy. With the recent introduction of electromagnetic reconfigurable intelligent surfaces (RIS), a paradigm shift is currently taking place in the world of wireless communications. These new technologies have enabled the inclusion of the wireless channel as part of the optimization process. In order to decode polarization-space modulated RIS reflections, robust polarization state decoders are proposed using the Weiszfeld algorithm and an generalized Huber M-estimator. Additionally, QNNs are trained and evaluated for the recovery of the polarization state. Furthermore, I propose a novel 64-ary signal constellation based on scaled and shifted Eisenstein integers and generated using media-based modulation with a RIS. The waveform is received using an antenna array and decoded with complex-valued convolutional neural networks. I employ the circular cross-correlation function and a-priori knowledge of the phase angle distribution of the constellation to blindly resolve phase offsets between the transmitter and the receiver without the need for pilots or reference signals. Furthermore, the channel attenuation is determined using statistical methods exploiting that the constellation has a particular distribution of magnitudes. After resolving the phase and magnitude ambiguities, the noise power of the channel can also be estimated. Finally, I tune an Sq-estimator to robustly decode the Eisenstein waveform. / Doctor of Philosophy / This dissertation covers three novel wireless communications methods; analog coding, communications using the electromagnetic polarization and communications with a novel signal constellation. The concepts of a digital twin and extended reality have recently emerged, which require a massive amount of sensor data to be transmitted with low latency and high reliability. Contemporary digital communication systems are highly complex with high reliability at the expense of high latency. In order to reduce the complexity and hence latency, I propose to use an analog coding scheme that directly maps the sensor data to the wireless channel. Furthermore, I propose the use of neural networks for decoding at the receiver, hence using the name neural receiver. I employ various data types in the neural receivers hence leveraging the mathematical structure of the data in order to achieve exceptionally high performance. Another key contribution here is the mapping of the analog codes to the frequency domain enabling time and frequency synchronization. I also utilize robust estimation theory to significantly improve the performance and reliability of the coding scheme. With the recent introduction of electromagnetic reconfigurable intelligent surfaces (RIS), a paradigm shift is currently taking place in the world of wireless communications. These new technologies have enabled the inclusion of the wireless channel as part of the optimization process. Therefore, I propose to use the polarization state of the electromagnetic wave to convey information over the channel, where the polarization is determined using a RIS. As with the analog codes, I also extensively employ various methods of robust estimation to improve the performance of the recovery of the polarization at the receiver. Finally, I propose a novel communications signal constellation generated by a RIS that allows for equal probability of error at the receiver. Traditional communication systems utilize reference symbols for synchronization. In this work, I utilize statistical methods and the known distributions of the properties of the transmitted signal to synchronize without reference symbols. This is referred to as blind channel estimation. The reliability of the third communications method is enhanced using a state-of-the-art robust estimation method.
32

Ultra-reliable Low-latency, Energy-efficient and Computing-centric Software Data Plane for Network Softwarization

Xiang, Zuo 05 October 2022 (has links)
Network softwarization plays a significantly important role in the development and deployment of the latest communication system for 5G and beyond. A more flexible and intelligent network architecture can be enabled to provide support for agile network management, rapid launch of innovative network services with much reduction in Capital Expense (CAPEX) and Operating Expense (OPEX). Despite these benefits, 5G system also raises unprecedented challenges as emerging machine-to-machine and human-to-machine communication use cases require Ultra-Reliable Low Latency Communication (URLLC). According to empirical measurements performed by the author of this dissertation on a practical testbed, State of the Art (STOA) technologies and systems are not able to achieve the one millisecond end-to-end latency requirement of the 5G standard on Commercial Off-The-Shelf (COTS) servers. This dissertation performs a comprehensive introduction to three innovative approaches that can be used to improve different aspects of the current software-driven network data plane. All three approaches are carefully designed, professionally implemented and rigorously evaluated. According to the measurement results, these novel approaches put forward the research in the design and implementation of ultra-reliable low-latency, energy-efficient and computing-first software data plane for 5G communication system and beyond.
33

High-level modelling of optical integrated networks-based systems with the provision of a low latency controller

Magalh?es, Felipe Gohring de 25 May 2017 (has links)
Submitted by PPG Ci?ncia da Computa??o (ppgcc@pucrs.br) on 2017-11-13T21:02:54Z No. of bitstreams: 1 Felipe_Gohring_de_Magalh?es_TES.pdf: 7728697 bytes, checksum: f2b34275e49f32253d8c38848a3d9258 (MD5) / Approved for entry into archive by Caroline Xavier (caroline.xavier@pucrs.br) on 2017-11-21T12:14:27Z (GMT) No. of bitstreams: 1 Felipe_Gohring_de_Magalh?es_TES.pdf: 7728697 bytes, checksum: f2b34275e49f32253d8c38848a3d9258 (MD5) / Made available in DSpace on 2017-11-21T12:26:58Z (GMT). No. of bitstreams: 1 Felipe_Gohring_de_Magalh?es_TES.pdf: 7728697 bytes, checksum: f2b34275e49f32253d8c38848a3d9258 (MD5) Previous issue date: 2017-05-25 / Coordena??o de Aperfei?oamento de Pessoal de N?vel Superior - CAPES / As tend?ncias de design para os sistemas multiprocessadores da pr?xima gera??o apontam para a integra??o de um grande n?mero de n?cleos de processamento, exigindo interconex?es de alto desempenho. Uma solu??o a ser aplicada para melhorar a infraestrutura de comunica??o em tais sistemas ? o uso de redes on-chip, pois estas apresentam uma melhoria consider?vel na largura de banda e escalabilidade. Ainda assim, o n?mero de n?cleos integrados continua a aumentar ao mesmo tempo em que o sistema cresce, dessa maneira as interconex?es met?licas em redes on-chip podem tornar-se um gargalo no desempenho. Como resultado, uma nova estrat?gia deve ser adotada para que essas quest?es sejam solucionadas. As Redes ?pticas Integradas (do ingl?s Optical Integrated Networks - OINs) s?o atualmente consideradas como um dos paradigmas mais promissores neste contexto de design: elas apresentam maior largura de banda, menor consumo de energia e baixa lat?ncia para transmitir informa??es. Al?m disso, trabalho recentes demonstram a viabilidade de OINs com suas tecnologias de fabrica??o dispon?veis e compat?veis com CMOS. No entanto, os designers de OINs enfrentam v?rios desafios: ? Atualmente, os controladores representam o principal gargalo na comunica??o e s?o um dos fatores que limitam o uso de OINs. Portanto, novas solu??es de controle de baixa lat?ncia s?o necess?rias. ? Designers n?o possuem ferramentas para modelar e validar OINs. A maioria das pesquisas atualmente est? focada em projetar dispositivos e melhorar os componentes b?sicos, deixando o sistema sem melhorias. Neste contexto, para facilitar a implanta??o de sistemas baseados em OIN, este projeto de doutorado concentra-se em tr?s contribui??es principais: (1) o desenvolvimento da plataforma de simula??o a n?vel de sistema; (2) a defini??o e o desenvolvimento de uma abordagem de controle eficiente para sistemas baseados em OIN e; (3) a avalia??o, a n?vel do sistema, da abordagem de controle proposta usando a modelagem definida. / Design trends for next-generation Multi-Processor Systems point to the integration of a large number of processing cores, requiring high-performance interconnects. One solution being applied to improve the communication infrastructure in such systems is the usage of Networkson- Chip as they present considerable improvement in the bandwidth and scaleability. Still as the number of integrated cores continues to increase and the system scales, the metallic interconnects in Networks-on-Chip can become a performance bottleneck. As a result, a new strategy must be adopted in order for those issues to be remedied. Optical Integrated Networks (OINs) are currently considered to be one of the most promising paradigm in this design context: they present higher bandwidth, lower power consumption and lower latency to broadcast information. Also, the latest work demonstrates the feasibility of OINs with their fabrication technologies being available and CMOS compatible. However, OINs? designers face several challenges: ? Currently, controllers represent the main communication bottleneck and are one of the factors limiting the usage of OINs. Therefore, new controlling solutions with low latency are required. ? Designers lack tools to model and validate OINs. Most research nowadays is focused on designing devices and improving basic components performance, leaving system unattended. In this context, in order to ease the deployment of OIN-based systems, this PhD project focuses on three main contributions: (1) the development of accurate system-level modelling study to realize a system-level simulation platform; (2) the definition and development of an efficient control approach for OIN-based systems, and; (3) the system-level evaluation of the proposed control approach using the defined modelling.
34

Architektura pro rekonstrukci knihy objednávek s nízkou latencí / Low-Latency Architecture for Order Book Building

Závodník, Tomáš January 2016 (has links)
Information technology forms an important part of the world and algorithmic trading has already become a common concept among traders. The High Frequency Trading (HFT) requires use of special hardware accelerators which are able to provide input response with sufficiently low latency. This master's thesis is focused on design and implementation of an architecture for order book building, which represents an essential part of HFT solutions targeted on financial exchanges. The goal is to use the FPGA technology to process information about an exchange's state with latency so low that the resulting solution is effectively usable in practice. The resulting architecture combines hardware and software in conjunction with fast lookup algorithms to achieve maximum performance without affecting the function or integrity of the order book.
35

Sequential Codes for Low Latency Communications

Pin-Wen Su (18368931) 16 April 2024 (has links)
<p dir="ltr"> The general design goal of low latency communication systems is to minimize the end-to-end delay while attaining the predefined reliability and throughput requirements. The burgeoning demand for low latency communications motivates a renewed research interest of the tradeoff between delay, throughput, and reliability. In this dissertation research, we consider slotted-based systems and explore the potential advantages of the so-called sequential codes in low latency network communications.</p><p dir="ltr"> The first part of this dissertation analyzes the exact error probability of random linear streaming codes (RLSCs) in the large field size regime over the stochastic independently and identically distributed (i.i.d.) symbol erasure channels (SECs). A closed-form expression of the error probability <i>p</i><sub><em>e</em></sub> of large-field-size RLSCs is derived under, simultaneously, the finite memory length α and decoding deadline Δ constraints. The result is then used to examine the intricate tradeoff between memory length (complexity), decoding deadline (delay), code rate (throughput), and error probability (reliability). Numerical evaluation shows that under the same code rate and error probability requirements, the end-to-end delay of RLSCs is 40-48% of that of the optimal block codes (i.e., MDS codes). This implies that switching from block codes to streaming codes not only eliminates the queueing delay completely (which accounts for the initial 50% of the delay reduction) but also improves the reliability (which accounts for the additional 2-10% delay reduction).</p><p dir="ltr"> The second part of this dissertation focuses on the asymptotics of the error probability of RLSCs in the same system model of the first part. Two important scenarios are analyzed: (i) tradeoff between Δ and <i>p</i><sub><em>e</em></sub> under infinite α; and (ii) tradeoff between α and <i>p</i><sub><em>e</em></sub> under infinite Δ. In the first scenario, the asymptote of <i>p</i><sub><em>e</em></sub>(Δ) is shown to be <i>ρ</i>Δ<sup>-1.5</sup><i>e</i><sup>-</sup><sup><em>η</em></sup><sup>Δ</sup>. The asymptotic power term Δ<sup>-1.5</sup> of RLSCs is a strict improvement over the Δ<sup>-0.5</sup> term of random linear block codes. A pair of upper and lower bound on the asymptotic constant <i>ρ</i> is also derived, which are tight (i.e., identical) for one specific class of SECs. In the second scenario, a refine approximation is proposed by computing the parameters in a multiterm asymptotic form, which closely matches the exact error probability even for small memory length (≈ 20). The results of the asymptotics can be further exploited to find the <i>c</i>-optimal memory length <i>α</i><sub><em>c</em></sub><sup>*</sup>(Δ), which is defined as the minimal memory length α needed for the resulting <i>p</i><sub><em>e</em></sub> to be within a factor of <i>c</i>>1 of the best possible <i>p</i><sub><em>e</em></sub><sup><em>*</em></sup><sub><em> </em></sub>for any Δ, an important piece of information for practical implementation.</p><p dir="ltr"> Finally, we characterize the channel dispersions of RLSCs and MDS block codes, respectively. New techniques are developed to quantify the channel dispersion of sequential (non-block-based) coding, the first in the literature. The channel dispersion expressions are then used to compare the levels of error protection between RLSCs and MDS block codes. The results show that if and only if the target error probability <i>p</i><sub><em>e</em></sub> is smaller than a threshold (≈ 0.1774), RLSCs offer strictly stronger error protection than MDS block codes, which is on top of the already significant 50% latency savings of RLSCs that eliminate the queueing delay completely.</p>
36

Realizing Low-Latency Internet Services via Low-Level Optimization of NFV Service Chains : Every nanosecond counts!

Farshin, Alireza January 2019 (has links)
By virtue of the recent technological developments in cloud computing, more applications are deployed in a cloud. Among these modern cloud-based applications, some require bounded and predictable low-latency responses. However, the current cloud infrastructure is unsuitable as it cannot satisfy these requirements, due to many limitations in both hardware and software. This licentiate thesis describes attempts to reduce the latency of Internet services by carefully studying the currently available infrastructure, optimizing it, and improving its performance. The focus is to optimize the performance of network functions deployed on commodity hardware, known as network function virtualization (NFV). The performance of NFV is one of the major sources of latency for Internet services. The first contribution is related to optimizing the software. This project began by investigating the possibility of superoptimizing virtualized network functions(VNFs). This began with a literature review of available superoptimization techniques, then one of the state-of-the-art superoptimization tools was selected to analyze the crucial metrics affecting application performance. The result of our analysis demonstrated that having better cache metrics could potentially improve the performance of all applications. The second contribution of this thesis employs the results of the first part by taking a step toward optimizing cache performance of time-critical NFV service chains. By doing so, we reduced the tail latencies of such systems running at 100Gbps. This is an important achievement as it increases the probability of realizing bounded and predictable latency for Internet services. / Tack vare den senaste tekniska utvecklingen inom beräkningar i molnet(“cloud computing”) används allt fler tillämpningar i molnlösningar. Flera avdessa moderna molnbaserade tillämpningar kräver korta svarstider är låga ochatt dessa ska vara förutsägbara och ligga inom givna gränser. Den nuvarandemolninfrastrukturen är dock otillräcklig eftersom den inte kan uppfylla dessa krav,på grund av olika typer av begränsningar i både hårdvara och mjukvara. I denna licentiatavhandling beskrivs försök att minska fördröjningen iinternettjänster genom att noggrant studera den nuvarande tillgängligainfrastrukturen, optimera den och förbättra dess prestanda. Fokus ligger påatt optimera prestanda för nätverksfunktioner som realiseras med hjälp avstandardhårdvara, känt som nätverksfunktionsvirtualisering (NFV). Prestanda hosNFV är en av de viktigaste källorna till fördröjning i internettjänster. Det första bidraget är relaterat till att optimera mjukvaran. Detta projektbörjade med att undersöka möjligheten att “superoptimera” virtualiseradenätverksfunktioner (VNF). Detta inleddes med en litteraturöversikt av tillgängligasuperoptimeringstekniker, och sedan valdes ett av de toppmodernasuperoptimeringsverktygen för att analysera de viktiga mätvärden som påverkartillämpningssprestanda. Resultatet av vår analys visade att bättre cache-mätningar potentiellt skulle kunna förbättra prestanda för alla tillämpningar. Det andra bidraget i denna avhandling utnyttjar resultaten från den förstadelen genom att ta ett steg mot att optimera cache-prestanda för tidskritiskakedjor av NFV-tjänster. Genom att göra så reducerade vi de långa fördröjningarnahos sådana system som kördes vid 100 Gbps. Detta är en viktig bedrift eftersomdetta ökar sannolikheten för att uppnå en begränsad och förutsägbar fördrörninghos internettjänster. / <p>QC 20190415</p> / Time-Critical Clouds / ULTRA
37

Implementation and quantitative analysis of a real-time sound architecture

Voigt, Michael 16 April 2009 (has links) (PDF)
Several available free software audio solutions were analyzed, and Jackdmp—a C++ reimplementation of the renowned JACK Audio Connection Kit—was selected as the most appropriate solution for a real-time audio architecture on DROPS. The JACK sound architecture provides the lowest processing latency possible on a desktop computer for a given set of sound card parameters. It reduces the latency jitter caused by software to zero and synchronizes streams at sample accuracy. A real-time admission scheme for JACK clients is proposed. The execution time of different typical JACK clients was analyzed with measurements to validate the assumptions the proposal is based on, but also to gain further knowledge about their timing behavior. The measurements showed that the condition set by Paul Davis—the time to process a client must be a linear function of the buffer size—holds for all tested clients. Jackdmp was ported to DROPS. The developed design of the port and its implementation is documented here. Measurements showed that—although the real-time performance of the Linux kernel is continuously being improved in the mainline and on special external branches—DROPS can provide a signaling latency that is two times lower on average than the values that can be achieved on the same machine running with a low latency patched Linux kernel. Thus, it can be stated that DROPS is well-suited for real-time audio processing and that the pursued path to use it as the foundation of a truly real-time capable audio workstation should be followed. / Wenn man heute digitale Audiotechnik zum Aufnehmen oder Abmischen von Musik oder anderen Audiodaten verwenden möchte, steht man vor der Wahl, entweder auf eine sehr spezialisierte Hardwarelösung zurückzugreifen oder aber sich eines gewöhnlichen Desktopsystems mit entsprechender Audiosoftware zu bedienen. Der Vorteil eines Desktopsystems ist neben seinem deutlich niedrigeren Preis vor allem die Flexibilität. Bezüglich seines Echtzeitverhaltens bietet ein Computer mit einem Standard-Desktop-Betriebssystem aber bei weitem nicht dieselbe Verlässlichkeit einer spezialisierten Hardwarelösung oder analoger Technik. Die Architektur von DROPS --- mit dem echtzeitfähigen Fiasco- Mikrokern auf der einen Seite sowie der Unterstützung von Legacy-Anwendungen durch L4Linux auf der anderen Seite --- birgt die Hoffnung, die Vorteile von den beiden eben beschriebenen Welten auf einem System mit DROPS kombinieren zu können. Die Motivation meiner Arbeit war es, für dieses langfristige Ziel einen ersten Grundstein zu legen. Dazu war es meine Aufgabe, verschiedene Open-Source- Lösungen hinsichtlich ihrer Eignung als Echtzeit-Audioarchitektur für DROPS zu analysieren und die am besten geeignete auf L4Env zu portieren. Meine Wahl fiel dabei auf das in der Linux-Audio-Szene wohlbekannte Jack Audio Connection Kit (JACK). Desweiteren konnte ich in der Arbeit untersuchen, wie sich die JACK Audioarchitektur in ein globales Echtzeit-Scheduling --- z.B. eines von DROPS --- einbetten ließe, und schlage eine generische Methode dafür vor.
38

Implementation and quantitative analysis of a real-time sound architecture

Voigt, Michael 06 April 2009 (has links)
Several available free software audio solutions were analyzed, and Jackdmp—a C++ reimplementation of the renowned JACK Audio Connection Kit—was selected as the most appropriate solution for a real-time audio architecture on DROPS. The JACK sound architecture provides the lowest processing latency possible on a desktop computer for a given set of sound card parameters. It reduces the latency jitter caused by software to zero and synchronizes streams at sample accuracy. A real-time admission scheme for JACK clients is proposed. The execution time of different typical JACK clients was analyzed with measurements to validate the assumptions the proposal is based on, but also to gain further knowledge about their timing behavior. The measurements showed that the condition set by Paul Davis—the time to process a client must be a linear function of the buffer size—holds for all tested clients. Jackdmp was ported to DROPS. The developed design of the port and its implementation is documented here. Measurements showed that—although the real-time performance of the Linux kernel is continuously being improved in the mainline and on special external branches—DROPS can provide a signaling latency that is two times lower on average than the values that can be achieved on the same machine running with a low latency patched Linux kernel. Thus, it can be stated that DROPS is well-suited for real-time audio processing and that the pursued path to use it as the foundation of a truly real-time capable audio workstation should be followed. / Wenn man heute digitale Audiotechnik zum Aufnehmen oder Abmischen von Musik oder anderen Audiodaten verwenden möchte, steht man vor der Wahl, entweder auf eine sehr spezialisierte Hardwarelösung zurückzugreifen oder aber sich eines gewöhnlichen Desktopsystems mit entsprechender Audiosoftware zu bedienen. Der Vorteil eines Desktopsystems ist neben seinem deutlich niedrigeren Preis vor allem die Flexibilität. Bezüglich seines Echtzeitverhaltens bietet ein Computer mit einem Standard-Desktop-Betriebssystem aber bei weitem nicht dieselbe Verlässlichkeit einer spezialisierten Hardwarelösung oder analoger Technik. Die Architektur von DROPS --- mit dem echtzeitfähigen Fiasco- Mikrokern auf der einen Seite sowie der Unterstützung von Legacy-Anwendungen durch L4Linux auf der anderen Seite --- birgt die Hoffnung, die Vorteile von den beiden eben beschriebenen Welten auf einem System mit DROPS kombinieren zu können. Die Motivation meiner Arbeit war es, für dieses langfristige Ziel einen ersten Grundstein zu legen. Dazu war es meine Aufgabe, verschiedene Open-Source- Lösungen hinsichtlich ihrer Eignung als Echtzeit-Audioarchitektur für DROPS zu analysieren und die am besten geeignete auf L4Env zu portieren. Meine Wahl fiel dabei auf das in der Linux-Audio-Szene wohlbekannte Jack Audio Connection Kit (JACK). Desweiteren konnte ich in der Arbeit untersuchen, wie sich die JACK Audioarchitektur in ein globales Echtzeit-Scheduling --- z.B. eines von DROPS --- einbetten ließe, und schlage eine generische Methode dafür vor.
39

Low-Latency Hard Real-Time Communication over Switched Ethernet / Effiziente Echtzeitkommunikation über Switched Ethernet

Löser, Jork 01 January 2006 (has links) (PDF)
With the upsurge in the demand for high-bandwidth networked real-time applications in cost-sensitive environments, a key issue is to take advantage of developments of commodity components that offer a multiple of the throughput of classical real-time solutions. It was the starting hypothesis of this dissertation that with fine grained traffic shaping as the only means of node cooperation, it should be possible to achieve lower guaranteed delays and higher bandwidth utilization than with traditional approaches, even though Switched Ethernet does not support policing in the switches as other network architectures do. This thesis presents the application of traffic shaping to Switched Ethernet and validates the hypothesis. It shows, both theoretically and practically, how commodity Switched Ethernet technology can be used for low-latency hard real-time communication, and what operating-system support is needed for an efficient implementation.
40

Low-Latency Hard Real-Time Communication over Switched Ethernet

Löser, Jork 31 January 2006 (has links)
With the upsurge in the demand for high-bandwidth networked real-time applications in cost-sensitive environments, a key issue is to take advantage of developments of commodity components that offer a multiple of the throughput of classical real-time solutions. It was the starting hypothesis of this dissertation that with fine grained traffic shaping as the only means of node cooperation, it should be possible to achieve lower guaranteed delays and higher bandwidth utilization than with traditional approaches, even though Switched Ethernet does not support policing in the switches as other network architectures do. This thesis presents the application of traffic shaping to Switched Ethernet and validates the hypothesis. It shows, both theoretically and practically, how commodity Switched Ethernet technology can be used for low-latency hard real-time communication, and what operating-system support is needed for an efficient implementation.

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