Medium-voltage silicon carbide power devices, due to their higher operational temperature, higher blocking voltage, and faster switching speed, promise transformative possibilities for power electronics in grid-tied applications, thereby fostering a more sustainable, resilient, and reliable electric grid. The pursuit of increasing power density, however, escalates the blocking voltage and shrinks the module size, consequently posing unique insulation challenges for the medium voltage power module packaging. The state-of-the-art solutions, such as altering the geometry of the insulated-metal-substrates or thickening or stacking them, exhibit limited efficacy, inflate manufacturing costs, raise reliability concerns, and increase thermal resistance. This dissertation explores a material-based approach that utilizes a nonlinear resistive polymer nanocomposite field-grading coating to enhance insulation performance without compromising thermal performance for medium-voltage power modules. The studied polymer nanocomposite is a mutual effort of this research and NBE Technologies. Instead of using field-grading materials as encapsulation, a thin film coating (about 20 μm) can be achieved by painting the polymer nanocomposite solution to the critical regions to grade the electric field and extend the range of the applicability of the bulk encapsulation. A polymer nanocomposite's electrical properties were characterized and found theoretically and experimentally to be effective in improving the insulation performance or increasing the partial discharge inception voltage, of direct-bonded-copper substrates for medium-voltage power modules. By applying the polymer nanocomposite coating on the direct-bonded- copper triple-point edges, the partial discharge inception voltages of a wide range of direct-bonded-coppers increased by 50-100%. To assure its effectiveness for heated power modules during operation, this field-grading effect was then evaluated at elevated temperatures up to 200°C and found almost unchanged. The nanocomposite's long-term efficacy was further corroborated by voltage endurance tests. Building on these promising characterizations, functional power modules were designed, fabricated, and tested, employing the latest packaging techniques, including double-sided cooling and silver-sintering. Prototypes of 10-kV and 20-kV silicon carbide diode modules confirmed the practicality and efficacy of the polymer nanocomposite. The insulation enhancements observed at the module level mirrored those at the substrate level. Moreover, the polymer nanocomposite coating enabled modules to use insulated-metal-substrates with at least 100% thinner ceramic, resulting in a reduction of at least 30% in the junction-to-case thermal resistance of the module. Subsequently, to test the nanocomposite's performance during fast-switching transients (> 300 V/ns), 15-kV silicon carbide MOSFET modules were designed, fabricated, and evaluated. These more complex modules passed blocking tests, partial discharge tests, and double-pulse tests, further validating the feasibility of the nonlinear resistive polymer nanocomposite field-grading for medium-voltage power modules. In summary, this dissertation presents a comprehensive evaluation of a nonlinear resistive polymer nanocomposite field-grading coating for medium-voltage power modules. The insights and demonstrations provided in this work bring the widespread adoption of this packaging concept for medium-voltage power modules significantly closer to realization. / Doctor of Philosophy / This dissertation delves into a novel approach to improving the resilience and reliability of our electric grid by employing medium-voltage silicon carbide power devices. These power devices, due to their superior performance at higher temperatures and faster switching speeds, can revolutionize grid-tied power electronics. However, the challenge lies in safely packaging these devices, given their high blocking voltage and compact size. To address this, the study explores an innovative solution that uses a material called a nonlinear resistive polymer nanocomposite. This nanocomposite can improve insulation and endure high temperatures, promising a significant boost in performance for these power devices. The study reveals that applying this nanocomposite coating to the edges of direct- bonded-copper, a component of the power module, can enhance the insulation performance by 50-100%. Building on these findings, we designed, made, and tested functional power modules, using cutting-edge packaging techniques that we developed. The tests confirmed the practicality and effectiveness of the polymer nanocomposite, leading to insulation improvements on both the substrate and module levels. Importantly, this coating also reduced the thermal resistance of the module by at least 30%, signifying a more efficient operation. Then we evaluated the nanocomposite's performance during fast-switching transients in more complex silicon carbide modules. The modules passed multiple tests, further validating the feasibility of the nanocomposite coating for medium-voltage power modules. In essence, this dissertation uncovers a promising approach to more efficient and resilient power module packaging, paving the way for potential widespread adoption in the power electronics industry.

ith the rapid advancements in modern technology and the increasing demand for efficient energy conversion, the field of medium voltage power conversion has experienced significant progress in recent years. This progress is driven by its high efficiency and improved scalability. Medium voltage power conversion finds applications in various areas such as data centers, electric vehicle fast charging, and smart grids. It enables the reduction of power delivery stages and minimizes the required physical space. The scalability and modularity of this technology offer the flexibility to expand the power level as needed. According to the International Energy Agency, data centers and electric vehicle charging are projected to consume over 10% of the world's total electricity consumption by 2040. To power this amount, approximately 800 nuclear power reactors with a capacity of 1 GW each would be required. Therefore, even small savings in power consumption can have a substantial impact. The solid-state transformer (SST) is a promising technique for medium voltage conversion that offers high-frequency operation, resulting in reduced volume and excellent insulation capabilities. Currently, the medium voltage transformer poses a challenge for SST systems due to the requirements for high insulation levels, efficient thermal management, improved efficiency, and higher power density. Unlike conventional line-frequency transformers, the solid-state transformer operates at relatively high frequencies, typically in the range of tens of kilohertz. This higher frequency enables a reduction in the cross-sectional area of the magnetic components, leading to a smaller and lighter design. However, the high-frequency transformer used in the solid-state transformer does face certain limitations. Balancing insulation capability with the goal of achieving high power density presents a dilemma. To ensure medium voltage insulation, a thick insulation layer is required for the transformer. However, the high-frequency Litz wire and compact size of the transformer make it challenging to achieve partial discharge-free operation, unlike traditional line-frequency transformers. To address these challenges and achieve both medium voltage insulation capability and high power density, improvements in the insulation structure have been made. The dissertation firstly proposes the application of a shielding layer and related stress grading layer in the insulation structure. This helps confine the electric field within the primary side winding encapsulation rather than in the air. As a result, there is minimal electric field present in the air, allowing for further reduction in the transformer volume as there is no longer a need for insulation margin. With the enhanced insulation structure, the transformer can operate at even higher frequencies. However, it is important to note that the reduction in size is not directly proportional to the increase in frequency due to the impact of the insulation layer. To address this, a straightforward and comprehensive optimization method is proposed for the first time. This method considers the trade-off between loss and volume, taking into account multiple design objectives and parameters. An optimized 800/400 V, 200 kHz, 15 kW CLLC converter is demonstrated. The peak efficiency of this optimized converter reaches 98.8%, and the power density is 3.7 kW/L. The transformer also exhibits good insulation capability, with a partial discharge-free level reaching 7.7 kV. Additionally, achieving a suitable insulation level for the DC-DC module poses challenges due to thermal limitations. Insulation materials are not efficient thermal conductors, and as insulation levels increase, the thickness of the insulation layer must also increase, resulting in a significant rise in thermal resistance. To address this issue for applications requiring a 13.2 kV grid, an alternative insulation material called FR4 is considered in this dissertation. FR4, which can be implemented as the insulation layer for a PCB winding, offers the advantage of being fabricated together with the winding during the PCB manufacturing process. This process takes place in a vacuum environment, reducing the presence of air cavities that could lead to partial discharge within the insulation structure. Thus, the entire insulation fabrication process can be simplified. To enhance the insulation capability further, the dissertation proposes the incorporation of an arc section within the PCB winding. This design reduces the electric field crowding in the corner area. However, winding losses in the PCB winding remain a concern. To mitigate these losses, an ER core structure is introduced to balance the magnetic flux within the transformer core. This balanced distribution of the magnetic field helps reduce leakage flux into the air, subsequently reducing winding losses. The dissertation also suggests a sandwich winding structure to decrease the magnetomotive force in the winding, in comparison to a completely separate winding structure. Another optimization process for the PCB winding is performed to strike a better balance between size and loss in the transformer. In line with these improvements, another 800/400 V, 200 kHz CLLC transformer is designed utilizing the PCB winding approach. Compared to the Litz wire-based transformer, the efficiency performance is similar, but the power density is doubled due to the low-profile design enabled by the PCB winding. In terms of insulation capability, the FR4 insulation, with its high dielectric strength, allows the transformer to be partial discharge-free even with the same insulation thickness as the epoxy used in the Litz wire transformer for the 13.2 kV applications. Thirdly, considering the power limitation mainly because of the thermal issue in the primary side PCB winding, the PCB Litz wire concept is proposed to further improve the winding loss. To further improve the power level of the PCB winding transformer, the winding should be designed wider to reduce the DC winding resistance. However, the current distributes in a bad manner due to the proximity effect in the winding. That makes winding width increment insignificant to the loss reduce. The Litz wire is widely used in the high-frequency power conversion applications. A similar concept has been proposed in this dissertation in the PCB winding. Using two layers constructing one turns, the interwoven strategy can be implemented in the PCB winding to achieve the flux cancellation effect. That helps to make the current distribute uniformly inside the PCB winding. The PCB Litz construction method and connection method is introduced in this chapter to reduce the design burden with such a complicated winding pattern. Some design considerations are also proposed to optimize the PCB Litz concept. This dissertation solves the challenges in magnetic design in high-frequency DC/DC converters in the solid-state transformer with medium voltage insulation. This includes the Litz wire transformer and the PCB winding based transformer. With the academic contribution in this dissertation, the insulation performance is better for both Litz wire transformer and PCB winding based transformer. The straightforward and comprehensive optimization method is benefit for both academic and industry for transformer design in this application. The proposed PCB winding transformer makes the insulation fabrication much easier compared to the conventional fabrication method. And the PCB Litz concept helps to further reduce the winding loss, which makes it possible to further lift the power level in the PCB winding based transformer. / Doctor of Philosophy / With the rapid advancements in modern technology and the increasing demand for efficient energy conversion, the field of medium voltage power conversion has experienced significant progress in recent years. This progress is driven by its high efficiency and improved scalability. Medium voltage power conversion finds applications in various areas such as data centers, electric vehicle fast charging, and smart grids. It enables the reduction of power delivery stages and minimizes the required physical space. The scalability and modularity of this technology offer the flexibility to expand the power level as needed. According to the International Energy Agency, data centers and electric vehicle charging are projected to consume over 10% of the world's total electricity consumption by 2040. To power this amount, approximately 800 nuclear power reactors with a capacity of 1 GW each would be required. Therefore, even small savings in power consumption can have a substantial impact. The solid-state transformer (SST) is a promising technique for medium voltage conversion that offers high-frequency operation, resulting in reduced volume and excellent insulation capabilities. Currently, the medium voltage transformer poses a challenge for SST systems due to the requirements for high insulation levels, efficient thermal management, improved efficiency, and higher power density. Unlike conventional line-frequency transformers, the solid-state transformer operates at the range of tens of kilohertz. This higher frequency enables a reduction in the cross-sectional area of the magnetic components, leading to a smaller and lighter design. Balancing insulation capability with the goal of achieving high power density presents a dilemma. To ensure medium voltage insulation, a thick insulation layer is required for the transformer. However, the high-frequency Litz wire and compact size of the transformer make it challenging to achieve partial discharge-free, unlike traditional line-frequency transformers. To address these challenges and achieve both medium voltage insulation capability and high power density, improvements in the insulation structure have been made. A straightforward and comprehensive optimization method is proposed for the first time. This method considers the trade-off between loss and volume, taking into account multiple design objectives and parameters. An optimized 800/400 V, 200 kHz, 15 kW CLLC converter is demonstrated. The peak efficiency of this optimized converter reaches 98.8%, and the power density is 3.7 kW/L. The transformer also exhibits good insulation capability, with a partial discharge-free level reaching 7.7 kV. Additionally, insulation materials are not efficient thermal conductors, and as insulation levels increase, the thickness of the insulation layer must also increase, resulting in a significant rise in thermal resistance. An alternative insulation material called FR4 is considered in this dissertation. FR4, which can be implemented as the insulation layer for a PCB winding, offers the advantage of being fabricated with the winding during the PCB manufacturing process. To enhance the insulation capability further, the dissertation proposes an arc section within the PCB winding. This design reduces the electric field crowding in the corner area. The dissertation also suggests a sandwich winding structure to decrease the magnetomotive force in the winding, in comparison to a completely separate winding structure. Another optimization process for the PCB winding is performed to strike a better balance between size and loss in the transformer. In line with these improvements, another 200 kHz CLLC transformer is designed utilizing the PCB winding approach with doubled converter power density. In terms of insulation capability, the FR4 insulation, allows the transformer to be partial discharge-free for the 13.2 kV applications. Thirdly, considering the power limitation mainly because of the thermal issue in the primary side PCB winding, the PCB Litz wire concept is proposed to further improve the winding loss. The current distributes in a bad manner due to the proximity effect in the PCB winding. That makes winding width increment insignificant to the loss reduce. The Litz wire is widely used in the high-frequency power conversion applications. A similar concept has been proposed in this dissertation in the PCB winding. Using two layers constructing one turns, the interwoven strategy can be implemented in the PCB winding to achieve the flux cancellation effect. That helps to make the current distribute uniformly inside the PCB winding. The PCB Litz construction method and connection method is introduced in this chapter to reduce the design burden with such a complicated winding pattern. Some design considerations are also proposed to optimize the PCB Litz concept. This dissertation solves the challenges in magnetic design in high-frequency DC/DC converters in the solid-state transformer with medium voltage insulation. This includes the Litz wire transformer and the PCB winding based transformer. With the academic contribution in this dissertation, the insulation performance is better for both Litz wire transformer and PCB winding based transformer. The straightforward and comprehensive optimization method is benefit for both academic and industry for transformer design in this application. The proposed PCB winding transformer makes the insulation fabrication much easier compared to the conventional fabrication method. And the PCB Litz concept helps to further reduce the winding loss, which makes it possible to further lift the power level in the PCB winding based transformer.

This thesis investigates the disparities in losses between 2D-based design simulations and a 3D realization of solenoidal inductors featuring distributed gaps. The inductor geometry entails a solenoidal copper winding enveloped by sintered ferrite rings and end caps, with the air gap required for energy storage distributed over multiple smaller discrete gaps. The simulated 3D structure possesses higher losses than its 2D cross-section due to inherent structural features. The research culminates in two contributions. First, a practical two-variable design approach is presented, leveraging matrix algebra to succinctly represent the decision quantities as functions of the two most important variables to the application. The procedure results yield several informative plots that assist in selecting a design that meets the efficiency and thermal limits. Second, a detailed explanation is provided on the 3D loss effects, along with the recommended design considerations and a method to estimate the dominant 3D loss effect using simple 2D simulations. The design recommendations address a 26-fold increase in the core loss of the outer ferrite rings. They also reduce the copper loss due to the termination effect by 55% using spacer ferrite layers. A simple 2D simulation method is proposed to accurately predict the increased 3D copper loss due to the axial shift of the winding to within 3% and runs 60 times faster than the equivalent 3D simulation. Additionally, a derived equation for the optimal turn spacing aligns with the simulation results with <6% error, offering practical insights for design optimization. These results enable the design of a low-loss solenoidal inductor and accurate loss estimations without running lengthy and complicated 3D simulations. A 13 µH, 150 Arms solenoidal inductor prototype for operation in a 10 kV-to-400 V, 50 kW converter cell serves as empirical validation, corroborating the efficacy of the proposed analysis and design methodology. / Master of Science / It is common to rely on a 2D cross-section of the structure to facilitate the design procedure for inductors, essential components used in electronic circuits to control and convert energy. Two-dimensional simulations of inductors are preferred due to their modeling simplicity, running speed, and low processing power requirement compared to 3D simulations. This thesis investigates the disparities in losses between 2D-based design simulations and a 3D realization of solenoidal inductors featuring distributed gaps. The inductor geometry entails a helical copper winding enveloped by rings and end caps made of a magnetic material. There are multiple small air gaps between the magnetic rings that are required for energy storage, and having multiple small gaps instead of a single large one is referred to as "distributed gaps". The simulated 3D structure possesses higher losses than its 2D cross-section due to inherent structural features. The research culminates in two contributions. First, a practical two-variable design approach is presented, leveraging matrix algebra to succinctly represent the decision quantities as functions of the two most important variables to the application. The procedure results yield several informative plots that assist in selecting a design that meets the efficiency and thermal limits. Second, a detailed explanation is provided on the 3D loss effects, along with the recommended design considerations and a method to estimate the dominant 3D loss effect using simple 2D simulations. The design recommendations address a 26-fold increase in the loss of the outer rings and reduce the copper loss by 55%. A simple 2D simulation method is proposed to accurately predict the increased 3D copper loss to within 3% and runs 60 times faster than the equivalent 3D simulation. Additionally, a derived equation for the optimal turn spacing aligns with the simulation results with <6% error, offering practical insights for design optimization. These results enable the design of a low-loss solenoidal inductor and accurate loss estimations without running lengthy and complicated 3D simulations. A 13 µH, 150 Arms solenoidal inductor prototype for operation in a 10 kV-to-400 V, 50 kW converter cell serves as empirical validation, corroborating the efficacy of the proposed analysis and design methodology.

Due to the limitations of silicon (Si), there is a paradigm shift in research focusing on wide-bandgap-based (WBG) materials. SiC power semiconductors exhibit superiority in terms of switching speed, higher breakdown electric field, and high working temperature, slowly becoming a global solution in harsh medium-voltage (MV) high-power environments. However, to utilize the SiC MOSFET device to achieve those next-generation, high-density, high-efficiency power electronics converters, one must solve a plethora of challenges. For the MV SiC MOSFET device, a high-performance gate-driver (GD) is a key component required to maximize the beneficial SiC MOSFET characteristics. GD units must overcome associated challenges of electro-magnetic interference (EMI) with regards to common-mode (CM) currents and cross-talk, low driving loop inductance required for fast switching, and device short-circuit (SC) protection. Developed GDs (for 1.2 kV, and 10 kV devices) are able to sustain dv/dt higher than 100 V/ns, have less than 5 nH gate loop inductance, and SC protection, turning off the device within 1.5 us. Even with the introduction of SiC MOSFETs, power devices remain the most reliability-critical component in the converter, due to large junction temperature (Tj) fluctuations causing accelerated wear-out. Real-time (online) measurement of the Tj can help improve long-term reliability by enabling active thermal control, monitoring, and prognostics. An online Tj estimation is accomplished by generating integrated intelligence on the GD level. The developed Tj sensor exhibits a maximum error less than 5 degrees Celsius, having excellent repeatability of 1.2 degrees Celsius. Additionally, degradation monitoring and an aging compensation scheme are discussed, in order to maintain the accuracy of the sensor throughout the device's lifetime. Since ultra high-voltage SiC MOSFET devices (20 kV) are impractical, the modular multilevel converter (MMC) emerged as a prospective topology to achieve MV power conversion. If the kernal part of the power-cell (main constitutive part of the MMC converter) is an SiC MOSFET, the design is able to achieve very high-density and high-efficiency. To ensure a successful operation of the power-cell, a systematic design and assessment methodology (DAM) is explored, based on the 10 kV SiC MOSFET power-cell. It simultaneously addresses challenges of high-voltage insulation, high dv/dt and EMI, component and system protections, as well as thermal management. The developed power-cell achieved high-power density of 11.9 kW/l, with measured peak efficiency of n=99.3 %@10 kHz. It successfully operated at Vdc=6 kV, I=84 A, fsw>5 kHz, Tj<150 degrees Celsius and had high switching speeds over 100 V/ns. Lastly, to achieve high-power density and high-efficiency on the MV converter level, challenges of high-voltage insulation, high-bandwidth control, EMI, and thermal management must be solved. Novel switching cycle control (SCC) and integrated capacitor blocked-transistor (ICBT) control methodologies were developed, overcoming the drawbacks of conventional MMC control. These novel types of control enable extreme reduction in passive component size, increase the efficiency, and can operate in dc/dc, dc/ac, mode, potentially opening the modular converter to applications in which it was not previously used. In order to explore the aforementioned benefits, a modular, scalable, 2-cell per arm, prototype MV converter based on the developed power-cell is constructed. The converter successfully operated at Vdc=12 kV, I=28 A, fsw=10 kHz, with high switching speeds, exhibiting high transient immunity in both SCC and ICBT. / Doctor of Philosophy / In medium-voltage applications, such as an electric grid interface in highly populated areas, a ship dc system, a motor drive, renewable energy, etc., land and space can be very limited and expensive. This requires the attributes of high-density, high-efficiency, and reliable distribution by a power electronics converter, whose central piece is the semiconductor device. With the recent breakthrough of SiC devices, these characteristics are obtainable, due to SiC inherent superiority over conventional Si devices. However, to achieve them, several challenges must be overcome and are tackled by this dissertation. Firstly, as a key component required to maximize the beneficial SiC MOSFET characteristics, it is of utmost importance that the high-performance gate-driver be immune to interference issues caused by fast switching and be able to protect the device against a short-circuit, thus increasing the reliability of the system. Secondly, to prevent accelerated degradation of the semiconductor devices due to high-temperature fluctuations, real-time (online) measurement of the Tj is developed on the gate-driver to help improve long-term reliability. Thirdly, to achieve medium-voltage high-power density, high-efficiency modular power conversion, a converter block (power-cell) is developed that simultaneously addresses the challenges of high-voltage insulation, high interference, component and system protections, and thermal management. Lastly, a full-scale medium-voltage modular converter is developed, exploiting the advantages of the fast commutation speed and high switching frequency offered by SiC, meanwhile exhibiting exceptional power density and efficiency.

Due to the superior characteristics compared to its silicon (Si) counterpart, the wide bandgap (WBG) semiconductor enables next-generation power electronics systems with higher efficiency and higher power density. With higher blocking voltage available, WBG devices, especially the silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET), have been widely explored in various medium-voltage (MV) applications in both industry and academia. However, due to the high di/dt and high dv/dt during the switching transient, potential overcurrent, overvoltage, and gate failure can greatly reduce the reliability of implementing SiC MOSFETs in an MV system. By utilizing the parasitic inductance between the Kelvin- and the power-source terminal, a short-circuit (SC) and overload (OL) dual-protection scheme is proposed for overcurrent protection. A full design procedure and reliability analysis are given for SC circuit design. A novel OL circuit is proposed to protect OL faults at the gate-driver level. The protection procedure can detect an SC fault within 50 nanoseconds and protect the device within 1.1 microsecond. The proposed method is a simple and effective solution for the potential overcurrent problem of the SiC MOSFET. For SiC MOSFETs in series-connection, the unbalanced voltages can result in system failure due to device breakdown or unbalanced thermal stresses. By injecting current during the turn-off transient, an active dv/dt control method is used for voltage balancing. A 6 kV phase-leg using eight 1.7 kV SiC MOSFETs in series-connection has been tested with voltage balanced accurately. Modeling of the stacked SiC MOSFET with active dv/dt control is also done to summarize the design methodology for an effective and stable system. This method provides a low-loss and compact solution for overvoltage problems when MV SiC MOSFETs are connected in series. Furthermore, a scalable auxiliary power network is proposed to prevent gate failure caused by unstable gate voltage or EMI interference. The two-stage auxiliary power network (APN) architecture includes a wireless power transfer (WPT) converter supplied by a grounded low voltage dc bus, a high step-down-ratio (HSD) converter powered from dc-link capacitors, and a battery-based mini-UPS backup power supply. The auxiliary-power-only pre-charge and discharge circuits are also designed for a 6 kV power electronics building block (PEBB). The proposed architecture provides a general solution of a scalable and reliable auxiliary power network for the SiC-MOSFET-based MV converter. For the WPT converter, a multi-objective optimization on efficiency, EMI mitigation, and high voltage insulation capability have been proposed. Specifically, a series-series-CL topology is proposed for the WPT converter. With the optimization and new topology, a 120 W, 48 V to 48 V WPT converter has been tested to be a reliable part of the auxiliary power network. For the HSD converter, a novel unidirectional voltage-balancing circuit is proposed and connected in an interleaved manner, which provides a fully modular and scalable solution. A ``linear regulator + buck" solution is proposed to be an integrated on-board auxiliary power supply. A 6 kV to 45 V, 100 W converter prototype is built and tested to be another critical part of the auxiliary power network. / Doctor of Philosophy / The wide bandgap semiconductor enables next-generation power electronics systems with higher efficiency and higher power density which will reduce the space, weight, and cost for power supply and conversion systems, especially for renewable energy. However, by pushing the system voltage level higher to medium-voltage of tens of kilovolts, although the system has higher efficiency and simpler control, the reliability drops. This dissertation, therefore, focusing on solving the possible overcurrent, overvoltage, and gate failure issues of the power electronics system that is caused by the high voltage and high electromagnetic interference environment. By utilizing the inductance of the device, a dual-protection method is proposed to prevent the overcurrent problem. The overcurrent fault can be detected within tens of nanoseconds so that the device will not be destroyed because of the huge fault current. When multiple devices are connected in series to hold higher voltage, the voltage sharing between different devices becomes another issue. The proposed modeling and control method for series-connected devices can balance the shared voltage, and make the control system stable so that no overvoltage problem will happen due to the non-evenly distributed voltages. Besides the possible overcurrent and overvoltage problems, losing control of the devices due to the unreliable auxiliary power supply is another issue. This dissertation proposed a scalable auxiliary power network with high efficiency, high immunity to electromagnetic interference, and high reliability. In this network, a wireless power transfer converter is designed to provide enough insulation and isolation capability, while a switched capacitor converter is designed to transfer voltage from several kilovolts to tens of volts. With the proposed overcurrent protection method, voltage sharing control, and reliable auxiliary power network, systems utilizing medium-voltage wide-bandgap semiconductor will have higher reliability to be implemented for different applications.

In comparison with Si-based converters, the emerging Medium Voltage (MV) SiC-based converters can achieve higher blocking voltage capability, lower on-resistance, faster switching speed with less switching related losses and run under higher temperature. Thus, theoretically, it can achieve much higher power density, which becomes very promising for future power transmission and distribution. However, in order to achieve the desired high power density, insulation system of the MV SiC-based converter must be compact. Therefore, challenges for the insulation system gradually appeared, as the insulation size becomes smaller and the Electric field (E-field) intensity significantly increases. Under such high E-field intensity, it is necessary and important to eliminate Partial Discharge (PD) for such power converters, since the converter system is vulnerable to PDs. Developing an insulation design, assessment and online monitoring method to help reach a compact and PD free insulation system for MV SiC-based converters is a goal of this work. General insulation design and assessment guidelines based on experimental PD investigation and physics-based model –Experimental PD investigation is completed for internal void discharge, surface discharge, and point discharge representative coupons under square excitations. Based on the data and the existing knowledge about PD mechanisms, widely accepted PD models are selected. Using these physics-based models, simulation results can demonstrate the major features observed in the experiments. With the experimental data and valid PD models, several general insulation design and assessment guidelines are proposed, which could be further applied during converter prototypes development. Partial Discharge elimination methodology and design examples – By using the laminated bus as the design example, internal void evaluation and analysis method is demonstrated. Then, targeting the internal PD-free design with reasonable insulation thickness, several insulation improvement methods are applied and experimentally verified by using representative coupons. After understanding the possible ways for evaluating and eliminating internal voids, a PCB-based planar bus is designed and fabricated, which shows great insulation improvement after experimental verification. In order to eliminate PDs in the air and shrink the insulation distance, three ways for managing E-field distribution in air are demonstrated by three examples. First, by using the interconnections among the power modules, Rogowski-based current-sensing board, and the laminated bus as an example, E-field distribution can be estimated by Finite Element Analysis (FEA) and its management can be achieved by geometrical modifications. Second, for the one-turn inductor, a methodology is demonstrated that builds a coaxial insulation structure with proper termination technology in order to squeeze air out of the insulation system. Finally, E-field shielding technology is applied along the heatsink edges in order to make the E-field distribution uniform and to shrink the insulation distance between the heatsink and the cooling system. After improving the insulation, this work shrinks the converter unit size by around 50% while maintaining its PD-free status under normal operation conditions. Besides the significant increase in power density and weight reduction, the entire converter system has less ringing and better current-sharing performance due to reductions of the parasitic inductance. Partial Discharge online monitoring via acoustic and photon detection methods –Targeting the online monitoring and even localization of surface discharge for power converter applications, two novel types of sensors have been proposed and fabricated. In order to verify the concepts, one example with experimental results has been given for each type of sensor. The experimental data demonstrates that such sensors can be placed inside the converter and online monitoring can be realized for surface or corona discharges by capturing either the acoustic signal or the photons that are generated by discharge events. / Doctor of Philosophy / A unproper designed insulation system can take more than 50% volume of Medium Voltage (MV) SiC-based converters and have significant internal or external Partial Discharge (PD), which can not only accelerate the insulation aging but also risk to multiple aspects of the converter system. Therefore, developing an insulation design, assessment and online monitoring method to help reach a compact and PD free insulation system for MV SiC-based converters is a goal of this work. Experimental PD investigation is completed for internal void discharge, surface discharge, and point discharge representative coupons under square excitations. Several general insulation design and assessment guidelines are proposed based on the experimental PD investigation and physics-based explanations, which are further applied during converter prototypes development. Then, PD elimination methodology is developed and demonstrated by design examples. By using the laminated bus as an example, internal void evaluation and analysis method is demonstrated. Then, targeting the internal PD-free design with reasonable insulation thickness, several insulation improvement methods are applied and experimentally verified by using representative coupons. In order to eliminate PDs in air and shrink the insulation distance, three ways for managing E-field distribution in air are demonstrated by three examples. First, by using the interconnections among the power modules, Rogowski-based current-sensing board, and the laminated bus as an example, E-field distribution can be estimated by Finite Element Analysis (FEA) and its management can be achieved by geometrical modifications. Second, for the one-turn inductor, a coaxial insulation structure with proper termination technology in order to squeeze air out of the insulation system is demonstrated. Finally, E-field shielding technology is applied along the heatsink edges in order to make the E-field distribution uniform and to shrink the insulation distance between the heatsink and the cooling system. After improving the insulation, this work shrinks the converter unit size by around 50% while maintaining its PD-free status under normal operation conditions. Besides the significant increase in power density and weight reduction, the entire converter system has less ringing and better current-sharing performance due to reductions of the parasitic inductance. Targeting the PD online monitoring for power converter applications, two novel types of sensors have been proposed and fabricated. In order to verify the concepts, one example with experimental results has been given for each type of sensor. The experimental data demonstrates that such sensors can be placed inside the converter and online monitoring can be realized for surface or corona discharges by capturing either the acoustic signal or the photons that are generated by discharge events.

Recent research into industrial applications of electric power conversion shows an increase in the use of renewable energy sources and an increase in the need for electric power by the loads. The Medium-Voltage DC (MVDC) concept can be an optimal solution. On the other hand, the Modular Multilevel Converter (MMC) is an attractive converter topology choice, as it has advantages such as excellent harmonic performance, distributed energy storage, and near ideal current and voltage scalability. The fault response, on the other hand, is a big challenge for the MVDC distribution systems and the traditional MMCs with the Half-Bridge submodule configuration, especially when a DC short circuit fault happens. In this study, the fault current behavior is analyzed. An alternative submodule topology and a fault operation control are explored to achieve the fault current limiting capability of the converter. A three-phase SiC-based MMC prototype with the Full-Bridge configuration is designed and built. The SiC devices can be readily adopted to take advantage of the wide-bandgap devices in MVDC applications. The Full-Bridge configuration provides additional control and energy storage capabilities. The full in-depth design, controls, and testing of the MMC prototype are presented, including among others: component selection, control algorithms, control hardware implementation, pre-charge and discharge circuits, and protection scheme. Systematical tests are conducted to verify the function of the converter. The fault current behavior and the performance of the proposed control are verified by both simulation and experiment. Fast fault current clearing and fault ride-through capability are achieved. / Master of Science

Modern data center power architecture developing trend is analyzed, efficiency improvement method is also discussed. Literature survey of high frequency isolated power conversion system which is also called solid state transformer is given including application, topology, device and magnetic transformer. Then developing trend of this research area is clearly shown following by research target. State of art wide band gap device including silicon carbide (SiC) and gallium nitride (GaN) devices are characterized and compared, final selection is made based on comparison result. Mostly used high frequency high power DC/DC converter topology dual active bridge (DAB) is introduced and compared with novel CLLC resonant converter in terms of switching loss and conduction loss point of view. CLLC holds ZVS capability over all load range and smaller turn off current value. This is beneficial for high frequency operation and taken as our candidate. Device loss breakdown of CLLC converter is also given in the end. Medium voltage high frequency transformer is the key element in terms of insulation safety, power density and efficiency. Firstly, two mostly used transformer structures are compared. Then transformer insulation requirement is referred for 4160 V application according to IEEE standard. Solid insulation material are also compared and selected. Material thickness and insulation distance are also determined. Insulation capability is preliminary verified in FEA electric field simulation. Thirdly two transformer magnetic loss model are introduced including core loss model and litz wire winding loss model. Transformer turn number is determined based on core loss and winding loss trade-off. Different core loss density and working frequency impact is carefully analyzed. Different materials show their best performance among different frequency range. Transformer prototype is developed following designed parameter. We test the developed 15 kW 500 kHz transformer under 4160 V dry type transformer IEEE Std. C57.12.01 standard, including basic lightning test, applied voltage test, partial discharge test. 500 kHz 15 kW CLLC converter gate drive is our design challenge in terms of symmetry propagation delay, cross talk phenomenon elimination and shoot through protection. Gate drive IC is carefully selected to achieve symmetrical propagation delay and high common mode dv/dt immunity. Zero turn off resistor is achieved with minimized gate loop inductance to prevent cross talk phenomenon. Desaturation protection is also employed to provide shoot through protection. Finally 15 kW 500 kHz CLLC resonant converter is developed based on 4160V 500 kHz transformer and tested up to full power level with 98% peak efficiency. / Master of Science

Rapidly-increasing medium-voltage power electronics applications in emerging industry systems, including electrical ships, more electric aircraft, and microgrids, have emphasized the critical need for highly energy-efficient, reliable, and fast switching devices. As a result, Wide-Bandgap (WBG) devices have gained considerable interest over conventional silicon-based switches in recent years. For example, emerging WBG devices have unlocked new dimensions for modern motor drive systems with increased efficiency, switching frequency, and superior power density. Commercially-developed WBG devices such as Silicon Carbide (SiC) and Gallium Nitride (GaN) offer promising opportunities to meet those pressing requirements. However, the fast switching operation of WBG devices may cause substantially increased EMI emissions in medium-voltage applications, which can decrease the overall system’s performance or merits of power converters. This will be particularly an issue in a system where electric ground is unavailable, such as an electric ship, as a large Electro-Magnetic Interference current will be circulating within the system. The EMI in the WBG switch module will be emitted up to 500 MHz. This is the near radio-frequency (RF) band whose impact had not been clearly understood or properly analyzed in the power electronics field until recently. With new and critical challenges in recent years, to reliably adopt WBG devices in emerging power systems, there has been significant effort to improve electromagnetic compatibility (EMC) with new EMI mitigation techniques that comply with existing standards, including International Special Committee on Radio Interference (CISPR), Federal Communications Commission (FCC), Department of Defense (DOD), International Electro-Technical Commission (IEC), etc. This research investigates the common-mode EMI in networked power electronics-enabled power systems. Common-mode EMI phase information is a vital degree of freedom in EMI study that has not been considered in the state of the art. The EMI phase information reduces EMI without implementing any active or passive filter circuit. An effective and less complex method is introduced to reduce EMI in power electronics network. The work includes developing hybrid filter with passive and virtual filter. Including virtual filter reduces the passive common mode choke weight and volume significantly. Finally, a simplified switching node capacitance characterization technique for packaged WBG SiC has been introduced.

Bei der Zustandsbewertung von Kabeln steht derzeit das Mittelspannungsnetz im Fokus der Betrachtungen. Das Mittelspannungsnetz verbindet das Hochspannungsnetz mit dem Niederspannungsnetz und nimmt damit eine besondere Bedeutung ein. Störungen in diesem Netz wirken sich direkt als Versorgungsunterbrechung auf den Letztverbraucher aus. Rund 80 bis 85 % der Versorgungsunterbrechungen resultieren aus Problemen im Mittelspannungsnetz, sodass dortige Aktivitäten den größten Hebel bei der Steigerung der Versorgungsqualität entwickeln. Mittels Zustandsbewertung von Kabeln können verdeckte Fehler aufgedeckt oder deren Alterungszustand bestimmt werden. Nicht jeder diagnostizierte Fehler führt unmittelbar zum Ausfall. Er beschleunigt jedoch die Alterung, die letztendlich zum Ausfall führt. Die Arbeit beschäftigt sich mit der Identifizierung von Fehlern in Mittelspannungskabelmuffen im Zusammenhang mit der Alterung, um die Restlebensdauer auszunutzen und dem Ausfall zuvorzukommen. / By evaluating the status of cables, hidden errors can be detected or their aging condition can be determined. Not every diagnosed fault leads directly to failure. However, it accelerates aging, which ultimately leads to failure. The work deals with the identification of faults in medium-voltage cable joints in connection with aging in order to exploit the remaining life and to prevent the failure.