Tento projekt zkoumá vybrané způsoby implementace víceúrovňových měničů do praxe. V předložené práci je do hloubky prezentována tzv. ANPC (Active Neutral Point Clamped) pětiúrovňová topologie. Autor se v práci zaměřuje zejména na návrh technického řešení experimentálního vzorku a implementaci řídicích algoritmů jako jsou aktivní řízení napětí na pomocném kondenzátoru nebo aktivní balancování vstupního kapacitního děliče. Pro aplikaci zmíněných struktur byl vybrán moderní digitální integrovaný obvod, který slučuje mikroprocesor a FPGA do jednoho systému. Výsledný měnič umožňuje autonomní provoz a umožňuje generovat přesné a stabilní výstupní napětí.

Thesis (PhD (Electrical Engineering))--Cape Peninsula University of Technology, 2019 / Energy systems based on fossil fuel have demonstrated their abilities to permit economic development. However, with the fast exhaustion of this energy source, the expansion of the world energy demand and concerns over global warming, new energy systems dependent on renewable and other sustainable energy are gaining more interests. It is a fact that future development in the energy sector is founded on the utilisation of renewable and sustainable energy sources. These energy sources can enable the world to meet the double targets of diminishing greenhouse gas emissions and ensuring reliable and cost-effective energy supply. Fuel cells are one of the advanced clean energy technologies to substitute power generation systems based on fossil fuel. They are viewed as reliable and efficient technologies to operate either tied or non-tied to the grid to power applications ranging from domestic, commercial to industrial. Multiple fuel cell stacks can be associated in series and parallel to obtain a fuel cell system with high power up to megawatts. The connection of megawatts fuel cell systems to a utility grid requires that the power condition unit serving as the interface between the fuel cell plant and the grid operates accordingly. Different power conditioning unit topologies can be adopted, this study considers a multilevel inverter. Multilevel inverters are getting more popularity and attractiveness as compared to conventional inverters in high voltage and high-power applications. These inverters are suitable for harmonic mitigation in high-power applications whereby switching devices are unable to function at high switching frequencies. For a given application, the choice of appropriate multilevel topology and its control scheme are not defined and depend on various engineering compromises, however, the most developed multilevel inverter topologies include the Diode Clamped, the Flying Capacitor and the Cascade Full Bridge inverters. On the other hand, a multilevel inverter can be either a three or a five, or a nine level, however, this research focuses on the three-level diode clamped inverters. The aim of this thesis is to model and control a three-level diode clamped inverter for the grid connection of a megawatt fuel cell stack. Besides the grid, the system consists of a 1.54 MW operating at 1400 V DC proton exchange membrane fuel cell stack, a 1.26 MW three-level diode clamped inverter with a nominal voltage of 600 V and an LCL filter which is designed to reduce harmonics and meet the standards such as IEEE 519 and IEC 61000-3-6. The inverter control scheme comprises voltage and current regulators to provide a good power factor and satisfy synchronisation requirements with the grid. The frequency and phase are synchronised with those of the grid through a phase locked loop. The modelling and simulation are performed using Matlab/Simulink. The results show good performance of the developed system with a low total harmonic distortion of about 0.35% for the voltage and 0.19% for the current.

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Conventional 2-level inverters have been quite popular in industry for drives applications. It used pulse width modulation techniques to generate a voltage waveform with high quality. For achieving this, it had to switch at high frequencies and also the switching is between 0 and Vdc. Also additional LC filters are required before feeding to a motor. 3-phase IM is the work horse of the industry. Several speed control techniques have been established namely the V/f control technique and for high performance, vector control is adopted. An electric drive system comprises of a rectifier, inverter, a motor and a load. each module is a topic by itself. This thesis work discusses the novel inverter topologies to overcome the demerits of a conventional 2-level inverter or even the basic multilevel topologies, for an electric drive. The word ‘multilevel’ itself signifies that inverter can generate more than two levels. The idea was first originated by Nabae, Takahashi and Akagi to bring an additional voltage level so that the waveform becomes a quasi square wave. This additional voltage level brought additional benefits in terms of reduced dv/dt and requirement of low switching frequency. But this was not without any cost. The inverter structure is slightly more complicated than a 2-level and also required more devices. But the advantage it gave was superior enough to such an extent that the above topology (popularly known as NPC) has become quite popular in industry. This topology was later modified to equalize the semiconductor losses among switches by replacing the clamping diodes with controllable switches and such topologies are popularly known as Active NPCs (ANPCs) because of the replacement of diodes with active switches. 3-level flying capacitors were then introduced where the additional voltage level is provided using charged capacitors. But this capacitor voltage has to be maintained at its nominal value during the inverter operation. An additional floating capacitor, which is an electrolytic capacitor is needed for this. Increasing the number of electrolytic capacitors reduces the reliability of the inverter drive since they are the weakest link in any inverters and its count has to be kept to the minimum. By using a H-bridge cell in each of the three phases, three voltage levels can be easily obtained.This is commonly known as Cascaded H-bridge (CHB) multilevel inverter. The above three topologies have been discussed with respect to generation of three pole voltage levels and these topologies are quite suited also. A higher number of voltage levels will reduce the switching frequency even lesser and also the dv/dt. On increasing the number of levels further and further, finally the inverter need not do any PWM switching and just generating the levels is sufficient enough for a good quality waveform and also low dv/dt. But when the above topologies are scaled for more than three voltage levels, all of them suffer serious drawbacks which is briefly discussed below. The diode clamped inverter (known as NPC if it is 3-level), when extended to more than three levels suffers from the neutral point balancing issue and also the count of clamping diodes increase drastically. FC inverters, when extended beyond 3-level, the number of electrolytic capacitors increases and also balancing of these capacitors to their nominal voltages becomes complicated. In the case of multilevel CHB, when extended beyond 3-level, the requirement of isolated DC sources also increases. To generate isolated supplies, phase shifting transformer and 8, 12 or 24 pulse diode rectifier is needed which increases the weight , size and cost of the drive. Therefore its application is limited. In this thesis, the aim is to develop a novel method to develop a multilevel inverter without the drawbacks faced by the basic multilevel topologies when scaled for higher number of voltage levels. This is done through stacking the basic or hybrid combination of these basic multilevel topologies through selector switches. This method is experimentally verified by stacking two 5-level inverters through a 2-level selector switch (whose switching losses can be minimized through soft cycle commutation). This will generate nine levels.Generating 9-levels through scaling the basic topologies is disadvantageous, the comparison table is provided in the thesis. This is true for any higher voltage level generation. Each of the above 5-level inverter is developed through cascading an FC with a capacitor fed H-bridge. The device count can be reduced by making the FC-CHB module common to the selector switches by shifting the selector switches between the DC link and the common FC-CHB module. Doing so, reduces the modular feature of the drive but the device count can be reduced. The FFT plot at different frequencies of operation and the switching losses of the different modules-FC, CHB and the selector switches are also plotted for different frequencies of operation. The next step is to check whether this method can be extended to any number of stackings for generation of more voltage levels. For this, a 49-level inverter is developed in laboratory by stacking three 17-level inverters. Each of the 17-level inverter is developed by cascading an FC with three CHBs. When there are 49 levels in the pole voltage waveform, there is no need to do any regular PWM since the output waveform will be very close to a sine wave even without any PWM switching. The technique used is commonly known in literature as Nearest Level Control (NLC). This method of stacking and cascading has the advantage that the FC and the CHB modules now are of very low voltages and the switching losses can be reduced. The switching losses of the different modules are calculated and plotted for different operating frequencies in the thesis. To reduce the voltages of the modules further, a 6-phase machine has been reconfigured as a 3-phase machine, the advantage being that now the DC link voltage requirement is half of that needed earlier for the same power. This further reduces voltages of the modules by half and this allows the switches to be replaced with MOSFETs, improving the efficiency of the drive. This topology is also experimentally verified for both steady state and transient conditions. So far the research focussed on a 3-phase IM fed through a stacked MLI. It can be observed that a stacked MLI needs as many DC sources as the number of stackings. A 6-phase machine apart from reduced DC link voltage requirement, has other advantages of better fault tolerant capability and better space harmonics. They are serious contenders for applications like ship propulsion, locomotive traction, electric vehicles, more electric aircraft and other high power industrial applications. Using the unique property of a 6-phase machine that its opposite windings always draw equal and opposite current, the neutral point (NP) (formed as a result of stacking two MLIs) voltage can be balanced. It was observed that the net mid point current drawn from the mid point can be made zero in a switching interval. It was later observed that with minimal changes, the mid point current drawn from the NP can be made instantaneously zero and the NP voltage deviation is completely arrested and the topology needs only very low capacity series connected capacitors energized from a single DC link. This topology is also experimentally verified using the stacked 9-level inverter topology discussed above but now for 6-phase application and experimental results are provided in the thesis. Single DC link enables direct back to back conversion and power can be fed back to the mains at any desired power factor. All the experimental verification is done on a DSP (TMS320F28335) and FPGA (Spartan 3 XCS3200) platform. An IM is run using V/f control scheme and the above inverter topologies are used to drive the motor. The IGBTs used are SKM75GB123D for the stacked 9-level inverter in the 3-phase and 6-phase experiments. For the 49-level inverter experiment, MOSFETs-IRF260N were used. Both steady state and transient results ensure that the proposed inverter topologies are suitable for high power applications.

Wave power is a renewable energy source with great potential, which is why there are more than a hundred ongoing wave power projects around the world. At the Division of Electricity, Uppsala University, a point-absorber type wave energy converter (WEC) has been proposed and developed. The WEC consists of a linear synchronous generator placed on the seabed, connected to a buoy floating on the surface. Power is absorbed by heave motion of the buoy, and converted into electric energy by the generator. The point-absorber WEC must be physically much smaller than the wavelength of the incoming waves, and can therefore not be scaled to very high power levels. Instead, the total power output is boosted by increasing the number of WECs, connecting them in wave power farms. To transfer the electric energy to the grid, an intermediate marine substation is proposed, where an AC/DC/AC conversion step is performed. Within this PhD-work, a full-scale offshore marine substation has been designed, constructed and experimentally evaluated. The substation is rated for grid-connection of seven WECs to the local 1kV-grid, and is placed on the seabed 3km off the coast at a depth of 25m. Various aspects of the substation design have been considered, including the mechanical and electrical systems, the WEC electrical interface, offshore operations and the automatic grid connection control system. A tap change circuit and different multilevel topologies have also been proposed. This dissertation has an experimental approach, validating a major part of the work with lab results. The final substation electrical circuit has been tested at rated grid voltage with a fluctuating input power source. The efficiency has been measured and the implemented functions are verified. Offshore operations have been successfully carried out and offshore wave farm data is expected in the nearby future.

With worldwide growing demand for electric energy, there has been a great interest in exploring photovoltaic (PV) sources. For the PV generation system, the power converter is the most essential part for the efficiency and function performance. In recent years, there have been quite a few new transformerless PV inverters topologies, which eliminate the traditional line frequency transformers to achieve lower cost and higher efficiency, and maintain lower leakage current as well. With an overview of the state-of-the-art transformerless PV inverters, a new inverter technology is summarized in the Chapter 2, which is named V-NPC inverter technology. Based this V-NPC technology, a family of high efficiency transformerless inverters are proposed and detailly analyzed. The experimental results demonstrate the validity of V-NPC technology and high performance of the transformerless inverters. For the lower power level transformerless inverters, most of the innovative topologies try to use super junction metal oxide semiconductor field effect transistor(MOSFET) to boost efficiency, but these MOSFET based inverter topologies suffer from one or more of these drawbacks: MOSFET failure risk from body diode reverse recovery, increased conduction losses due to more devices, or low magnetics utilization. By splitting the conventional MOSFET based phase leg with an optimized inductor, Chapter 3 proposes a novel MOSFET based phase leg configuration to minimize these drawbacks. Based on the proposed phase leg configuration, a high efficiency single-phase MOSFET transformerless inverter is presented for the PV micro-inverter applications. The PWM modulation and circuit operation principle are then described. The common mode and differential mode voltage model is then presented and analyzed for circuit design. Experimental results of a 250 W hardware prototype are shown to demonstrate the merits of the proposed MOSFET based phase-le and the proposed transformerless inverter. New codes require PV inverters to provide system regulation and service to improve the distribution system stabilization. One obvious impact on PV inverters is that they now need to have reactive power generation capability. The Chapter 4 improves the MOFET based transformerless inverter in the Chapter 3 and proposed a novel pulse width modulation (PWM) method for reactive power generation. The ground loop voltage of this inverter under the proposed PWM method is also derived with common mode and differential mode circuit analyses, which indicate that high-frequency voltage component can be minimized with symmetrical design of inductors. A 250-W inverter hardware prototype has been designed and fabricated. Steady state and transient operating conditions are tested to demonstrate the validity of improved inverter and proposed PWM method for reactive power generation, high efficiency of the inverter circuit, and the high-frequency-free ground loop voltage. Besides the high efficiency inverter circuit, the grid connection function is also the essential part of the PV system. The Chapter 5 present the overall function blocks for a grid-connected PV inverter system. The current control and voltage control loop is then analyzed, modeled, and designed. The dynamic reactive power generation is also realized in the control system. The new PLL method for the grid frequency/voltage disturbance is also realized and demonstrate the validity of the detection and protection capability for the voltage/frequency disturbance. At last, a brief conclusion is given in the Chapter 6 about each work. After that, future works on device packaging, system integration, innovation on inverter circuit, and standard compliance are discussed. / Ph. D.

Orientador: Jose Antenor Pomilio / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e Computação / Made available in DSpace on 2018-08-07T03:19:29Z (GMT). No. of bitstreams: 1 Pimentel_SergioPires_M.pdf: 2753814 bytes, checksum: 4e94e3c8b75144bb509d505233b11dcb (MD5) Previous issue date: 2006 / Resumo: Este trabalho aborda a implementação de um filtro ativo de potência utilizando um inversor mul­tinível com topologia em cascata assimétrica. Justificativas para utilização de estruturas multiníveis são discutidas. O sistema de controle utilizado garante um fornecimento nulo de potência ativa pelo filtro ativo e que a corrente fornecida pela fonte de alimentação tenha a mesma forma de onda da tensão de alimentação. Com isso, o fator de potência visto pela fonte é próximo de seu valor unitário e a fonte fornece apenas potência ativa à carga. Resultados de simulações e experimentais validam o esquema adotado. Também é descreva uma proposta para se realizar o controle das tensões CC da topologia em cascata assimétrica. Palavras-chave: Eletrônica de Potência, Inversor Multinível, Qualidade da Energia Elétrica, Fil­tro Ativo de Potência, Controle Digital / Abstract: This work regards a shunt active power filter implementation using an asymmetrical cascaded multilevel convel1er. Reasons for using multilevel structures are discussed. The system control gua­rantees that the active power filter does not supply active power and the source current has the same waveform of the source voltage. Consequently, the power factor from the source side is almost one and the source only supplies active power to the load. Simulation and experimental results validate the applied scheme. A proposal for controlling the DC voltages from the asymmetrical cascaded topology is also described. / Mestrado / Energia Eletrica / Mestre em Engenharia Elétrica