CoordenaÃÃo de AperfeiÃoamento de Pessoal de NÃvel Superior / Visando superar os desafios inerentes à conversÃo de energia elÃtrica em sistemas de alta potÃncia, minimizando as perdas e melhorando a qualidade da energia processada, este tra-balho tem por objetivo analisar e implementar uma tÃcnica de modulaÃÃo para ser aplicada nas duas topologias de inversores multinÃveis mais disseminadas - com neutro grampeado (NPC), e com capacitor flutuante (FC) - a fim de reduzir os esforÃos nos semicondutores, bem como melhorar o Ãndice de distorÃÃo harmÃnica da tensÃo de saÃda. Ao longo do trabalho foi evidenciada a necessidade da digitalizaÃÃo da tÃcnica proposta, visto que o desenvolvimento analÃgico da mesma acarretaria em um circuito complexo e de baixa confiabilidade. Dessa forma, escolheu-se como plataforma digital um FPGA, devido à sua facilidade de programa-ÃÃo e reconfiguraÃÃo, alÃm da alta velocidade e quantidade de pinos de entrada e saÃda. AlÃm da tÃcnica proposta, foram tambÃm desenvolvidas outras modulaÃÃes para fins de compara-ÃÃo, apresentando os padrÃes de chaveamento para cada uma delas, bem como o comporta-mento da corrente atravÃs dos semicondutores em cada perÃodo de chaveamento. Foi tambÃm realizada a anÃlise teÃrica das topologias e suas respectivas etapas de operaÃÃo, caracterÃsticas e levantamento das equaÃÃes que ditam a anÃlise das perdas para as diferentes situaÃÃes de tÃcnicas aplicadas a cada uma das estruturas. O desenvolvimento digital das tÃcnicas mostrou-se correta atravÃs da anÃlise das formas-de-onda colhidas por meio de um circuito digital-analÃgico. AlÃm disso, a comparaÃÃo da aplicaÃÃo dessas modulaÃÃes em inversores a trÃs nÃveis NPC e FC de 6 kW mostrou-se favorÃvel à tÃcnica proposta em termos de eficiÃncia e reduÃÃo da distorÃÃo harmÃnica em ambas as topologias, comprovando sua utilidade em con-versores multinÃveis de alta potÃncia. Por fim, foi apresentado o desenvolvimento da tÃcnica proposta em inversores com mais de trÃs nÃveis, onde se pode comprovar sua eficiente aplica-ÃÃo para tais fins, bem como sua expansibilidade para inversores de n nÃveis. / In order to overcome the challenge of processing electric energy in high power systems with minimal losses and high energy quality, this work presents the implementation and anal-ysis of a modulation technique applicable on both most well-known multilevel inverter struc-tures - neutral point-clamped (NPC), and flying capacitors (FC) - to reduce the stresses across the semiconductors devices, and to improve the total harmonic distortion of the output volt-age. Throughout the work, the necessity to digitalize the proposed technique has been evi-denced due to the high complexity and low reliability inherent to the analogical approach. Thus, the digital controller FPGA has been chosen, as it is easy to program and reconfigure, works at high speed, and has a lot of input and output pins. Additionally, other modulation techniques were also implemented to compare their performance with the proposed one, pre-senting the switching patterns and the behavior of the electrical currents through the semicon-ductors for each modulation. A theoretical analysis was also performed for both topologies and their respective operation principle, characteristics, and equations used on the losses anal-ysis for the different combinations of modulation applied to each structure. Finally, the digital development of the various techniques has proved to be correct by observing the waveforms obtained through the digital/analogical circuit. Besides, the comparison of the modulation techniques on 6 kW NPC and FC three-level prototype inverters proved to be favorable to the proposed technique in terms of efficiency and total harmonic distortion reduction on both topologies, confirming its usefulness on high power multilevel converters. At last, it was pre-sented the application of the proposed modulation technique to inverters with more than three levels, where it was observed its eligibility for n-levels topologies.

In this thesis, field oriented control of permanent magnet synchronous motors using three-level neutral-point-clamped inverter is studied. Permanent magnet synchronous motors are used in high performance drive applications. In this study, the permanent magnet synchronous motor is fed by three-level neutral-point-clamped inverter. For three-level neutral-point-clamped inverter different space vector modulation algorithms, which are reported in literature, are analyzed and compared via computer simulations. The voltage balance on dc-link capacitors is also analyzed and a software control method is implemented in conjunction with the space vector PWM modulation, utilized. Nonlinear effects such as dead-time, semiconductor voltage drop and delays in gate drive circuitries also present in neutral-point-clamped inverter. The effects of these nonlinearities are studied and a compensation method for these nonlinear effects is proposed. The theoretical results are supported with computer simulations and verified with experimental results.

In this thesis, the neutral point potential drift/fluctuation of the three-level neutral point clamped inverter is analyzed and a novel control algorithm, the two-parameter PWM method is proposed to confine the neutral point potential variation to a very small range. The two-parameter PWM method provides superior neutral point potential control performance even with small DC bus capacitors. The method is based on PWM pulse pattern modification and requires no additional hardware. Detailed analytical models of the neutral point current and potential as a function of the modulation parameters are established and the neutral point potential behavior is thoroughly investigated. Based on the study, the deficiency of the known methods is illustrated and the two-parameter PWM method is developed and its superior performance demonstrated. The performance of the two-parameter PWM method is verified by means of computer simulations utilizing both the per-PWM-cycle average model and the detailed model of the inverter. The results are supported by laboratory experiments involving both an R-L load and an induction motor drive.

Made available in DSpace on 2016-12-12T20:27:38Z (GMT). No. of bitstreams: 1 Tiago Lemes.pdf: 2229669 bytes, checksum: 9b9cd44356c6d0002fccf67fe418f52b (MD5) Previous issue date: 2014-09-26 / Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / The main subject of this work is the study of a 5 levels T-Type NPC inverter topology, which is applied in photovoltaic energy processing for power generation. The grid power injection is done controlling converter current, which is injected into grid. This work presents equations, component-designs and their validation, which are necessary for the Inverter s power structure implementation. Also inverter modeling and design of implemented controllers are described. Through this study, it was possible to build a 3 kW prototype, which besides the current control, has a system to balance the differential voltage of bus capacitors. Through the prototype, experimental results were acquired. / O objeto de estudo deste trabalho é a topologia inversora NPC T-Type 5 níveis, aplicada no processamento da energia fotovoltaica, sendo o principal objetivo a geração de energia elétrica por meio do controle da corrente aplicada à rede. Este trabalho apresenta o equacionamento, projeto dos componentes e sua validação, que fazem parte da estrutura de potência do inversor, bem como a sua modelagem e projeto dos controladores implementados. Por intermédio deste estudo foi possível construir um protótipo com potência nominal de 3 kW, que além do controle da corrente, apresenta uma malha de equilíbrio da tensão diferencial do barramento. Mediante construção desse protótipo, foram extraídos os resultados experimentais.

No description available.

For decades, the Silicon-based semiconductors have been the solution for power electronics applications. However, these semiconductors have approached their limits of operation in blocking voltage, working temperature and switching frequency. Due to material superiority, the relatively-new wide-bandgap semiconductors such as Silicon-Carbide (SiC) MOSFETs enable higher voltages, switching frequencies and operating temperatures when compared to Silicon technology, resulting in improved converter specifications. The current study tries to investigate the impact of emerging medium-voltage SiC MOSFETs on industrial motor drive application, where over a quarter of the total electricity in the world is being consumed. Firstly, non-commercial SiC MOSFETs at 3.3 kV and 400 A rating are characterized to enable converter design and simulation based on them. In order to feature the best performance out of the devices under test, an intelligent high-performance gate driver is designed embedding required functionalities and protections. Secondly, total of three converters are targeted for industrial motor drive application at medium-voltage and high-power range. For this purpose the cascaded H-bridge, the modular multilevel converter and the 5-L active neutral point clamped converters are designed at 4.16-, 6.9- and 13.8 kV voltage ratings and 3- and 5 MVA power ratings. Selection of different voltage and power levels is done to elucidate variation of different parameters within the converters versus operating point. Later, comparisons are done between the surveyed topologies designed at different operating points based on Si IGBTs and SiC MOSFETs. The comparison includes different aspects such as efficiency, power density, semiconductor utilization, energy stored in converter structure, fault containment, low-speed operation capability and parts count (for a measure of reliability). Having the comparisons done based on simulation data, an H-bridge cell is implemented using 3.3 kV 400 A SiC MOSFETs to evaluate validity of the conducted simulations. Finally, a novel method is proposed for series-connecting individual SiC MOSFETs to reach higher voltage devices. Considering the fact that currently the SiC MOSFETs are not commercially available at voltages higher above 1.7 kV, this will enable implementation of converters using medium-voltage SiC MOSFETs that are achieved by stacking commercially-available 1.7 kV MOSFETs. The proposed method is specifically developed for SiC MOSFETs with high dv/dt rates, while majority of the existing solutions could only work merely with slow Si-based semiconductors. / Ph. D. / Despite their mature technology and low manufacturing cost, the traditional Si-based power semiconductors had reached their limitations in operation from different points of view. The SiC MOSFETs which are the new generation of power semiconductors however seem to be able to shift the existing boundaries of operation for the Si-based semiconductors, resulting in significant improvement in design and operation of power electronics converters. This dissertation focuses on investigating the impact of emerging medium-voltage SiC MOSFETs on industrial motor drives, which consume over 28% of the total electricity used in the world. Firstly, the state-of-the-art non-commercial 3.3 kV SiC MOSFETs are characterized. Characterization of the devices is done to extract their key features such as switching and conduction losses, to enable loss calculation and performance evaluation in any target application. Since the mentioned devices are not commercial yet, the gate driving circuitry that can feature the best performance out of them are not commercially available either. Thus, the characterization process starts with design of an intelligent high-performance gate driver for the devices under test. Secondly, total of three topologies that are targeted for the study are discussed and their basics of operation is investigated. For this purpose the cascaded H-bridge, the modular multilevel converter and the 5-L active neutral point clamped converters are designed at three different voltage levels (4.16-, 6.9- and 13.8 kV) and two power levels (3- and 5 MVA). Selection of different voltage and power levels is done to enable comparison from different aspects as the operating point changes. Later, comparisons are done between the surveyed topologies designed at different operating points using different semiconductor technologies. The performed comparisons provide an unbiased input for the manufacturers and customers of these converters for selection of the target topology in motor drive application. Also to verify validity of the conducted simulations and calculations, a full-bridge converter cell is experimentally implemented using 3.3 kV 400 A SiC MOSFETs. Finally, a novel method is proposed for series-connecting lower-voltage SiC MOSFETs to reach higher-voltage devices. As of late 2017, the medium-voltage SiC MOSFETs are not commercially available. Also it is expected that upon commercialization, their price will be multiple times of that of low-voltage SiC MOSFETs. Thus, connecting lower-voltage SiC MOSFETs in series is an effective way of achieving higher-voltage devices and take advantage of superior properties if the SiC MOSFETs, while the availability and high cost problems are taken care of.

Conventional 2-level inverters have been quite popular in industry for drives applications. It used pulse width modulation techniques to generate a voltage waveform with high quality. For achieving this, it had to switch at high frequencies and also the switching is between 0 and Vdc. Also additional LC filters are required before feeding to a motor. 3-phase IM is the work horse of the industry. Several speed control techniques have been established namely the V/f control technique and for high performance, vector control is adopted. An electric drive system comprises of a rectifier, inverter, a motor and a load. each module is a topic by itself. This thesis work discusses the novel inverter topologies to overcome the demerits of a conventional 2-level inverter or even the basic multilevel topologies, for an electric drive. The word ‘multilevel’ itself signifies that inverter can generate more than two levels. The idea was first originated by Nabae, Takahashi and Akagi to bring an additional voltage level so that the waveform becomes a quasi square wave. This additional voltage level brought additional benefits in terms of reduced dv/dt and requirement of low switching frequency. But this was not without any cost. The inverter structure is slightly more complicated than a 2-level and also required more devices. But the advantage it gave was superior enough to such an extent that the above topology (popularly known as NPC) has become quite popular in industry. This topology was later modified to equalize the semiconductor losses among switches by replacing the clamping diodes with controllable switches and such topologies are popularly known as Active NPCs (ANPCs) because of the replacement of diodes with active switches. 3-level flying capacitors were then introduced where the additional voltage level is provided using charged capacitors. But this capacitor voltage has to be maintained at its nominal value during the inverter operation. An additional floating capacitor, which is an electrolytic capacitor is needed for this. Increasing the number of electrolytic capacitors reduces the reliability of the inverter drive since they are the weakest link in any inverters and its count has to be kept to the minimum. By using a H-bridge cell in each of the three phases, three voltage levels can be easily obtained.This is commonly known as Cascaded H-bridge (CHB) multilevel inverter. The above three topologies have been discussed with respect to generation of three pole voltage levels and these topologies are quite suited also. A higher number of voltage levels will reduce the switching frequency even lesser and also the dv/dt. On increasing the number of levels further and further, finally the inverter need not do any PWM switching and just generating the levels is sufficient enough for a good quality waveform and also low dv/dt. But when the above topologies are scaled for more than three voltage levels, all of them suffer serious drawbacks which is briefly discussed below. The diode clamped inverter (known as NPC if it is 3-level), when extended to more than three levels suffers from the neutral point balancing issue and also the count of clamping diodes increase drastically. FC inverters, when extended beyond 3-level, the number of electrolytic capacitors increases and also balancing of these capacitors to their nominal voltages becomes complicated. In the case of multilevel CHB, when extended beyond 3-level, the requirement of isolated DC sources also increases. To generate isolated supplies, phase shifting transformer and 8, 12 or 24 pulse diode rectifier is needed which increases the weight , size and cost of the drive. Therefore its application is limited. In this thesis, the aim is to develop a novel method to develop a multilevel inverter without the drawbacks faced by the basic multilevel topologies when scaled for higher number of voltage levels. This is done through stacking the basic or hybrid combination of these basic multilevel topologies through selector switches. This method is experimentally verified by stacking two 5-level inverters through a 2-level selector switch (whose switching losses can be minimized through soft cycle commutation). This will generate nine levels.Generating 9-levels through scaling the basic topologies is disadvantageous, the comparison table is provided in the thesis. This is true for any higher voltage level generation. Each of the above 5-level inverter is developed through cascading an FC with a capacitor fed H-bridge. The device count can be reduced by making the FC-CHB module common to the selector switches by shifting the selector switches between the DC link and the common FC-CHB module. Doing so, reduces the modular feature of the drive but the device count can be reduced. The FFT plot at different frequencies of operation and the switching losses of the different modules-FC, CHB and the selector switches are also plotted for different frequencies of operation. The next step is to check whether this method can be extended to any number of stackings for generation of more voltage levels. For this, a 49-level inverter is developed in laboratory by stacking three 17-level inverters. Each of the 17-level inverter is developed by cascading an FC with three CHBs. When there are 49 levels in the pole voltage waveform, there is no need to do any regular PWM since the output waveform will be very close to a sine wave even without any PWM switching. The technique used is commonly known in literature as Nearest Level Control (NLC). This method of stacking and cascading has the advantage that the FC and the CHB modules now are of very low voltages and the switching losses can be reduced. The switching losses of the different modules are calculated and plotted for different operating frequencies in the thesis. To reduce the voltages of the modules further, a 6-phase machine has been reconfigured as a 3-phase machine, the advantage being that now the DC link voltage requirement is half of that needed earlier for the same power. This further reduces voltages of the modules by half and this allows the switches to be replaced with MOSFETs, improving the efficiency of the drive. This topology is also experimentally verified for both steady state and transient conditions. So far the research focussed on a 3-phase IM fed through a stacked MLI. It can be observed that a stacked MLI needs as many DC sources as the number of stackings. A 6-phase machine apart from reduced DC link voltage requirement, has other advantages of better fault tolerant capability and better space harmonics. They are serious contenders for applications like ship propulsion, locomotive traction, electric vehicles, more electric aircraft and other high power industrial applications. Using the unique property of a 6-phase machine that its opposite windings always draw equal and opposite current, the neutral point (NP) (formed as a result of stacking two MLIs) voltage can be balanced. It was observed that the net mid point current drawn from the mid point can be made zero in a switching interval. It was later observed that with minimal changes, the mid point current drawn from the NP can be made instantaneously zero and the NP voltage deviation is completely arrested and the topology needs only very low capacity series connected capacitors energized from a single DC link. This topology is also experimentally verified using the stacked 9-level inverter topology discussed above but now for 6-phase application and experimental results are provided in the thesis. Single DC link enables direct back to back conversion and power can be fed back to the mains at any desired power factor. All the experimental verification is done on a DSP (TMS320F28335) and FPGA (Spartan 3 XCS3200) platform. An IM is run using V/f control scheme and the above inverter topologies are used to drive the motor. The IGBTs used are SKM75GB123D for the stacked 9-level inverter in the 3-phase and 6-phase experiments. For the 49-level inverter experiment, MOSFETs-IRF260N were used. Both steady state and transient results ensure that the proposed inverter topologies are suitable for high power applications.

In the past two decades the core aircraft technology is going through a drastic change. The traditional technologies that is almost half a century old, is going through a complete revamp. In the new “More Electric Aircraft” technology many mechanical, pneumatic and hydraulic systems are being replaced by electrical and power electronic systems. Airbus-A380, Boeing B-787 are the pioneers in the family of these new breed of aircrafts. As the aircraft technology is moving towards “More Electric”, more and more electric motors and motor controllers are being used in new aircrafts. Number of electric motor drive systems has increased by about ten times in more electric aircrafts compared to traditional aircrafts. Weight of any electric component that goes into aircraft needs to be low to reduce the overall weight of aircraft so as to improve the fuel efficiency of the aircraft. Hence there is an increased need to reduce weight of motors and motor controllers in commercial aircraft. High speed ironless axial flux permanent magnet brushless dc motors are becoming popular in the new more-electric aircrafts because of their ability to meet the demand of light weight, high power density, high efficiency and high reliability. However, these motors come with very low inductance, which poses a big challenge to the motor controllers in controlling the ripple current in motor windings. Multilevel inverters can solve this problem. Three-level inverters are proposed in this thesis for driving axial flux BLDC motors in aircraft. Majority of the motors in new more electric aircrafts are in the power range of 2kW to 20kW, while a few motor applications being in the range of 100kW to 150kW. Motor controllers in these applications run from 270Vdc or 540Vdc bus which is the standard in new more electric aircraft architecture. Multilevel Inverter is popular in the industry for high power and high voltage applications, where high-voltage power switching devices like IGBT, GTO are popularly used. However multilevel inverters have not been tried in the low power range which is appropriate for aircraft applications. A detail analysis of practical feasibility of constructing three-level inverter in lower power and voltage level is presented in this thesis. Analysis is presented that verify the advantages of driving low voltage and low power (300Vdc to 600Vdc and less than 100kW) motors with multilevel inverters. Practical considerations for design of MOSFET based three-level inverter are investigated and topological modifications are suggested. The effect of clamping diodes in the diode clamped multilevel inverters play an important role in determining its efficiency. SiC diodes are proposed to be used as clamping diodes. Further, it is realised that power loss introduced by reverse recovery of MOSFET body diode prohibits use of MOSFET in hard switched inverter legs. Hence, a technique of avoiding the reverse recovery losses of MOSFET body diode in three-level NPC inverter is conceived. The use of proposed multilevel inverter topology enables operation at high switching frequency without sacrificing efficiency. High switching frequency of operation reduces the output filter requirement, which in turn helps reducing size of the inverter. In this research work elaborate trade-off analysis is done to quantify the suitability of multilevel inverters in the low power applications. For successful operation of three-level NPC inverter in aircraft electrical system, it is important for the DC bus structure in aircraft electric primary distribution system to be compatible to drive NPC inverters. Hence a detail study of AC to DC power conversion system as applied to commercial aircraft electrical system is done. Multi-pulse rectifiers using autotransformers are used in aircrafts. Investigation is done to improve these rectifiers for future aircrafts, such that they can support new technologies of future generation motor controllers. A new 24-pulse isolated transformer rectifier topology is proposed. From two 15º displaced 6-phase systems feeding two 12-pulse rectifiers that are series connected, a 24-pulse rectifier topology is obtained. Though, windings of each 12-pulse rectifiers are isolated from primary, the 6-phase generation is done without any isolation of the transformer windings. The new 24-pulse transformer topology has lower VA rating compared to standard 12-pulse rectifiers. Though the new 24-pulse transformer-rectifier solution is robust and simple, it adds to the weight of the overall system, as compared to the present architecture as the proposed topology uses isolated transformer. Non-isolated autotransformer cannot provide split voltage at the dc-link that creates a stable mid-point voltage as required by the three-level NPC inverter. Hence, a new front-end AC-DC power conversion system with switched capacitor is conceived that can support motor controllers driven by three-level inverters. Laboratory experimental results are presented to validate the new proposed topology. In this proposed topology, the inverter dc-link voltage is double the input dc-link voltage. An intense research work is performed to understand the operation of Trapezoidal Back EMF BLDC motor driven by three-Level NPC inverter. Operation of BLDC motor from three-Level inverter is primarily advantageous for low inductance motors, like ironless axial flux motors. For low inductance BLDC motor, very high switching frequency is required to limit the magnitude of ripple current in motor winding. Three-level inverters help limiting the magnitude of motor ripple current without increasing the switching frequency to very high value. Further, it is analysed that dc link mid-point current in three-level NPC inverter for driving trapezoidal BLDC motor has a zero average current with fundamental frequency same as switching frequency. Because of this, trapezoidal BLDC motors can easily be operated from three-level NPC inverter without any special attention given to mid-point voltage unbalance. One non-ideal condition arrives in practical implementation of the inverter that leads to non-zero average mid point current. Unequal gate drive dead time delays from one leg to other leg of inverter introduce dc-link mid-point voltage unbalance. For the motoring mode operation of trapezoidal BLDC motor drive, simple gate drive logic is researched that eliminates need of the gate drive dead-time, and hence solves the mid-point voltage unbalance issue. Simple closed loop control scheme for mid-point voltage balancing also is also proposed. This control scheme may be used in applications where very precise control of speed and torque ripple is warranted. All the investigations reported in this thesis are simulated extensively on MATHCAD and MATLAB platform using SIMULINK toolbox. A laboratory experimental set-up of three-Level inverter driving axial flux BLDC motor is built. The three-level inverter, operating from 300Vdc bus is built using 500V MOSFETs and 600V SiC diodes. All the control schemes are implemented digitally on digital signal processor TMS320F2812 DSP platform and GAL22V10B platforms. Experimental results are collected to validate the theoretical propositions made in the present research work. At the end, in chapter 5, some future works are proposed. A new external voltage balance circuit is proposed where the inverter dc-link voltage is same as the input dc-link voltage. This topology is based on the resonant converter principle and uses a lighter resonant inductor than prior arts available in literature. Detail simulation and experimentation of this topology may be carried out to validate the industrial benefits of this circuit. It is also thought that current source inverters may work as an alternative to voltage source inverters for driving BLDC motors. Current source inverters eliminate use of bulky DC-link capacitors. Long term reliability of current source inverters is higher than voltage source inverters due to the absence of possibility of shoot-through. Further, in voltage source inverters, the voltage at the motor terminal is limited by the source voltage (dc-link voltage). This issue is eliminated in current source inverters. An interface circuit is conceived to reduce the size of dc-link inductors in current source inverters, pending detail analysis and experimental verification. The interface circuit bases its fundamentals on the principles of operation of multilevel inverters for BLDC motors that is presented in this thesis.

Controlling the dynamic outputs of electrical machines has always been an essential topic in aerospace, automotive and other industries. Electrical machine control consists of several components, each of which can be controlled in various ways. Whereas the dynamic responses are mostly simulated using MATLAB/SIMULINK, Prof. Marko Hinkkanen from Aalto University has launched a project for the development of an open-source simulator called ’Motulator’, based on Python. In this thesis, we focus on developing modulation methods and related functions for the inverter in ’Motulator’ based on an existing model of a Permanent Magnet Electrical Machine (PMSM). First, the two-level and three-level inverters with the Space Vector Modulation (SVPWM) method are developed. The dynamic output performance improves significantly compared to Sinusoidal Pulse-Width Modulation (SPWM). In addition, operation under the over-modulation mode for both inverters is implemented to improve the DC-bus voltage utilisation further, allowing higher torques and speeds. The problem of neutral point voltage imbalance is solved for the three-level inverter, ensuring the difference voltage between upper and lower capacitors to fluctuate around 0. Finally, a harmonic analysis tool based on the non-uniform Fourier transform is established. / Styrning och reglering av elektriska maskiners dynamik har alltid varit ett viktigt ämne inom flyg- och bilindustrin men även för andra tillämpningar. Regleringen av elektriska maskiner består av flera delar som var och en kan styras på olika sätt. De dynamiska förhållandena simuleras vanligen i MATLAB/SIMULINK. För att inte vara beroende av kommersiell programvara har Professor Marko Hinkkanen från Aalto universitetet lanserat en simulator med öppen källkod, baserad på Python, kallad ’Motulator’. Examensarbetet fokuserar vi på att utveckla moduleringsmetoder och relaterade funktioner för växelriktaren i ’Motulator’, baserat på en befintlig modell av en permanentmagnetiserad synkronmaskin (PMSM). Först utvecklas två- och trenivåomriktare med ”Space Vector Modulation” (SVPWM). Drivsystemets dynamisk prestanda förbättras därvid avsevärt i jämförelse med Sinus-pulsbreddsstryning (Sinusoidal-PWM). Övermodulering har implementerats för båda växelriktarna i avseende att ytterligare förbättra DC-bussens spänningsutnyttjande, vilket möjliggör högre vridmoment och varvtal. Problemet med nollpunktsspänningens obalans är löst för trenivåomriktaren, vilket säkerställer att skillnadsspänningen mellan de övre och nedre kondensatorerna fluktuerar runt 0. Slutligen har ett verktyg utvecklats i syfte att analysera övertoner, baserat på en olikformig Fouriertransform.

Die Bundesregierung plant im Rahmen der Energiewende den Anteil von erneuerbaren Energien an der Stromerzeugung in Deutschland von heute rund 25% auf 80% bis zum Jahr 2050 auszubauen. Damit stehen auch dem Stromsektor in Sachsen grundlegende Veränderungen bevor. Derzeit leistet im Freistaat Sachsen die Braunkohle den größten Beitrag zur Elektrizitätsbereitstellung. Mit dem zunehmenden Ausbau an erneuerbaren Energien steigt der Anteil dargebotsabhängiger Energieträger. Daraus resultieren technische und wirtschaftliche Herausforderungen für das bestehende Energiesystem, wie z.B. die künftige Bereitstellung von Systemdienstleistungen. Mit diesen und weiteren Fragestellungen zur Transformation des Elektrizitätssystems haben sich Nachwuchswissenschaftler der TU Dresden in den vergangenen zwei Jahren im Rahmen des vom Europäischen Sozialfonds – ESF geförderten Projekts EnerSAX auseinander gesetzt. Neben der Erstellung einer Potenzialanalyse für Sachsen wurden sowohl technische Fragestellungen,wie z.B. die Auswirkungen der Integration erneuerbarer Energien auf die Übertragungs-, Verteilungs-und Niederspannungsnetze, als auch ökonomische Fragestellung, wie z.B. die künftige Ausgestaltung der Regelenergiemärkte, untersucht. Durch die Zusammenarbeit der Nachwuchsforscher aus den Bereichen der Elektrotechnik und Energiewirtschaft konnten so integrierte Lösungsansätze zur Ausgestaltung einer weitgehend auf erneuerbaren Energien beruhenden Energieversorgung mit dem Fokus auf Sachsen im transnationalen Kontext erarbeitet werden. Die wesentlichen Ergebnisse aus dem Projekt werden in diesem Buch vorgestellt.