Silicon in single crystal form has been the material of choice for the first demonstration of the MIT microengine project. However, because it has a relatively low melting temperature, silicon is not an ideal material for the intended operational environment of high temperature and stress. In addition, preliminary work indicates that single crystal silicon has a tendency to undergo localized deformation by slip band formation. Thus it is critical to obtain a better understanding of the mechanical behavior of this material at elevated temperatures in order to properly exploit its capabilities as a structural material. Creep tests in simple compression with n-type single crystal silicon, with low initial dislocation density, were conducted over a temperature range of 900 K to 1200 K and a stress range of 10 MPa to 120 MPa. The compression specimens were machined such that the multi-slip <100> or <111> orientations were coincident with the compression axis. The creep tests reveal that response can be delineated into two broad regimes: (a) in the first regime rapid dislocation multiplication is responsible for accelerating creep rates, and (b) in the second regime an increasing resistance to dislocation motion is responsible for the decelerating creep rates, as is typically observed for creep in metals. An isotropic elasto-viscoplastic constitutive model that accounts for these two mechanisms has been developed in support of the design of the high temperature turbine structure of the MIT microengine. / Singapore-MIT Alliance (SMA)

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<p> The properties and device applications of silicon thin films vacuum evaporated both onto single crystal silicon and onto silicon dioxide substrates have been investigated. </p> <p> The feasibility of obtaining device quality homoepitaxial silicon thin films by vacuum evaporation onto non heat-treated substrates having temperatures of 700°C has been demonstrated. A new technique, that of gas-doping, has been developed and has been shown to be capable of reproducibly introducing controlled concentrations of doping impurities in the range applicable to device fabrication into the deposited layers. The combined deposition-doping technique has been employed in the production of silicon layers containing impurity steps more abrupt than may be obtained by conventional fabrication techniques. </p> <p> The electrical properties of the vacuum evaporated homoepitaxial silicon layers have been shown to be comparable in most respects to those of bulk high purity single crystal silicon. The characteristics of rectifying and of varactor diodes prepared by the technique of vacuum evaporation combined with gas doping have been considered. </p> <p> Silicon films evaporated onto Si02 substrates have been shown to possess structures ranging from amorphous through randomly oriented polycrystalline to oriented polycrystalline as the substrate temperature is increased from 25°C to 850°C. The electrical characteristics of doped polycrystalline films obtained both by vacuum evaporation combined with gas doping and by the diffusion-annealing of amorphous films have been shown to be comparable with those reported for similar material deposited by chemical techniques. The experimentally observed properties of the disordered material have been qualitatively explained employing an inhomogeneous film model. The suitability of thin films of doped polycrystalline silicon on sio2 substrates for the production of high value resistors for monolithic integrated circuits has been considered. </p> / Thesis / Doctor of Philosophy (PhD)

The need for miniaturized frequency-selective components in electronic systems is clear. The questions are whether and how micro-electro-mechanical systems (MEMS) can satisfy the need. This dissertation aims to address these questions from a scientific perspective. Silicon is the focus of this work, as it can benefit from scaling of the semiconductor industry. Silicon also offers many technical advantages. The characteristics of silicon resonators from 32 kHz to 1 GHz are described. The temperature stability and phase noise of a 6-MHz temperature-compensated oscillator and a 100-MHz temperature-controlled oscillator are reported. Silicon resonator design and characterization, with a focus on quality factor, linearity, and the electrical equivalent circuit, are included. Electrical tuning, electromechanical coupling, finite element modeling, and unexpected findings of these resonators are also described. A manufacturability technique employing batch process compensation is demonstrated. Results indicate that silicon is an excellent material for micromechanical resonators. The aim of this research is to explore the fundamental limitations, provide a foundation for future work, and also paint a clearer picture on how micromechanical resonators can complement alternative technologies.

The solid-state interaction of palladium (Pd) with single crystal silicon carbide (6H- SiC) before and after annealing has been investigated using Rutherford backscattering spectrometry (RBS) in conjunction with RUMP simulation package, time-of-flight elastic recoil detector analysis (ToF-ERDA), glancing incident X-ray diffraction (GIXRD) and scanning electron microscopy (SEM). A thin layer of Pd (500 A) was deposited onto a clean 6H-SiC substrate at room temper- ature. The prepared difusion couples were then annealed in vacuum at different annealing temperatures for a maximum period of 1 h. The annealing temperature ranged from 2000C to 8000C. The composition of the as-deposited and the annealed samples was measured by using a He+ beam with an energy of 1.6 MeV. The ToF-ERDA measurements were per- formed on the as-deposited sample by using a high energy copper beam (about 30 MeV) for elemental depth distribution. The GIXRD measurements performed on the samples were able to identify the phases that form before and after annealing. The SEM micrograph obtained during this study gave some insight on the surface morphology of the samples before and after annealing. Our results obtained during this study showed that Pd reacts with SiC after annealing at 4000C resulting in the formation of metal-rich silicides and some unreacted Pd. Annealing at higher temperatures (5000C and 6000C) produced metal-rich silicides, which continued to grow until all the Pd has been consumed. Annealing at even higher temperatures (7000C and 8000C), the metal-rich silicides disappear and the silicon rich silicides start appearing. These appear by simply consuming the metal-rich silicides, resulting in the formation of two or more phases. The behaviour of the interaction between Pd with 6H-SiC is different than the Pd-Si system. The reaction temperature of the Pd/SiC are much more higher than those of the Pd/Si system. That is, Pd reacts with Si at temperatures as low as 2500C, while it starts to react with SiC at an annealing temperature of 4000C. In addition to this silicides such as Pd9Si2, Pd4Si form at the initial reaction temperature followed by the formation of the Pd2Si phase at the temperatures above 6000C for the Pd/SiC system. Meanwhile in the Pd/Si system the Pd2Si phase remains stable even after annealing at 8000C. No carbon compounds were observed in the temperature range used in this study and the formation of silicides were found to be accompanied by the formation of free carbon which remained immobile in the system. / Dissertation (MSc)--University of Pretoria, 2012. / Physics / unrestricted

京都大学 / 0048 / 新制・課程博士 / 博士(工学) / 甲第19184号 / 工博第4061号 / 新制||工||1626(附属図書館) / 32176 / 京都大学大学院工学研究科マイクロエンジニアリング専攻 / (主査)教授 田畑 修, 教授 琵琶 志朗, 准教授 土屋 智由, 教授 松原 厚 / 学位規則第4条第1項該当 / Doctor of Philosophy (Engineering) / Kyoto University / DFAM

京都大学 / 新制・課程博士 / 博士(工学) / 甲第24228号 / 工博第5056号 / 新制||工||1789(附属図書館) / 京都大学大学院工学研究科マイクロエンジニアリング専攻 / (主査)教授 土屋 智由, 教授 平方 寛之, 教授 江利口 浩二 / 学位規則第4条第1項該当 / Doctor of Philosophy (Engineering) / Kyoto University / DFAM

Σκοπός της παρούσας διπλωματικής εργασίας είναι η μελέτη της επίδρασης της γωνίας πρόσπτωσης της ηλιακής ακτινοβολίας στη λειτουργία φωτοβολταϊκών κυττάρων, σε περιοχές μεσαίου γεωγραφικού πλάτους. Συγκεκριμένα μελετήθηκε η επίδραση της γωνίας αυτής στη λειτουργία δύο ΦΒ πλαισίων ενός μονοκρυσταλλικού πυριτίου (sc-Si) και ενός δισεληνοϊδιούχου χαλκού (CIS). Τα πλαίσια τοποθετήθηκαν σε ταράτσα κτηρίου του Τμήματος Ηλεκτρολόγων Μηχανικών και Τεχνολογίας υπολογιστών του Πανεπιστημίου Πατρών. Οι μετρήσεις ξεκίνησαν τον Οκτώβριο του 2009 και ολοκληρώθηκαν το Σεπτέμβριο του 2010. Τα ΦΒ πλαίσια είχαν νότιο προσανατολισμό δεδομένου ότι τοποθετήθηκαν σε τόπο του βόρειου ημισφαιρίου με γεωγραφικό πλάτος 38ο 32’ . Κατά την πειραματική διαδικασία οι μετρήσεις γίνονταν σε πολλαπλές κλίσεις κάθε φορά και για τα δύο πλαίσια . Μετρήθηκαν το ρεύμα βραχυκύκλωσης, η τάση ανοιχτοκυκλώσεως, η θερμοκρασία πλαισίου και η ηλιακή ακτινοβολία. Υπολογίστηκε ο βαθμός απόδοσης , ο συντελεστή ποιότητας και η γωνία πρόσπτωσης, ανά κλίση ΦΒ πλαισίου. Υλοποιήθηκε αλγόριθμος για τον θεωρητικό υπολογισμό της βέλτιστης γωνίας κλίσης έτσι ώστε η γωνία πρόσπτωσης να γίνεται ελάχιστη ανά χρονική στιγμή (μέγιστης παραγόμενης ενέργειας ) και έγινε σύγκριση της με τα πειραματικά αποτελέσματα. Διαπιστώσαμε πειραματικά την εξάρτηση της παραγόμενης ισχύος από την γωνία πρόσπτωσης της ηλιακής ακτινοβολίας . Επιπλέον μέσω της πειραματικής διαδικασίας υπολογίστηκε η βέλτιστη κλίση πλαισίων ανά εποχή για τόπους γεωγραφικού πλάτους ίδιου με τον τόπο των πειραματικών μετρήσεων . / -

Design and analysis of polysilicon and single crystal silicon gyroscopes have been carried out. Variations in suspension design have been explored. Designs that utilize in-plane and out-of-plane sensing are studied. Damping plays an important role in determining the sense response. Reduction in damping directly affects sensor performance. The various damping mechanisms that are prevalent in gyroscopes are studied. Perforations on the proof mass are observed to significantly reduce the damping in the device when operated in air. The effects of perforation geometry and density have been analyzed. The analysis results show that there is a two orders of magnitude reduction in damping of thick gyroscope structures with optimized perforation design. Equivalent circuit lumped parameter models have been developed to analyze gyroscope performance. The simulation results of these models have been compared with results obtained from SABER, a MEMS specific system level design tool from Coventor-ware. The lumped parameter models are observed to produce faster simulation results with an accuracy comparable to that of Coventorware Three gyroscopes specific to the PolyMUMPS fabrication process have been designed and their performance analyzed. Two of the designs sense motion out-of-plane and the other senses motion in-plane. Results of the simulation show that for a given damping, the gyro design with in-plane modes gives a resolution of 4◦/s. The out-of-plane gyroscopes have two variations in suspension. The hammock suspension resolves a rate of 25◦/s in a 200 Hz bandwidth while the design with folded beam suspension resolves a rate of 2◦/s in a 12 Hz bandwidth. A single crystal silicon in-plane gyroscope has been designed with vertical electrodes to sense Coriolis motion. This design gives an order of magnitude higher capacitance change for a given rotation in comparison to conventional comb-finger design. The effects of process induced residual stress on the characteristic frequencies of the polysilicon gyroscopes are also studied. The in-plane gyroscope is found to be robust to stress variations. Analysis results indicate that the tuning fork gyroscope with the hammock suspension is the most susceptible to compressive residual stress, with a significant drop in sensitivity at high stress values.

Au vu des limitations rencontrées par la miniaturisation des circuits microélectroniques, l’augmentation de performances des systèmes repose largement aujourd’hui sur la fabrication d’empilements de couches minces complexes et innovants pour offrir davantage de compacité et de flexibilité. L’intérêt grandissant pour la réalisation de structures innovantes temporaires, i.e. permettant de réaliser des circuits sur les deux faces d’un même film, nous a mené à évaluer les potentialités d’une technologie combinant le transfert de films minces monocristallins, i.e. la technologie Smart Cut™, et un procédé de de porosification partielle du silicium afin de mettre au point une technologie de double report de film monocristallin. En ce sens, des substrats de silicium monocristallin ont été partiellement porosifiés par anodisation électrochimique. La mise en œuvre de traitements de substrats partiellement poreux a nécessité l’emploi de techniques de caractérisation variées pour dresser une fiche d’identité des couches minces poreuses après anodisation et évaluer l’évolution des propriétés de ces couches en fonction des différents traitements appliqués. Les propriétés chimiques, structurales et mécaniques des couches de Si poreux ont ainsi été étudiées via l’utilisation de différentes techniques de caractérisation (XPS-SIMS, AFM-MEB-XRD, nanoindentation, technique d’insertion de lame, etc.). Ces études ont permis d’appréhender et de décrire les mécanismes physiques mis au jeu au cours des différents traitements et de déterminer les caractéristiques {porosité, épaisseur} optimales des couches poreuses compatibles avec les séquences de la technologie proposée. La technologie Smart Cut™ a ainsi été appliquée à des substrats partiellement porosifiés menant à la fabrication réussie d’une structure temporaire de type Silicium-sur-Isolant avec une couche de silicium poreux enterrée. Ces structures temporaires ont été « démontées » dans un second temps par collage polymère ou collage direct et insertion de lame menant au second report de film mince monocristallin par rupture au sein de la couche porosifiée et donc fragile. Les structures fabriquées ont été caractérisées pour vérifier leur intégrité et leurs stabilités chimique et mécanique. Les propriétés cristallines du film mince de Si monocristallin, reporté en deux temps, ont été vérifiées confirmant ainsi la compatibilité des structures fabriquées avec des applications microélectroniques telles que les applications de type « Back-Side Imager » nécessitant une implémentation de composants sur les deux faces du film. Ainsi une technologie prometteuse et performante a pu être élaborée permettant le double report de films minces monocristallins et à fort potentiel pour des applications variées comme les imageurs visibles ou le photovoltaïque. / As scaling of microelectronic devices is confronted from now to fundamental limits, improving microelectronic systems performances is largely based nowadays on complex and innovative stack realization to offer more compaction and flexibility to structures. Growing interest in the fabrication of innovative temporary structures, allowing for example double sided layer processing, lead us to investigate the capability to combine one technology of thin single crystalline layer transfer, i.e. the Smart Cut™ technology, and partial porosification of silicon substrate in order to develop an original double layer transfer technology of thin single crystalline silicon film. To this purpose, single crystalline silicon substrates were first partially porosified by electrochemical anodization. Application of suitable treatments of porous silicon layer has required the use of several characterization methods to identify intrinsic porous silicon properties after anodization and to verify their evolution as function of different applied treatments. Chemical, structural and mechanical properties of porous silicon layers were studied by using different characterization techniques (XPS-SIMS, AFM-MEB-XRD, nanoindentation, razor blade insertion, etc.). Such studies allowed comprehending and describing physical mechanisms occurring during each applied technological steps and well determining appropriated {porosity, thickness} parameters of porous silicon layer with the developed technological process flow. The Smart Cut™ technology was successfully applied to partially porosified silicon substrates leading to the fabrication of temporary SOI-like structures with a weak embedded porous Si layer. Such structures were then “dismantled” thanks to a second polymer or direct bonding and razor blade insertion to produce a mechanical rupture through the fragile embedded porous silicon layer and to get the second thin silicon film transfer. Each fabricated structure was characterized step by step to check its integrity and its chemical and mechanical stabilities. Crystalline properties of the double transferred silicon layer were verified demonstrating the compatibility of such structures with microelectronic applications such as “Back-Side Imagers” needing double-sided layer processing. Eventually, a promising and efficient technology has been developed to allow the double transfer of thin single crystalline silicon layer which presents a high potential for various applications such as visible imagers or photovoltaic systems.