In the thesis the design of the Data Storage System (DSS) is proposed with the respect to the V-Model methodology. The design is based on users requirements, from which the system requirements are created and the technical specification of the DSS is developed. In the technical specifications the functionality of the DMM and HMI DSS subsystems are described and sub-system requirements are assigned to them, then they are subdivided and assigned to individual DMM (Data memory module) and HMI hardware items. Moreover, requirements are analyzed on hardware items, specific electronic components, are selected and implemented into the block design of the DMM hardware. Based on the block design of hardware, the hardware of the DMM subsystem is designed, selectively simulated and implemented along with the printed circuit board. On the implemented hardware of the DMM subsystems measurements are performed in order to verify the basic functionality of the hardware and the calculated, assimilated and measured values are compared as well. At the end of the thesis there is a short description of the implementation of the software design and its use for basic initialization of the selected processor, together with the verification of its basic function - measuring the frequency of the internal clock sources and the clock domains. The work is completed by sending a message of defined parameters to the selected communication line and sapling it by an oscilloscope, so that the basic function of the DMM subsystem is verified.

Safety-critical applications employed in automotive, avionics and aerospace domains are placed under strict demands for performance, power efficiency and fault tolerance. Development of system hardware and software satisfying all criteria is challenging and time-consuming. System co-design based on specifications and desired high-performance requirements, is one solution to this problem, however, it remains a largely unexplored territory. Currently at KTH Royal Institute of Technology, a co-design framework in relation to theoretical system design models is being researched with the objective to move the embedded system design to a higher abstraction level. Presently, it focuses on correct-by-construction design of low power and reliable safety-critical systems. This thesis intends to assess the accuracy of this framework in comparison to conventional design approaches. The accuracy is evaluated empirically in terms of extra functional requirements - average total power consumption and Mean Time Between Failure (MTBF). A simple payload Central Direct Memory Access (CDMA) application is integrated with Xilinx Soft Error Mitigation (SEM) IP Core and source of system failure is a Single Event Upset (SEU) which occurs due to ionizing radiations. Measurements obtained from this reference system are compared to results determined theoretically from model related equations for the same system. Comparison of measured MTBF values with theoretical estimations shows that measured ones are higher by an average huge difference of 324.63%. Similarly for power consumption, measurements were found to be higher than estimated ones by 0.4465 Watts. In conclusion, it can be said that theoretical model design framework is not accurate and models must somehow take into account implementation dependent factors. Nevertheless, this case study provided a good insight and pathways for enhancements and optimizations to turn this reference into a dependable platform. Finally, future work required for desirable experiment system improvements are identified. / Säkerhetskritiska applikationer som används inom fordons-, flyg- och flygindustrin ställs strikta krav på prestanda, energieffektivitet och feltolerans. Utveckling av systemhårdvara och mjukvara som uppfyller alla kriterier är utmanande och tidskrävande. Systemdesign baserad på specifikationer och önskade högpresterande krav är en lösning på detta problem, men det är fortfarande ett i stort sett outforskat område. För närvarande vid KTH Royal Institute of Technology undersöks ett ramverk för samdesign i relation till teoretiska systemdesignmodeller undersöks med målet att flytta den inbyggda systemdesignen till en högre abstraktionsnivå. Nuvarande, den fokuserar på korrekt konstruktion av låg effekt och pålitliga säkerhetskritiska system. Denna avhandling avser att bedöma riktigheten i detta ramverk i jämförelse med konventionella designmetoder. Noggrannheten utvärderas empiriskt när det gäller extra funktionskrav - genomsnittlig total strömförbrukning och medeltid mellan misslyckande (MTBF). En enkel nyttolast central direktminnesåtkomst (CDMA) applikation är integrerad med Xilinx begränsning av en händelse (SEM) IP kärnan och källan till systemfel är en singelhändelse upprörd (SEU) som uppstår på grund av joniserande strålning. Mätningar erhållna från detta referenssystem jämförs med resultat som bestämts teoretiskt från modellrelaterade ekvationer för samma system. Jämförelse av uppmätta MTBF -värden med teoretiska uppskattningar visar att uppmätta värden är högre med en genomsnittlig enorm skillnad på 324,63%. På samma sätt för strömförbrukning befanns mätningarna vara högre än beräknade med 0,4465 Watt. Sammanfattningsvis kan man säga att det teoretiska ramverket för modelldesign inte är korrekt och att modellerna på något sätt måste ta hänsyn till implementeringsberoende faktorer. Ändå gav denna fallstudie en bra insikt och vägar för förbättringar och optimeringar för att göra denna referens till en pålitlig plattform. Slutligen identifieras framtida arbete som krävs för önskvärda experimentsystemförbättringar.

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En la presente tesis se propone una metodología de desarrollo de estrategias híbridas para la mitigación de fallos inducidos por radiación en los sistemas empotrados modernos. La propuesta se basa en los principios del co-diseño de sistemas y consiste en la combinación selectiva, incremental y flexible de enfoques de tolerancia a fallos basados en hardware y software. Es decir, la exploración del espacio de soluciones se fundamenta en una estrategia híbrida de grano fino. El flujo de diseño está guiado por los requisitos de la aplicación. Esta metodología se ha denominado: co-endurecimiento. De esta forma, es posible diseñar sistemas embebidos confiables a bajo coste, donde no sólo se satisfagan los requisitos de confiabilidad y las restricciones de diseño, sino que también se evite el uso excesivo de costosos mecanismos de protección (hardware y software).

The traditional radiation testing of space electronics has been used for more than fifty years to support the radiation hardness assurance. Its typical goal is to ensure reliable operation of the spacecraft in the harsh environment of space. This PhD research looks into the radiation testing from a different perspective; the goal is to develop radiation testing methods that are focused not only on the reliability of the components but also on a continuous radiation-induced degradation of their performance. Such data are crucial for the understanding of the impact of radiation on the measurement uncertainty of data acquisition systems onboard research space missions.

State-of-the-art SiGe BiCMOS technologies leverage the maturity of deep-submicron silicon CMOS processing with bandgap-engineered SiGe HBTs in a single platform that is suitable for a wide variety of high performance and highly-integrated applications (e.g., system-on-chip (SOC), system-in-package (SiP)). Due to their bandgap-engineered base, SiGe HBTs are also naturally suited for cryogenic electronics and have the potential to replace the costly de facto technologies of choice (e.g., Gallium-Arsenide (GaAs) and Indium-Phosphide (InP)) in many cryogenic applications such as radio astronomy. This work investigates the response of mixed-signal circuits (both RF and analog circuits) when operating in extreme environments, in particular, at cryogenic temperatures and in radiation-rich environments. The ultimate goal of this work is to attempt to fill the existing gap in knowledge on the cryogenic and radiation response (both single event transients (SETs) and total ionization dose (TID)) of specific RF and analog circuit blocks (i.e., RF switches and voltage references). The design approach for different RF switch topologies and voltage references circuits are presented. Standalone Field Effect Transistors (FET) and SiGe HBTs test structures were also characterized and the results are provided to aid in the analysis and understanding of the underlying mechanisms that impact the circuits' response. Radiation mitigation strategies to counterbalance the damaging effects are investigated. A comprehensive study on the impact of cryogenic temperatures on the RF linearity of SiGe HBTs fabricated in a new 4th-generation, 90 nm SiGe BiCMOS technology is also presented.