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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
51

Optimized SIMD scheduling and architecture implementation for ultra-low energy bioimaging processor / Βελτιστοποιημένος χρονοπρογραμματισμός εντολών για παράλληλη επεξεργασία (SIMD) και υλοποίηση αρχιτεκτονικής για επεξεργαστή χαμηλής κατανάλωσης για αλγόριθμους βιοαπεικόνισης

Ψύχου, Γεωργία 03 August 2010 (has links)
On-line poultry monitoring can significantly improve living conditions of hens in industrial farms. A very low-cost low-energy solution needs to be provided though. ASIPs can be an ideal solution when they cover many submarkets and low-energy concepts are used for their realization. Aiming to high energy-efficiency, this work implements data parallelization, using a recently introduced software-controled SIMD realization in an innovative way. A manual mapping and scheduling effort of the most crucial part of the application leads to a highly optimized result, in terms of cycles, area and energy. This manual scheduling implementation must also be supported by a commercial compiler tool so that the design-time is minimized. Moreover, energy-efficient mapping must be explored for the remaining parts of the code. In that case, because the frequency of occurence of a part of the code is very low, more attention should be given to minimizing the area overhead. Increasing the energy efficiency of the data-path in such ways can be very important, since data- path can be dominant in the total energy-pie, once the instruction/data memory overhead is minimized by other complementary approaches. / Η αυτόματη μέθοδος παρακολούθησης ζωντανών οργανισμών μπορεί να βελτιώσει σημαντικά τις συνθήκες διαβίωσης των ζώων στις βιομηχανικές φάρμες. Για να είναι οικονομικά εφικτή όμως μια τέτοια λύση πρέπει να είναι μια λύση χαμηλής ενέργειας. Τα ASIPs μπορούν να είναι μια ιδανική λύση όταν τεχνικές χαμηλής κατανάλωσης ενέργειας εφαρμόζονται σε αυτά, καθώς λόγω της ευελιξίας τους μπορούν να καλύπτουν πολλούς τομείς της συγκεκριμένης αγοράς. Στοχεύοντας σε υψηλή εξοικονόμηση ενέργειας, η παρούσα δουλειά υλοποιεί παραλληλισμό δεδομένων, χρησιμοποιώντας μια προσφάτως προταθείσα πραγματοποίηση Single Instruction Multiple Data (SIMD) εντολών, που υλοποιούνται μέσω software με ένα καινοτόμο τρόπο. Μια χειρωνακτική προσπάθεια αντιστοίχισης σε υλικό του πιο κρίσιμου κομματιού της εφαρμογής και χρονοπρογραμματισμού των εντολών του οδηγεί σε ένα πολύ βελτιστοποιημένο αποτέλεσμα αναφορικά με τους κύκλους εκτέλεσης, την καταλαμβανόμενη επιφάνεια και την απαιτούμενη ενέργεια. Η χειρωνακτική υλοποίηση χρονοπρογραμματισμού των εντολών πρέπει να μπορεί να επιτευχθεί από ένα εμπορικό εργαλείο μετάφρασης (compiler tool) ώστε στο μέλλον ο χρόνος σχεδιασμού να ελαχιστοποιηθεί. Επιπλέον, πρέπει να διερευνηθεί μια αποδοτική ως προς το θέμα της ενέργειας προσπάθεια απεικόνισης σε υλικό για τα υπόλοιπα τμήματα της εφαρμογής πέραν του πιο κρίσιμου. Σε αυτή την περίπτωση, επειδή η συχνότητα εμφάνισης αυτών των τμημάτων του κώδικα είναι πολύ μικρή, έμφαση δίνεται στην ελαχιστοποίηση της επιφάνειας του υλικού. Η βελτίωση της κατανάλωσης ενέργειας του data-path με τέτοιους τρόπους είναι πολύ σημαντική, αφού το data-path είναι κυρίαρχο στην κατανομή της ενέργειας, όταν η επιβάρυνση της μνήμης δεδομένων και εντολών ελαχιστοποιείται από συμπληρωματικές μεθόδους, όπως συμβαίνει στο προτεινόμενο ASIP.
52

Optimized SIMD architecture exploration and implementation for ultra-low energy processors / Εξερεύνηση και υλοποίηση βελτιστοποιημένης SIMD αρχιτεκτονικής για επεξεργαστές πολύ χαμηλής κατανάλωσης

Δακουρού, Στεφανία 19 July 2012 (has links)
On-line monitoring is an important challenge in future biotechnology applications, for instance in the domain of precision livestock farming where a strong need is present for low-cost intelligent sensors to monitor animal welfare. On-line poultry monitoring can significantly improve living conditions of hens in industrial farms. A very low-cost low-energy solution needs to be provided though due to the stringent battery limitations. Domain-specific ASIPs can be an ideal solution when they cover enough submarkets to increase the production volume (reducing the price) and ultra-low energy concepts are used for their realization. This work is a part of a larger project and aiming to high energy-efficiency. The current study implements data parallelization, using a recently introduced software-controlled SIMD realization in an innovative way. The approaches that have been employed for the determination of the final instruction set of the architecture that has been created for the mapping of the critical Gauss loop of the detection application, are thoroughly explored. The re-design of the data-parallel data path, also referred to as Soft-SIMD architecture, has been necessary in order to achieve instruction encoding optimization. Furthermore, we have explored the capabilities that a commercial compiler retargetable Tool, like Target, can offer for our target design and we have suggested some potential modifications that would help the tool to become more efficient and useful for a designer’s needs in such architecture. Thereby, this study also demonstrates the promising results obtained by experimenting with detours around the current Target tool design limitations. Finding the right balance between efficiency and flexibility requires the ability to quickly evaluate alternative architectures through simulations and testing techniques. The methods developed for exactly this purpose, with the help of Target’s IP Designer retargetable tool-suite, are discussed in detail. By exploiting the profiling information produced by the ISS, and by reading the assembly code produced by the C compiler, it is possible to identify the instructions in the critical loop, and optimize them by using a number of techniques discussed. The main purpose of this optimization is to reduce the cycle count of the application, in order to reduce the overall power consumption. VHDL files of the optimized and un-optimized processor are automatically generated using the HDL generation tool. However, examining a bio-imaging application, instantiated from the ULP-ASIP architectural template [FEENECS book], many other issues are present too. In particular, the way that these kinds of implementations have to be tested should be taken into consideration. Preferably, the testability has not only to be sufficient and efficient but also reusable, in the sense that test patterns should be able to be generated not only for a specific application or for a group of applications but for the entire architectural template. Therefore, this study also illustrates a Systematic Test Vector generation process for the ULP-ASIP template. Our goal is to make generalized principles, because such principles are reusable and can be applied to any instances, such as our present processor for the Gauss Filter. Finally, this study is completed by presenting some realistic power numbers based on layout back-annotation, which concern the data path components of the processor. Based on all the advanced optimizations and broad search space explorations that are presented in this thesis, a heavily optimized ASIP architecture has been fully implemented which results in a low-cost ultra low-energy consumption while still meeting all the performance requirements. / Η αυτόματη μέθοδος παρακολούθησης ζωντανών οργανισμών, όπως έχει ερευνηθεί και δημοσιευθεί από το Τμήμα Biosystems (BIOSYST) του K.U. Leuven [1], συνίσταται από μια εϕαρμογή με «υπολογιστική όραση», η οποία, βασιζόμενη στις αποκρίσεις τους, κατηγοριοποιεί τη συμπεριϕορά τους. Η βιοτεχνολογική αυτή εϕαρμογή αναπτύσσει ένα πλήρως αυτοματοποιημένο σύστημα «υπολογιστικής όρασης» σε μεμονωμένες και υπό περιορισμό όρνι- θες.Η εϕαρμογή χωρίζεται σε δύο αλγόριθμους, εκ των οποίων ο πρώτος ανιχνεύει το αντι- κείμενο παρακολούθησης (detection algorithm) και ο δεύτερος το εντοπίζει (tracking algorithm). Η παρούσα μελέτη αποτελεί κομμάτι ενός μεγαλυτέρου project και συνέχεια της προηγούμενης δουλείας που αναπτύχθηκε στον τομέα αυτό.Ο σκοπός αυτής της μελέτης είναι η εξερεύνηση της αρχιτεκτονικής που έχει δημιουργηθεί για την αντιστοίχιση του κρίσιμου βρόχου Gauss του αλγόριθμου ανίχνευσης προκειμένου να καθοριστεί το τελικό σύνολο εντολών του ULP-ASIP SIMD επεξεργαστή. Οι τεχνικές και οι προσεγγίσεις που χρησιμοποιούνται για την υποστήριξη της διαδικασίας βελτιστοποίησης της κωδικοποίησης του συνόλου εντολών παρουσιάζονται εκτεταμένα στο κεϕάλαιο 2. Επιπλέον, κατά τη διάρκεια της εξερεύνησης της αρχιτεκτονικής, το σύνολο εντολών που ορίστηκε και οι τεχνικές αντιστοίχισης επανεξετάζονται, προκειμένου να μειωθεί το συνολικό κόστος εκτέλεσης. Η εύρεση της σωστής ισορροπίας μεταξύ της αποτελεσματικότητας και της ευελιξίας απαιτεί την ικανότητα να αξιολογούνται γρήγορα εναλλακτικές αρχιτεκτονικές μέσω εξομοιώσεων και τεχνικών δοκιμών. Το Κεϕάλαιο 3 επεξηγεί τις μεθόδους που αναπτύχθηκαν ακριβώς για το σκοπό αυτό, με τη βοήθεια του περιβάλλοντος σχεδίασης IP των TARGET Compiler Τεχνολογιών η οποία προσϕέρει ένα πλήρες reTARGETable εργαλείο. Ωστόσο, μια πιο συστηματική διαδικασία παραγωγής διανυσμάτων δοκιμής για ολόκληρη την πλατϕόρμα ULP-ASIP κατέληξε να είναι ένα πολύ σημαντικό πλεονέκτημα για την επικύρωση της λειτουργίας του επεξεργαστή ULP-ASIP. Ως εκ τούτου, μια τέτοια μέθοδος, αναλύεται και παρουσιάζεται εκτεταμένα στο κεϕάλαιο 4. Τέλος, το Κεϕάλαιο 5 παρουσιάζει την εκτίμηση της ενέργειας του data path του επεξεργαστή. Με βάση όλες τις προηγμένες βελτιστοποιήσεις και τις ευρείες εξερευνήσεις του χώρου αναζήτησης που παρουσιάζονται στα προηγούμενα κεϕάλαια, μια ισχυρά βελτιστοποιημένη συνθέσιμη αρχιτεκτονική ASIP υλοποιείται πλήρως η οποία οδηγεί σε μια χαμηλού κόστους, πολύ χαμηλής κατανάλωσης ενέργειας πλατϕόρμα, καλύπτοντας συγχρόνως όλες τις απαιτήσεις επιδόσεων.
53

Modal optical studies of multi-moded ultra-low-noise detectors in far-infrared

Chen, Jiajun January 2018 (has links)
In this thesis, I have developed a range of theoretical and numerical techniques for modelling the behaviour of partially coherent optical systems and multi-mode detectors. The numerical simulations were carried out for the ultra-low-noise Transition Edge Sensors (TESs) being proposed for use on the SAFARI instrument on the cooled aperture infrared space telescope SPICA (34 - 210 μm). The optical behaviour of the SAFARI system is described in terms of the optical modes of the telescope, as distinct from the optical modes of the detector. The performance of the TESs were assessed in terms of signal power, background power and photon noise. To establish a method for precisely characterising and calibrating ultra-low-noise TESs, a cryogenic test system was designed and engineered to measure the optical efficiencies of the SAFARI TESs. The multi-mode, partially coherent illumination conditions of the measurement system were engineered to be precisely the same as those of the telescope. A major difference between the test system and the telescope’s optics is that the telescope will have focusing elements, but the test system was designed to avoid focusing elements in order to keep the optical path as clean as possible. The theoretical formalism and numerical models were adapted accordingly to address this difference. The numerical simulations show that the test system could provide near identical optical performance as that of the telescope system even though the focusing elements were absent. I also performed experimental measurements to investigate the optical efficiencies of the multi-mode TESs. The detectors worked exceedingly well in all respects with satisfactory optical efficiencies. In addition, it has been shown that the optical model provides a good description of the optical behaviour of the test system and detectors. Further modal analysis was developed to study losses in the multi-mode horns. The optical behaviour of the waveguide-mounted thin absorbing films in the far-infrared was modelled using a mode-matching method.
54

NanoWatt resistorless CMOS voltage references for Sub-1 V applications / Referências de tensão CMOS em NanoWatts e sem resistores para aplicações em sub-1 V

Mattia Neto, Oscar Elisio January 2014 (has links)
Referências de tensão integradas sempre foram um bloco fundamental de qualquer sistema eletrônico e um importante tópico de pesquisa que tem sido estudado extensivamente nos últimos 50 anos. Uma tensão de referência é um circuito que provê uma tensão estável com baixa sensibilidade a variações em temperatura, alimentação, carga, características do processo de fabricação e tensões mecânicas de encapsulamento. Elas são normalmente implementadas através da soma ponderada de dois fenômenos físicos diferentes, com comportamentos em temperatura opostos. Normalmente, a tensão térmica, relacionada à constante de Boltzmann e à carga do elétron, fornece uma dependência positiva com temperatura, enquanto que a tensão base-emissor VBE de um transistor bipolar ou a tensão de limiar de um MOSFET fornece o termo complementar. Um bloco auxiliar é às vezes utilizado para fornecer as correntes de polarização do circuito, e outros blocos adicionais implementam a soma ponderada. A evolução da tecnologia de processos é o principal fator para aplicações em baixa tensão, enquanto que a emergência de dispositivos portáteis operados a bateria, circuitos biomédicos implantáveis e dispostivos de captura de energia do ambiente restringem cada circuito a consumir o mínimo possivel. Portanto, alimentações abaixo de 1 V e consumos na ordem de nanoWatts se tornaram características fundamentais de tais circuitos. Contudo, existem diversos desafios ao projetar referências de tensão de alta exatidão em processos CMOS modernos sob essas condições. As topologias tradicionais não são adequadas pois elas provêm uma referência de tensão acima de 1 V, e requerem resistências da ordem de G para atingir tão baixo consumo de potência, ocupando assim uma grande área de silício. Avanços recentes atingiram tais níveis de consumo de potência, porém com limitada exatidão, custosos procedimentos de calibração e grande área ocupada em silício. Nesta dissertação apresentam-se duas novas topologias de circuitos: uma tensão de junção bipolar com compensação de curvatura que não utiliza resistores e é auto-polarizada; e um circuito de referência bandgap sem resistores que opera abaixo de 1 V (também chamado de sub-bandgap). Ambos circuitos operam com consumo na ordem de nanoWatts e ocupam pequenas áreas de silício. Resultados de simulação para dois processos diferentes, 180 nm e 130 nm, e resultados experimentais de uma rodada de fabricação em 130 nm apresentam melhorias sobre tais limitações, mantendo as características desejadas de não conter resistores, ultra baixo consumo, baixa tensão de alimentação e áreas muito pequenas. / Integrated voltage references have always been a fundamental block of any electronic system, and an important research topic that has been extensively studied in the past 50 years. A voltage reference is a circuit that provides a stable voltage with low sensitivity to variations in temperature, supply, load, process characteristics and packaging stresses. They are usually implemented through the weighted sum of two independent physical phenomena with opposite temperature dependencies. Usually the thermal voltage, related to the Boltzmann’s constant and the electron charge, provides a positive temperature dependence, while the silicon bandgap voltage or a MOSFET’s threshold voltage provide the complementary term. An auxiliary biasing block is sometimes necessary to provide the necessary currents for the circuit to work, and additional blocks implement the weighted sum. The scaling of process technologies is the main driving factor for low voltage operation, while the emergence of portable battery-operated, implantable biomedical and energy harvesting devices mandate that every circuit consume as little power as possible. Therefore, sub-1 V supplies and nanoWatt power have become key characteristics for these kind of circuits, but there are several challenges when designing high accuracy voltage references in modern CMOS technologies under these conditions. The traditional topologies are not suitable because they provide a reference voltage above 1 V, and to achieve such power consumption levels would require G resistances, that occupy a huge silicon area. Recent advances have achieved these levels of power consumption but with limited accuracy, expensive calibration procedures and large silicon area.
55

Avaliação de pulverizador tratorizado em volume ultra baixo (UBV) para controle de insetos de brotações novas, na cultura dos citros /

Silva, José Luiz da. January 2011 (has links)
Orientador: Marcelo da Costa Ferreira / Banca: Júlio César Galli / Banca: Hamilton Humberto Campos / Resumo: O objetivo desta pesquisa foi avaliar a eficiência, no controle de psilídeos, pulgão-marrom-dos-citros e minadora-das-folhas e também a seletividade a Pentilia egena, da aplicação terrestre em volume ultra baixo (UBV) em pomar de laranja. Foram realizadas 03 pesquisas, sendo que a primeira pesquisa foi realizada visando avaliar a mortalidade de adultos confinados do psilídeo e seletividade sobre a Pentilia egena na estação de pesquisa da Gravena Ltda em Jaboticabal-SP, a segunda pesquisa foi realizada visando avaliar a mortalidade de ninfas do psilídeo, pulgão-marrom-dos-citros e minadora-das-folhas em ramos novos em citros e a terceira pesquisa foi realizada visando avaliar a mortalidade de adultos confinados do psilídeo, sendo estas duas últimas realizadas na Fazenda Cachoeira do São Lourenço em Matão-SP. O delineamento estatístico adotado foi em blocos casualizados com número variável de tratamentos em cada pesquisa e quatro repetições. A aplicação da primeira pesquisa foi realizada no dia 25 de março de 2010, da segunda no dia 17 de novembro de 2010 e da terceira em 03 de maio de 2011, sendo usados nas pesquisas os seguintes produtos: Boveria bassiana (2,0 kg/ha), lambda- cialotrina (0,4 L/ha), dimetoato (2 L/ha), etofenprox (0,5 L/ha), thiamethoxan (0,2 kg/ha), Imidacloprid + espirotetramate (0,25 L/ha) e imidacloprido (0,4 L/ha) usando o pulverizador Pulsfog de volume ultra baixo (U.B.V.) comparado com o tratamento com imidacloprido (0,4L/ha) usando pulverizador com lanças manuais e de jato transportado. Baseado nos resultados obtidos pode-se concluir que os tratamentos, com volume ultra baixo (UBV), foram eficientes no controle de psilídeos, pulgão-marrom-dos-citros e minadora-das-folhas. Quanto à seletividade as modalidades de aplicação usadas foram classificadas de moderada a altamente tóxicos para as larvas e adultos de P. egena / Abstract: The purpose of this study was to evaluate the efficiency in the control of psyllids, citrus brown aphids and the citrus leaf-miner, and also the selectivity to Pentilia egena, by using ground application in ultra-low volume (ULV) in orchard orange. Three surveys were conducted, the first survey was conducted to evaluate the mortality of adult psyllids (Diaphorina citri) confined and selectivity on the ladybug (Pentilia egena) at the Research Station of Gravena Jaboticabal Ltda. The second survey was performed to evaluate the mortality of nymphs of the psyllid, the citrus brown aphid, and citrus leaf-miner in citrus and new branches. And, the third survey was conducted to evaluate the mortality of adults confined the psyllid, the latter being held in the Farm St. Lawrence Waterfall. The statistical design used was randomized blocks with variable number of treatments in each study and four replications. The implementation of the first survey was conducted on March 25th, 2010, the second on November 17th, 2010 and the third survey on May 3rd, 2011, being used in research the following products: Boveria bassiana (2.0 kg / ha), lambda-cyhalothrin (0.4 L / ha), dimethoate (2 L / ha), etofenprox (0.5 L / ha), thiamethoxan (0.2 kg / ha), Imidacloprid spirotetramat + (0, 25 L / ha) and imidacloprid (0.4 L / ha) using the sprayer Pulsfog ultra-low volume (ULV) compared to treatment with Imidacloprid (0.4 L / ha) using manual spray booms and jet transport. Based on the results obtained it is concluded that the treatments with ultra-low volume (ULV), were effective in controlling adults and nymphs of psyllids, citrus brown aphid and citrus leaf-miner. The selectivity of the used application methods was classified as moderate (M) to high (A) toxic to the larvae and adults of P.egena / Mestre
56

NanoWatt resistorless CMOS voltage references for Sub-1 V applications / Referências de tensão CMOS em NanoWatts e sem resistores para aplicações em sub-1 V

Mattia Neto, Oscar Elisio January 2014 (has links)
Referências de tensão integradas sempre foram um bloco fundamental de qualquer sistema eletrônico e um importante tópico de pesquisa que tem sido estudado extensivamente nos últimos 50 anos. Uma tensão de referência é um circuito que provê uma tensão estável com baixa sensibilidade a variações em temperatura, alimentação, carga, características do processo de fabricação e tensões mecânicas de encapsulamento. Elas são normalmente implementadas através da soma ponderada de dois fenômenos físicos diferentes, com comportamentos em temperatura opostos. Normalmente, a tensão térmica, relacionada à constante de Boltzmann e à carga do elétron, fornece uma dependência positiva com temperatura, enquanto que a tensão base-emissor VBE de um transistor bipolar ou a tensão de limiar de um MOSFET fornece o termo complementar. Um bloco auxiliar é às vezes utilizado para fornecer as correntes de polarização do circuito, e outros blocos adicionais implementam a soma ponderada. A evolução da tecnologia de processos é o principal fator para aplicações em baixa tensão, enquanto que a emergência de dispositivos portáteis operados a bateria, circuitos biomédicos implantáveis e dispostivos de captura de energia do ambiente restringem cada circuito a consumir o mínimo possivel. Portanto, alimentações abaixo de 1 V e consumos na ordem de nanoWatts se tornaram características fundamentais de tais circuitos. Contudo, existem diversos desafios ao projetar referências de tensão de alta exatidão em processos CMOS modernos sob essas condições. As topologias tradicionais não são adequadas pois elas provêm uma referência de tensão acima de 1 V, e requerem resistências da ordem de G para atingir tão baixo consumo de potência, ocupando assim uma grande área de silício. Avanços recentes atingiram tais níveis de consumo de potência, porém com limitada exatidão, custosos procedimentos de calibração e grande área ocupada em silício. Nesta dissertação apresentam-se duas novas topologias de circuitos: uma tensão de junção bipolar com compensação de curvatura que não utiliza resistores e é auto-polarizada; e um circuito de referência bandgap sem resistores que opera abaixo de 1 V (também chamado de sub-bandgap). Ambos circuitos operam com consumo na ordem de nanoWatts e ocupam pequenas áreas de silício. Resultados de simulação para dois processos diferentes, 180 nm e 130 nm, e resultados experimentais de uma rodada de fabricação em 130 nm apresentam melhorias sobre tais limitações, mantendo as características desejadas de não conter resistores, ultra baixo consumo, baixa tensão de alimentação e áreas muito pequenas. / Integrated voltage references have always been a fundamental block of any electronic system, and an important research topic that has been extensively studied in the past 50 years. A voltage reference is a circuit that provides a stable voltage with low sensitivity to variations in temperature, supply, load, process characteristics and packaging stresses. They are usually implemented through the weighted sum of two independent physical phenomena with opposite temperature dependencies. Usually the thermal voltage, related to the Boltzmann’s constant and the electron charge, provides a positive temperature dependence, while the silicon bandgap voltage or a MOSFET’s threshold voltage provide the complementary term. An auxiliary biasing block is sometimes necessary to provide the necessary currents for the circuit to work, and additional blocks implement the weighted sum. The scaling of process technologies is the main driving factor for low voltage operation, while the emergence of portable battery-operated, implantable biomedical and energy harvesting devices mandate that every circuit consume as little power as possible. Therefore, sub-1 V supplies and nanoWatt power have become key characteristics for these kind of circuits, but there are several challenges when designing high accuracy voltage references in modern CMOS technologies under these conditions. The traditional topologies are not suitable because they provide a reference voltage above 1 V, and to achieve such power consumption levels would require G resistances, that occupy a huge silicon area. Recent advances have achieved these levels of power consumption but with limited accuracy, expensive calibration procedures and large silicon area.
57

Ultra-baixo coeficiente de atrito entre o par cerâmico Si3N4-Al2O3 em água. / Ultra-low friction coefficient between Si3N4-Al2O3 in water.

Vanderlei Ferreira 08 September 2008 (has links)
Neste trabalho, foi investigado o comportamento tribológico dos pares cerâmicos aluminanitreto de silício no deslizamento em água e em uma suspensão de sílica coloidal em água (hidrosol). O objetivo foi verificar a possibilidade de atingir um coeficiente de atrito da ordem de unidades de milésimos, aqui chamado de ultra-baixo coeficiente de atrito (UBCA), verificar se a mudança do meio, de água para hidrosol, diminui o running-in do coeficiente de atrito, e verificar o efeito da variação da rugosidade inicial da alumina no comportamento do atrito. Os ensaios foram realizados na configuração de teste esferasobre- disco, no qual a esfera foi de nitreto de silício e o disco de alumina, sob carga normal de 54 N e velocidade de 1 m/s. A água utilizada nos ensaios foi destilada e deionizada, e a sílica coloidal amorfa, hidrofílica, sem porosidade e de tamanho médio de partícula de 12 nm foi a Aerosil® 200, e o hidrosol foi preparado com pH 8,5 num eletrólito de NaCl de 1 mM. A esfera de nitreto de silício, adquirida comercialmente, e a alumina, sinterizada em laboratório, foram caracterizadas quanto a densidade, as fases foram determinadas por difração de raios X, microscopia eletrônica de varedura (MEV) observada em amostras ceramográficas atacadas. Algumas propriedades mecânicas como dureza, módulo de elasticidade e tenacidade à fratura foram determinadas. Duas condições de rugosidade dos discos de alumina foram utilizadas nos ensaios tribológicos, 350 nm e 10 nm RMS. Em todos os ensaios, em água, em hidrosol e independentemente da rugosidade inicial do disco o coeficiente de atrito no regime permanente apresentou pequena dispersão de valores de 0,002 a 0,006, e não foi possível estabelecer diferença entre elas. A menor rugosidade do disco de alumina acarretou menor desgaste e menor período de running-in de coeficiente de atrito, tanto em água quanto em hidrosol. Os ensaios em meio de hidrosol acarretaram menor desgaste das cerâmicas e apresentaram menor running-in de coeficiente de atrito, comparados aos ensaios com água. O disco de alumina apresentou menor desgaste do que a esfera de nitreto de silício, em todas as condições estudadas. Com a análise das perdas volumétricas, da rugosidade final das superfícies desgastadas, das curvas de coeficiente de atrito e das espessuras mínimas de filme lubrificante, calculadas com uso de modelo da literatura, foi possível relacionar a diminuição do desgaste e do running-in de coeficiente de atrito em meio de hidrosol, com a presença da sílica na superfície ou próxima dela. / In this work, the tribological behavior of the alumina-silicon nitride couple was investigated under water and hydrosol (colloidal silica suspensions in water) lubricated sliding. The purposes were to study how an ultra-low friction coefficient can be achieved and to analyze the effects of the environment, lubricant and alumina roughness changes on the friction behavior. Ball-on-disk tests with a normal load of 54 N and a sliding speed of 1 m/s were carried out, using a silicon nitride ball and an alumina disk. The water used as lubricant was distilled and deionized. The silica was amorphous colloidal and hydrophilic, without porous and with a 12 nm medium particle diameter, commercially named Aerosil ® 200. The hydrosol was obtained with a pH value of 8,5 and a 1mM NaCl electrolyte. To estimate the minimum film thickness, formed during the lubricated sliding tests, a theory model was used. The commercial silicon nitride balls and the alumina disks, which were conformed and sintered in laboratory, were characterized by density, X-ray diffraction and scanning electron microscopy measurements. The mechanical properties such as hardness, Young modulus and fracture toughness were determined. The friction coefficient values obtained in the steady state regime showed low standard deviations (0,002 to 0,006) under all conditions. A shorter period of running-in was observed with the lower disk roughness, both in water and hydrosol lubrication. The hydrosol lubricated sliding produced a lower wear and friction running-in comparing with the tests under water lubrication. The alumina disk always showed lower wear than the silicon nitride ball. The volume loss, friction coefficients, worn surfaces roughness and minimum film thickness results suggest that the wear and friction coefficient running-in decrease was caused by the presence of silica on the sliding surfaces or on the near surface regions.
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NanoWatt resistorless CMOS voltage references for Sub-1 V applications / Referências de tensão CMOS em NanoWatts e sem resistores para aplicações em sub-1 V

Mattia Neto, Oscar Elisio January 2014 (has links)
Referências de tensão integradas sempre foram um bloco fundamental de qualquer sistema eletrônico e um importante tópico de pesquisa que tem sido estudado extensivamente nos últimos 50 anos. Uma tensão de referência é um circuito que provê uma tensão estável com baixa sensibilidade a variações em temperatura, alimentação, carga, características do processo de fabricação e tensões mecânicas de encapsulamento. Elas são normalmente implementadas através da soma ponderada de dois fenômenos físicos diferentes, com comportamentos em temperatura opostos. Normalmente, a tensão térmica, relacionada à constante de Boltzmann e à carga do elétron, fornece uma dependência positiva com temperatura, enquanto que a tensão base-emissor VBE de um transistor bipolar ou a tensão de limiar de um MOSFET fornece o termo complementar. Um bloco auxiliar é às vezes utilizado para fornecer as correntes de polarização do circuito, e outros blocos adicionais implementam a soma ponderada. A evolução da tecnologia de processos é o principal fator para aplicações em baixa tensão, enquanto que a emergência de dispositivos portáteis operados a bateria, circuitos biomédicos implantáveis e dispostivos de captura de energia do ambiente restringem cada circuito a consumir o mínimo possivel. Portanto, alimentações abaixo de 1 V e consumos na ordem de nanoWatts se tornaram características fundamentais de tais circuitos. Contudo, existem diversos desafios ao projetar referências de tensão de alta exatidão em processos CMOS modernos sob essas condições. As topologias tradicionais não são adequadas pois elas provêm uma referência de tensão acima de 1 V, e requerem resistências da ordem de G para atingir tão baixo consumo de potência, ocupando assim uma grande área de silício. Avanços recentes atingiram tais níveis de consumo de potência, porém com limitada exatidão, custosos procedimentos de calibração e grande área ocupada em silício. Nesta dissertação apresentam-se duas novas topologias de circuitos: uma tensão de junção bipolar com compensação de curvatura que não utiliza resistores e é auto-polarizada; e um circuito de referência bandgap sem resistores que opera abaixo de 1 V (também chamado de sub-bandgap). Ambos circuitos operam com consumo na ordem de nanoWatts e ocupam pequenas áreas de silício. Resultados de simulação para dois processos diferentes, 180 nm e 130 nm, e resultados experimentais de uma rodada de fabricação em 130 nm apresentam melhorias sobre tais limitações, mantendo as características desejadas de não conter resistores, ultra baixo consumo, baixa tensão de alimentação e áreas muito pequenas. / Integrated voltage references have always been a fundamental block of any electronic system, and an important research topic that has been extensively studied in the past 50 years. A voltage reference is a circuit that provides a stable voltage with low sensitivity to variations in temperature, supply, load, process characteristics and packaging stresses. They are usually implemented through the weighted sum of two independent physical phenomena with opposite temperature dependencies. Usually the thermal voltage, related to the Boltzmann’s constant and the electron charge, provides a positive temperature dependence, while the silicon bandgap voltage or a MOSFET’s threshold voltage provide the complementary term. An auxiliary biasing block is sometimes necessary to provide the necessary currents for the circuit to work, and additional blocks implement the weighted sum. The scaling of process technologies is the main driving factor for low voltage operation, while the emergence of portable battery-operated, implantable biomedical and energy harvesting devices mandate that every circuit consume as little power as possible. Therefore, sub-1 V supplies and nanoWatt power have become key characteristics for these kind of circuits, but there are several challenges when designing high accuracy voltage references in modern CMOS technologies under these conditions. The traditional topologies are not suitable because they provide a reference voltage above 1 V, and to achieve such power consumption levels would require G resistances, that occupy a huge silicon area. Recent advances have achieved these levels of power consumption but with limited accuracy, expensive calibration procedures and large silicon area.
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CombustÃo do BiogÃs e do GÃs Natural com Elevadas ConcentraÃÃes de H2S e CO2 em Caldeira de Queimador Poroso / Combustion of Biogas and Natural Gas With High H2S and CO2 Concentrations on Porous Burner Boiler

Amanda Rafaele Serpa Camelo 23 March 2012 (has links)
CoordenaÃÃo de AperfeiÃoamento de Pessoal de NÃvel Superior / O aproveitamento do biogÃs e do gÃs natural (GN) com elevadas concentraÃÃes de diÃxido de carbono (CO2) e de sulfeto de hidrogÃnio (H2S), atravÃs de sistemas tÃrmicos de combustÃo convencionais, pode resultar em instabilidade de reaÃÃo ou, atÃ, apagamento da frente de chama, sob risco de avarias irreversÃveis para estrutura fÃsica dos equipamentos, devido aos Ãcidos corrosivos decorrentes da reaÃÃo. Ainda, altas concentraÃÃes desses contaminantes favorecem a ocorrÃncia de elevados Ãndices de gases poluentes nos produtos, a exemplo de monÃxido de carbono (CO) e hidrocarbonetos nÃo queimados (HC), dentre outros. Por essa razÃo, um estudo experimental foi realizado com base na aplicaÃÃo de uma tecnologia de combustÃo nÃo-convencional, a CombustÃo de FiltraÃÃo, a fim de lidar com esses combustÃveis de baixa qualidade. O aparato experimental empregado nessa pesquisa consiste de uma caldeira porosa de escoamento recÃproco, em que seu queimador à preenchido completamente por esferas cerÃmicas de alumina (Al2O3), formando uma matriz porosa inerte, que envolve os trocadores de calor da caldeira. O processo de queima de ambos os combustÃveis foi investigado sob condiÃÃes extremas de operaÃÃo, em termos de misturas ar-combustÃvel ultra-pobres. Como suporte para interpretaÃÃo dos fenÃmenos do processo, foi aplicado um modelo numÃrico de simulaÃÃo, que considera o mecanismo de oxidaÃÃo do metano em um meio poroso, adaptado para identificar os efeitos quÃmicos de uma alta concentraÃÃo de CO2 sobre a reaÃÃo. A influÃncia dos principais parÃmetros de operaÃÃo, razÃo de equivalÃncia e velocidade da mistura ar-combustÃvel, sob os produtos de combustÃo e sob a instabilidade de reaÃÃo foi estudada teÃrica e experimentalmente. Os resultados mostram excelente estabilidade operacional da caldeira com emissÃes ultra-baixas de CO e NOx, inferiores a 1 ppm para razÃes de equivalÃncia menores que 0,6, e com eficiÃncia de queima do H2S de mais de 99%. / The use of biogas and natural gas (GN) with high concentrations of carbon dioxide (CO2) and hydrogen sulfide (H2S) through conventional combustion thermal systems can result in reaction instability or flame front quenching, under risk of irreversible damages to the physical structure of a piece of equipments, due to corrosive acids remaining from reaction. Furthermore, high concentrations of these contaminants favor the occurrence of high pollutant levels in the products, like carbon monoxide (CO) and unburned hydrocarbon (HC), among others. Therefore, an experimental study was performed with basis on the application of a non conventional combustion technology, Filtration Combustion, in order to deal with these low-quality fuels. The experimental apparatus employed in this research consists of a reciprocal flow porous boiler, in which its burner is completely filled by ceramic spheres of alumina (Al2O3), forming an inert porous matrix, which involves boilerâs heat exchangers. The burning process of both the fuels was investigated under extreme operation conditions, in terms of ultra-lean fuel-air mixtures. As support for interpretation of the process phenomena, a numerical simulation model was applied, which takes in account the methane oxidation mechanism in a porous medium, adapted to identify the chemical effects of a high CO2-concentration on the reaction. The influence of the main operation parameters, equivalence ratio and gas flow velocity, on combustion products and on reaction stability was studied theoretically and experimentally. The results have shown excellent boiler operation stability with ultra-low emissions of NOx and CO, less than 1 ppm for equivalence ratios inferior to 0.6, and with the H2S-burning efficiency overcoming 99%.
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Security primitives for ultra-low power sensor nodes in wireless sensor networks

Huang, An-Lun 05 May 2008 (has links)
The concept of wireless sensor network (WSN) is where tiny devices (sensor nodes), positioned fairly close to each other, are used for sensing and gathering data from its environment and exchange information through wireless connections between these nodes (e.g. sensor nodes distributed through out a bridge for monitoring the mechanical stress level of the bridge continuously). In order to easily deploy a relatively large quantity of sensor nodes, the sensor nodes are typically designed for low price and small size, thereby causing them to have very limited resources available (e.g. energy, processing power). Over the years, different security (cryptographic) primitives have been proposed and refined aiming at utilizing modern processor’s power e.g. 32-bit or 64-bit operation, architecture such as MMX (Multi Media Extension) and etc. In other words, security primitives have targeted at high-end systems (e.g. desktop or server) in software implementations. Some hardware-oriented security primitives have also been proposed. However, most of them have been designed aiming only at large message and high speed hashing, with no power consumption or other resources (such as memory space) taken into considerations. As a result, security mechanisms for ultra-low power (<500µW) devices such as the wireless sensor nodes must be carefully selected or designed with their limited resources in mind. The objective of this project is to provide implementations of security primitives (i.e. encryption and authentication) suitable to the WSN environment, where resources are extremely limited. The goal of the project is to provide an efficient building block on which the design of WSN secure routing protocols can be based on, so it can relieve the protocol designers from having to design everything from scratch. This project has provided three main contributions to the WSN field.  Provides analysis of different tradeoffs between cryptographic security strength and performances, which then provide security primitives suitable for the needs in a WSN environment. Security primitives form the link layer security and act as building blocks for higher layer protocols i.e. secure routing protocol.  Implements and optimizes several security primitives in a low-power microcontroller (TI MSP430F1232) with very limited resources (256 bytes RAM, 8KB flash program memory). The different security primitives are compared according to the number of CPU cycles required per byte processed, specific architectures required (e.g. multiplier, large bit shift) and resources (RAM, ROM/flash) required. These comparisons assist in the evaluation of its corresponding energy consumption, and thus the applicability to wireless sensor nodes.  Apart from investigating security primitives, research on various security protocols designed for WSN have also been conducted in order to optimize the security primitives for the security protocols design trend. Further, a new link layer security protocol using optimized security primitives is also proposed. This new protocol shows an improvement over the existing link layer security protocols. Security primitives with confidentiality and authenticity functions are implemented in the TinyMote sensor nodes from the Technical University of Vienna in a wireless sensor network. This is to demonstrate the practicality of the designs of this thesis in a real-world WSN environment. This research has achieved ultra-low power security primitives in wireless sensor network with average power consumption less than 3.5 µW (at 2 second packet transmission interval) and 700 nW (at 5 second packet transmission interval). The proposed link layer security protocol has also shown improvements over existing protocols in both security and power consumption. / Dissertation (MEng (Computer Engineering))--University of Pretoria, 2008. / Electrical, Electronic and Computer Engineering / unrestricted

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