SRAM is a significant component in high speed computer design, which serves mainly as high speed storage elements like register files in microprocessors, or the interface like multiple-level caches between high speed processing elements and low speed peripherals. One method to design the SRAM is to use commercial memory compiler. Such compiler can generate different density/speed SRAM designs with single/dual/multiple ports to fulfill design purpose. There are discrepancy of the SRAM timing parameters between extracted layout netlist SPICE simulation vs. equation-based Liberty file (.lib) by a commercial memory compiler. This compiler takes spec values as its input and uses them as the starting points to generate the timing tables/matrices in the .lib. Originally large spec values are given to guarantee design correctness. While such spec values are usually too pessimistic when comparing with the results from extracted layout SPICE simulation, which serves as the “golden” rule. Besides, there is no margin information built-in such .lib generated by this compiler. A new methodology is proposed to get accurate spec values for the input of this compiler to generate more realistic matrices in .lib, which will benefit during the integration of the SRAM IP and timing analysis.

We demonstrate the use of embedded CdS nanowires in improving spectral transmission loss and the low mechanical and electrical robustness of planar CdS window layer and thus enhancing the quantum efficiency and the reliability of the CdS-CdTe solar cells. CdS nanowire window layer enables light transmission gain at 300nm-550nm. A nearly ideal spectral response of quantum efficiency at a wide spectrum range provides an evidence for improving light transmission in the window layer and enhancing absorption and carrier generation in absorber. Nanowire CdS/CdTe solar cells with Cu/graphite/silver paste as back contacts, on SnO2/ITO-soda lime glass substrates, yield the highest efficiency of 12% in nanostructured CdS-CdTe solar cells. Reliability is improved by approximately 3 times over the cells with the traditional planar CdS counterpart. Junction transport mechanisms are delineated for advancing the basic understanding of device physics at the interface. Our results prove the efficacy of this nanowire approach for enhancing the quantum efficiency and the reliability in window-absorber type solar cells (CdS-CdTe, CdS-CIGS and CdS-CZTSSe etc) and other optoelectronic devices. We further introduce MoO3-x as a transparent, low barrier back contact. We design nanowire CdS-CdTe solar cells on flexible foils of metals in a superstrate device structure, which makes low-cost roll-to-roll manufacturing process feasible and greatly reduces the complexity of fabrication. The MoO3 layer reduces the valence band offset relative to the CdTe, and creates improved cell performance. Annealing as-deposited MoO3 in N2 reduces series resistance from 9.98 Ω/cm2 to 7.72 Ω/cm2, and hence efficiency of the nanowire solar cell is improved from 9.9% to 11%, which efficiency comparable to efficiency of planar counterparts. When the nanowire solar cell is illuminated from MoO3-x /Au side, it yields an efficiency of 8.7%. This reduction in efficiency is attributed to decrease in Jsc from 25.5mA/cm2 to 21mA/cm2 due to light transmission loss in the MoO3-x /Au electrode. Even though these nanowire solar cells, when illuminated from back side exhibit better performance than that of nanopillar CdS-CdTe solar cells, further development of transparent back contacts of CdTe could enable a low-cost roll-to-roll fabrication process for the superstrate structure-nanowire solar cells on Al foil substrate.

Multilevel inverters offer many well-known advantages for use in high-voltage and high-power applications, but they are also well suited for low-power applications. A single phase inverter is developed in this paper to deliver power from a residential-scale system of Photovoltaic panels to the utility grid. The single-stage inverter implements a novel control technique for the reversing voltage topology to produce a stepped output waveform. This approach increases the granularity of control over the PV systems, modularizing key components of the inverter and allowing the inverter to extract the maximum power from the systems. The adaptive controller minimizes harmonic distortion in its output and controls the level of reactive power injected to the grid. A computer model of the controller is designed and tested in the MATLAB program Simulink to assess the performance of the controller. To validate the results, the performance of the proposed inverter is compared to that of a comparable voltage-sourced inverter.

Variable pressure electron beam etching and lithography for Teflon AF has been demonstrated. The relation between dose and etching depth is tested under high vacuum and water vapor. High resolution structures as small as 75 nm half-pitch have been resolved. Several simulation tools were tested for surface plasmon excitation. Grating based dual mode surface plasmon excitation has been shown numerically and experimentally.

Multifrequency averaging is one of the widely used modeling and simulation techniques today for the analysis and design of power electronic systems. This technique is capable of providing the average behavior as well as the ripple behavior of power electronic systems. Hysteresis current control has fast response and internal current stability through controlling switches to maintain the current within a given hysteresis band of a given current command. However the state space variables in a hysteresis controlled system cannot be directly approached by multifrequency averaging method because of time varing switching frequency. In this thesis, a method of applying multifrequency averaging to hysteresis current controlled dc-dc converters is proposed. A dc-dc converter model with the application of this method has been successfully developed and validated both in simulation and experiment.

The progress of the silicon-based complementary-metal-oxide-semiconductor (CMOS) technology is mainly contributed to the scaling of the individual component. After decades of development, the scaling trend is approaching to its limitation, and there is urgent needs for the innovations of the materials and structures of the MOS devices, in order to postpone the end of the scaling. Atomic layer deposition (ALD) provides precise control of the deposited thin film at the atomic scale, and has wide application not only in the MOS technology, but also in other nanostructures. In this dissertation, I study rapid thermal processing (RTP) treatment of thermally grown SiO2, ALD growth of SiO2, and ALD growth of high-k HfO2 dielectric materials for gate oxides of MOS devices. Using a lateral heating treatment of SiO2, the gate leakage current of SiO2 based MOS capacitors was reduced by 4 order of magnitude, and the underlying mechanism was studied. Ultrathin SiO2 films were grown by ALD, and the electrical properties of the films and the SiO2/Si interface were extensively studied. High quality HfO2 films were grown using ALD on a chemical oxide. The dependence of interfacial quality on the thickness of the chemical oxide was studied. Finally I studied growth of HfO2 on two innovative interfacial layers, an interfacial layer grown by in-situ ALD ozone/water cycle exposure and an interfacial layer of etched thermal and RTP SiO2. The effectiveness of growth of high-quality HfO2 using the two interfacial layers are comparable to that of the chemical oxide. The interfacial properties are studied in details using XPS and ellipsometry.

Fault location is very important for distribution systems, and quickly identifying the fault and restoring the system can help reduce the outage time and make the system more reliable. In this thesis, a method for locating faults on distribution systems is introduced to quickly identify the faulted feeder sections by using the overcurrent information from the switches in the system. Fuzzy logic is utilized. The proposed method can quickly and accurately locate faulted sections with different fault locations, fault types and fault resistances. The method is applicable to cases with single-faults or multi-faults, and is applicable to networks with multi-sources. The case study has demonstrated the effectiveness of the proposed method.

State estimation is widely used as a tool to evaluate the real time power system prevailing conditions. State estimation algorithms could suffer divergence under stressed system conditions. This dissertation first investigates impacts of variations of load levels and topology errors on the convergence property of the commonly used weighted least square (WLS) state estimator. The influence of topology errors on the condition number of the gain matrix in the state estimator is also analyzed. The minimum singular value of gain matrix is proposed to measure the distance between the operating point and state estimation divergence. To study the impact of the load increment on the convergence property of WLS state estimator, two types of load increment are utilized: one is the load increment of all load buses, and the other is a single load increment. In addition, phasor measurement unit (PMU) measurements are applied in state estimation to verify if they could solve the divergence problem and improve state estimation accuracy. The dissertation investigates the impacts of variations of line power flow increment and topology errors on convergence property of the WLS state estimator. A simple 3-bus system and the IEEE 118-bus system are used as the test cases to verify the common rule. Furthermore, the simulation results show that adding PMU measurements could generally improve the robustness of state estimation. Two new approaches for improving the robustness of the state estimation with PMU measurements are proposed. One is the equality-constrained state estimation with PMU measurements, and the other is Hachtel's matrix state estimation with PMU measurements approach. The dissertation also proposed a new heuristic approach for optimal placement of phasor measurement units (PMUs) in power system for improving state estimation accuracy. In the problem of adding PMU measurements into the estimator, two methods are investigated. Method I is to mix PMU measurements with conventional measurements in the estimator, and method II is to add PMU measurements through a post-processing step. These two methods can achieve very similar state estimation results, but method II is a more time-efficient approach which does not modify the existing state estimation software.

Interest in controlling the synthesis of silver nanoparticles in colloidal solutions has increased during the last two decades. There is also growing interest in forming layers of silver nanoparticles on substrates, particularly for surface-enhanced Raman spectroscopy applications. However, methods to grow silver nanoparticles directly on substrates have not been studied extensively, and there are few techniques for controlling the size, shape, density, and location of the particles. This work presents a simple and reliable method to photodeposit silver nanoparticles onto transparent substrates. The size, shape and deposition density of the nanoparticles are influenced by the precursor solution, light intensity, and surface modification of the substrate. This allows control of the optical and electrical properties of the nanoparticle films. Furthermore, the particles can be patterned using direct laser exposure, scanning probe methods, and electron-beam lithography. Applications and advantages of this deposition method are proposed and explored.

The interaction of an evanescent wave and plasmonic nanostructures are simulated in Finite Element Method. Specifically, the optical absorption cross section (Cabs) of a silver nanoparticle (AgNP) and a gold nanoparticle (AuNP) in the presence of metallic (gold) and dielectric (silicon) atomic force microscope (AFM) probes are numerically calculated in COMSOL. The system was illuminated by a transverse magnetic polarized, total internally reflected (TIR) waves or propagating surface plasmon (SP) wave. Both material nanoscale probes localize and enhance the field between the apex of the tip and the particle. Based on the absorption cross section equation the author was able to demonstrate the increment of absorption cross section when the Si tip was brought closer to the AuNP, or when the Si tip apex was made larger. However, the equation was not enough to predict the absorption modification under metallic tips, especially for a AgNP's Cabs; neither it was possible to estimate the optical absorption based on the localized enhanced field caused by a gold tip. With the help of the driven damped harmonic oscillator equation, the Cabs of nanoparticles was explained. In addition, this model was applicable for both TIR and Surface Plasmon Polaritons illuminations. Fitting the numerical absorption data to a driven damped harmonic oscillator (HO) model revealed that the AFM tip modifies both the driving force (F0), consisting of the free carrier charge and the driving field, and the overall damping of the oscillator beta. An increased F0 or a decreased beta will result in an increased Cabs and vice versa. Moreover, these effects of F0 and beta can be complementary or competing, and they combine to either enhance or suppress absorption. Hence, a significantly higher beta with a small increment in F0 will result in an absorption suppression. Therefore, under a Si tip, Cabs of a AuNP is enhanced while Cabs of a AgNP is suppressed. In contrast, a Au tip suppresses the Cabs for both Au and Ag NPs. As an extension of this absorption model, further investigation of the guided mode and a close by nanostructure is proposed, where the scattered wave off the structure attenuates the guided mode with destructive interference.