MP3 compression format is essential categorized one of the MPEG (Moving Picture Experts Group) standards for digital audio compression nowadays. For its superiority and convenient,MP3 has been widely used in multimedia player and storage application. In this thesis, we use software/hardware co-design methodology to design the MP3 player system. In addition, system level scheduling is adopted to arrange the execute time of SW and HW and significantly reduce the hardware cost under the construct of real-time processing. We can obtain fewer extra hardware cost while attaining the goal of real- time playing system. In order to perform software/hardware partitioning, simulate and analyze the MP3 application program to find out the critical parts with high time complexity and regular computation. These parts with high time complexity, e.g. IMDCT and Poly Phase synthesis filter bank, then are implemented by hardware to achieve better system performance. We use high level synthesis concept to optimize the hardware part and integrate software and hardware¡Asuch that communication between software and hardware can be performed smoothly. Finally, MP3 player system is using verified by hardware¡Bsoftware co- verified methodology on an SoC development platform. In order to build a complete verification environment, we attach extra input and output interfaces to the SoC development platform, e.g. the network card and sound card. Write some driver to drive related peripheral device. Since OS is conducive to the operations between software and hardware, Linux OS is ported to the SoC platform to manage software and hardware resources and drive the peripheral devices.

For the next generation of multimedia applications such as digital video broadcasting, multimedia message service and video conference, enormous amounts of video context will be transmitted and exchanged through the wireless channel. Due to the limited communication bandwidth, how to achieve more efficient, reliable, and robust video compression is a very important issue. H.264/AVC (Advanced Video Coding) is one of the latest video coding standards, which is anticipated to be adopted in many future application systems due to its excellent compression efficiency. In this thesis, the implementation issue of the H.264 decoding algorithm on the SOC (System-On-Chip) development platform is addressed. Several key modules of H.264 decoders including color space converter, inter-interpolation, transformation rescale modules are all realized by dedicated hardware architectures. A novel low-cost fast scalable deblocking filter based on single-port memory architecture is also proposed which can support fast real-time deblocking filtering process. The entire H.264 decoder system is prototyped on the Altera SOPC platform, and the decoding result is displayed directly on the monitor. All the hardware modules are hooked on the system Avalon bus, and interact with Altera NIOS-¢º processor. Through the hardware/software co-design approach, the decoding speed can be increase by a factor of 1.9.

In this thesis, co-design and co-verification of a microcontroller hardware and software using SystemC is studied. For this purpose, an MC68HC11 microcontroller unit, a test bench that contains input and output modules for the verification of microcontroller unit are implemented using SystemC programming language and a visual simulation program is developed using C# programming language in Microsoft .NET platform. SystemC is a C++ class library that is used for co-designing hardware and software of a system. One of the advantages of using SystemC in system design is the ability to design each module of the system in different abstraction levels. In this thesis, test bench modules are designed in a high abstraction level and microcontroller hardware modules are designed in a lower abstraction level. At the end, a simulation platform that is used for co-simulation and co-verification of hardware and software modules of overall system is developed by combining microcontroller implementation, test bench modules, test software and visual simulation program. Simulations at different levels are performed on the system in the developed simulation platform. Simulation results helped observing errors in designed modules easily and making corrections until all results verified designed hardware modules. This stuation showed that co-designing and co-verifying hardware and software of a system helps finding errors and making corrections in early stages of system design cycle and so reducing design time of the system.

Recently developed co-design methods ask for users&rsquo / creative outcomes all through the design process. Designers are familiar with the creative process but users are not. The heuristic tasks given to users should reveal their creativity and harness it for high-quality outcomes. Contextmapping is a new co-design method following the same need as others / the method involves generative sessions in which users are asked to create artifacts communicating their needs and dreams about future products. Children are taking part in these processes and their involvement requires an understanding about their needs and abilities. Contextmapping with children has many aspects yet to be discovered, one of which is harnessing children&rsquo / s creativity during generative sessions. This forms the basis for this research. The thesis traces an overview of creativity, co-design with children, contextmapping with children and children&rsquo / s creativity. The literature review opens a new area for investigation about using competition, which is seen both detrimental and challenging for eliciting creativity from children, as a motivation during contextmapping activities. The empirical study is formed from six sessions aiming to find an answer to the effects of cooperation and competition on children&rsquo / s creativity during contextmapping sessions in regard to gender differences. The analyzed and discussed findings show that competition is a motivating element and has positive impacts on children&rsquo / s creativity, it increases children&rsquo / s motivation towards contextmapping tasks and the outcomes of the sessions are more appropriate to the expectations of the task.

This dissertation aims to evaluate the package effects on the performance of radio frequency integrated circuits (RFICs) for wireless applications. A model-based study is presented to compare the effects between flip-chip and wire-bond packages on a front-end cascode low-noise amplifier (LNA) in a 2.45 GHz CMOS wireless local area network (WLAN) receiver. To construct the package electrical models, specific modeling dies are designed to help extract the equivalent-circuit elements from measured S-parameters for chip-package interconnects. Furthermore, the ground-proximity effect on on-chip spiral inductors in a flip-chip package is first observed and presented in this modeling study. Excellent agreement between modeling and measurement is obtained by up to 20 GHz for a 64-pin flip-chip ball grid array (FC-BGA) package and a 64-pin wire-bond quad flat nonlead (WB-QFN) package. For practical applications, the established package models are used to predict the degradation of the figure of merit for the cascode LNA under packaged condition. Chip-package co-simulations can achieve good agreement with measurements, and thus can persuasively account for the complete effects caused by the two different packages on the cascode LNA. To simultaneously consider the package and board interconnect effects on RFICs, this dissertation also designs and implements a 1.95 GHz upconverter for the wideband code-division multiple-access (W-CDMA) transmitter. Specific ground wire-bonding and board connection are designed to minimize the linearity degradation due to package and board interconnects. Nonlinear analysis technique is also used to evaluate the nonlinear distortion of the upconverter in the chip-package-board co-design phase. The final measurement results have successfully verified the co-design predictions and simulations for this upconverter.

No description available.

<p> </p><p>Modern nuclear and particle physics experiments run at a very high reaction rate and are able to deliver a data rate of up to hundred GBytes/s.  This data rate is far beyond the storage and on-line analysis capability. Fortunately physicists have only interest in a very small proportion among the huge amounts of data. Therefore in order to select the interesting data and reject the background by sophisticated pattern recognition processing, it is essential to realize an efficient data acquisition and trigger system which results in a reduced data rate by several orders of magnitude. Motivated by the requirements from multiple experiment applications, we are developing a high-end reconfigurable computation platform for data acquisition and triggering. The system consists of a scalable number of compute nodes, which are fully interconnected by high-speed communication channels. Each compute node features 5 Xilinx Virtex-4 FX60 FPGAs and up to 10 GBytesDDR2 memory. A hardware/software co-design approach is proposed to develop custom applications on the platform, partitioning performance-critical calculation to the FPGA hardware fabric while leaving flexible and slow controls to the embedded CPU plus the operating system. The system is expected to be high-performance and general-purpose for various applications especially in the physics experiment domain.</p><p>As a case study, the particle track reconstruction algorithm for HADES has been developed and implemented on the computation platform in the format of processing engines. The Tracking Processing Unit (TPU) recognizes peak bins on the projection plane and reconstructs particle tracks in realtime. Implementation results demonstrate its acceptable resource utilization and the feasibility to implement the module together with the sys-tem design on the FPGA. Experimental results show that the online track reconstruction computation achieves 10.8 - 24.3 times performance acceleration per TPU module when compared to the software solution on a Xeon2.4 GHz commodity server.</p>

Women with young children are a growing population experiencing homelessness. Transitional housing services provide shelter and educational programming aimed at fostering the development of skills necessary to attain and maintain basic needs. Adagio Health’s transitional home, Healthy Start House (HSH) served as a case study in which to explore the intersection of design, service and social innovation. The metrics of success outlined by the county for HSH include attaining permanent housing and employment or education. Using a co-creative process, exploratory and generative research uncovered that the service had no clear route to assist the women to develop core competencies to meet the county’s metrics of success. Rather than create a new extension of the current service, this design solution focuses on amplifying the resources and infrastructure already in place to improve the current service delivery. The solution includes an ideal plan for the HSH staff to work with the clients to comprehensively develop their core competencies, and an expanded view of how a money management system helps the clients meet the county’s metrics. We hypothesize, through this system, clients will re-enter society smoothly, armed with the skills and knowledge needed to provide for themselves and their children. While the design generated much enthusiasm from all stakeholders, the concept would benefit from further testing and iterations over a longer length of time to understand if it can, indeed, improve learning and performance outcomes and create sustained behavior change.

In this thesis, an 8-bit microcontroller, 8051 core, is implemented using SystemC programming language. SystemC is a new generation co-design language which is capable of both programming software and describing hardware parts of a complete system. The benefit of this design environment appears while developing a System-on-Chip (SoC), that is a system consisting both custom hardware parts and embedded software parts. SystemC is not a completely new language, but based on C++ with some additional class libraries and extensions to handle hardware related concepts such as signals, multi-valued logic, clock and delay elements. 8051 is an 8 bit microcontroller which is widely used in industry for many years. The 8051 core is still being used as the main controller in today&rsquo / s highly complex chips, such as communication and bus controllers. During the development cycles of a System-on-Chip, instead of using separate design environments for hardware and software parts, the usage of a unified co-design environment provides a better design and simulation methodology which also decreases the number of iterations at hardware software integration. In this work, an 8-bit 8051 microcontroller core and external memory modules are developed using SystemC that can be re-used in future designs to achieve more complex System-on-Chip&rsquo / s. During the development of the 8051 core, simulation results are analyzed at each step to verify the design from the very beginning of the work, which makes the design processes more structured and controlled and faster as a result.

La mobilité est aujourd’hui au cœur des préoccupations citoyennes et gouvernementales. Une explication possible à cette difficulté à résoudre les problèmes de mobilité est que les besoins réels des usagers des transports ne sont pas (ou sont faiblement) pris en compte dans la conception de nouveaux systèmes de transports. C’est pourquoi la participation des usagers dans des projets de conception se développe depuis quelques décennies. Elle est motivée par l’idée que les usagers ont une meilleure connaissance de leurs propres besoins et peuvent donc contribuer à développer des solutions innovantes. Cependant, il est nécessaire de proposer des outils qui optimisent les contributions des usagers au processus de conception créative et donc, en amont, d’identifier la nature ainsi que les leviers et les freins à la participation des usagers dans ce processus. Dans les trois études que nous avons réalisées, nous observons que les usagers contribuent principalement au processus de co-conception créative en fournissant des informations sur leurs besoins réels et leurs attentes. Mais pour que ces besoins et attentes soient réellement pris en compte, il est nécessaire d’outiller la conception créative en proposant une méthode qui permette de mettre à profit les contributions de chacun et de donner aux usagers un poids décisionnel équivalent à celui des concepteurs. Par ailleurs, le développement de logiciels de réalité virtuelle peut constituer un facilitateur de la co-conception créative, dans la mesure où il stimule la génération d’idées. De plus, la réalité virtuelle permet de créer de nouveaux environnements pouvant développer les capacités des usagers à se projeter dans un futur proche et imaginer des solutions plus créatives. / Mobility is nowadays one of the main concerns of citizens and governments. One possible way to explain these difficulties to solve mobility problems would be that real problems of transportation users would be not (or weakly) accounted in the design of new transportation systems. In this perspective, user participation in design projects is increasingly practiced since a few decades. It is motivated by the idea that users have a better knowledge of their own needs and then may contribute to develop innovative solutions. However it is necessary to propose some tools to optimize the users’ contributions to creative design process, and then necessary to identify the nature as well as the levers and barriers to user participation in this process. In the three studies we conducted, we observe that users mainly contribute to creative co-design process by supplying information about their real needs and expectations. However, in order to really account these needs and expectations, it is necessary to tool up creative design with a method which allows to take advantage of the contributions of each participant and to give users a decision-making power equivalent to that of experts. Furthermore, the development of virtual reality software may constitute a lever for creative co-design, in so far as it stimulates the generation of solutions. Moreover, virtual reality allows creating new environments to develop users’ skills to project themselves in a near future and then imagine more creative solutions.