Esta dissertação tem por finalidade apresentar uma metodologia de injeção de falhas baseada em emulação de processadores. Os efeitos causados pela radiação em processadores, operando no espaço ou em altitudes elevadas, têm sido estudados na literatura para o desenvolvimento de mecanismos de tolerância a falhas. Com a crescente popularidade do uso de processadores comerciais, (COTS – do inglês, Commercial Off-The-Shelf), em aplicações críticas, uma série de preocupações tem surgido devido a falta de confiabilidade apresentada por estes sistemas. Sendo desprovidos de mecanismos de tolerância para melhor robustez em ambientes espaciais, estes dispositivos comerciais são mais suscetíveis aos efeitos da radiação. Neste contexto, técnicas de tolerância a falhas baseadas em software vêm sendo estudadas a fim de aumentar a confiabilidade desta abordagem. Para a devida validação de tais mecanismos de tolerância, o uso de técnicas de injeção de falhas é aplicável. Estas técnicas de injeção de falhas possuem uma série de limitações que podem inviabilizar a sua aplicabilidade, dependendo da abordagem utilizada. Fatores como custo, indisponibilidade da descrição de hardware – utilizada em técnicas de injeção de falhas por simulação ou emulação em FPGA (Field Programmable Gate Array), e o longo tempo necessário para execução dos experimentos, são alguns exemplos de limitações das técnicas disponíveis. Com base nisso, a metodologia de injeção de falhas alternativa apresentada neste trabalho, visa reduzir as limitações presentes nas mais diversas técnicas. Baseada na utilização de tradução dinâmica de instruções, para acelerar o processo de execução de aplicações em emuladores, a metodologia apresenta um modelo de falhas para efeitos transientes e permanentes, aplicáveis neste cenário. Como método de classificação dos efeitos observados neste processo, um modelo presente na literatura foi utilizado. Para validação desta metodologia, um injetor de falhas baseado no emulador QEMU foi desenvolvido. Posteriormente, um estudo de caso com o injetor de falhas foi realizado para três estruturas de software distintas executando individualmente no processador MIPS 24kc, representando três níveis de complexidade distintos: sistema operacional Linux, sistema de tempo real, (RTEMS – do inglês, Real-Time Operating System), e uma aplicação dedicada. Cada sistema foi submetido a uma campanha de injeção de falhas transientes para emulação de efeitos singulares (SEU – do inglês, Single Event Upset). Como alvo de falhas, foram selecionados os registradores do processador e a memória de dados. Por fim, as análises obtidas através dos experimentos mostraram os diferentes efeitos observados para os três níveis de complexidade dos softwares executados. Além disso, se pôde avaliar o desempenho do injetor de falhas, disponibilizando ao final do trabalho uma ferramenta para o auxílio no desenvolvimento de técnicas de tolerância a falhas por software. / This dissertation aims to present a fault injection methodology based on microprocessor emulation. The effects caused by radiation in microprocessors, operating in space or at high altitudes, have been studied in the literature for the development of fault tolerance mechanisms. With the growing popularity of COTS (Commercial Off-The-Shelf) processors usage, in critical applications, a number of concerns have arisen due to the lack of reliability, presented in these systems. Due to the lack of fault tolerance mechanisms, these COTS devices are more susceptible to radiation effects. In this context, software-based fault tolerance techniques have been studied in the literature in order to increase the reliability of this approach. To validate such fault tolerance mechanisms, the use of fault injection techniques is applicable. These fault injection techniques have several limitations which can preclude their applicability, depending on of its design approach. Factor such as cost, unavailability of hardware description – used by fault injection techniques based on simulation or emulation with FPGA (Field Programmable Gate Array), and the long time demanded to execute experiments, are some examples of limitations in the available techniques. Based on this, the alternative fault injection methodology presented in this work aims to reduce these limitations. Based on the dynamic translation of instructions usage to accelerate the execution of application on emulators, the methodology presents a fault model for transient and permanent faults applicable in this scenario. As a classification method of the observed effects in this process, a model in the literature has been used. To validate this methodology, a fault injector based on the QEMU emulator was implemented. Later, a case study with the fault injector was performed for three software structures running at a time on a MIPS 24kc processor, representing three different levels of complexity: Linux operating system, RTEMS (Real-Time Operating System), and a dedicated application. Each system was submitted to a fault injection campaign emulating Single Event Upsets (SEUs). As fault targets it was selected the processor registers and the data memory. Finally, the analysis obtained with the experiments showed the different effects observed for the three levels of complexity. Besides that, the fault injector performance could be evaluated providing in the end a tool to help in the development of software-based fault injection techniques.

För att korta ner den totala driftsättningstiden i projekt beslutade Volvo Cars Skövde om att undersöka möjligheterna för verifiering av PLC-logik mot simuleringsprogram. Det övergripande målet med examensarbetet var att undersöka möjligheterna för att upprätta kommunikation mellan flödesimuleringsprogrammet Siemens Plant Simulation och en PLC-enhet. En ingripande förståelse av området virtuell driftsättning skapades vid skrivandet av referensramen och en litteraturstudie vilket legat till grund för det fortsatta praktiska arbetet. Genom en datainsamling med intervjuer, diskussioner och en omfattande litteraturstudie kunde en bättre förståelse bildas kring hur kommunikation mellan de olika programmen fungerar, samt viktiga punkter som bör has i åtanke vid virtuell driftsättning överlag. Ett hypotetiskt system utvecklades i Plant Simulation av Volvo Cars Skövde för att användas som testsystem. I emuleringsmjukvaran Simumatik3D skapades en modell för att efterlikna Plant Simulation modellen samtidigt som PLC-logiken utvecklades i Siemens Step 7. Under utvecklingens gång verifierades delsystem i Simumatik3D mot den skapade PLC-logiken tills det att modellen var färdigutvecklad. För att säkerhetsställa att både Simumatik3D modellen och Plant Simulation modellen var valid undersöktes ett antal valideringspunkter. Experimentfasen tog vid efter valideringstestet där olika scenarier undersöktes och testades för att föra upp eventuella problem i modellerna till ytan. En omfattande utvärdering presenteras där hela uppbyggnadsfasen av modeller utvärderas med avseende på tidsåtgång, för- och nackdelar och kommunikation med PLC. De två programmen Simumatik3D och Plant Simulation utvärderades mot varandra för att få ut vilket program som mest lämpar sig för virtuell verifiering av PLC-logik. Ett översiktligt arbetssätt togs fram utifrån den utvärdering som gjorts samt erfarenheter från genomförandet av arbetet. Resultatet av det framtagna arbetssättet presenteras vilket beskriver uppdelningen mellan beställare och leverantör, kommunikationen mellan parterna samt en överskådlig visualisering av arbetssättets process. Resultatet från utvärderingen visade att Simumatik3D lämpar sig åt att verifiera PLC logik på detaljnivå. Utvärderingen visade även att PLC-logik kan verifieras med hjälp av Plant Simulation, dock inte på samma detaljnivå. Plant Simulation lämpar sig istället till att göra simuleringsmodeller mer verklighetstrogna. Virtuell driftsättning av PLC-logik är ett nytt koncept på Volvo Cars Skövde och därför kan resultatet från detta arbete ligga till grund för fortsatt arbete inom detta område. Virtuell verifiering av PLC-logik diskuteras där flera aspekter som är viktiga att tänka på presenteras. Projektens huvudmål att virtuellt verifiera PLC-logik mot simuleringsprogram uppnåddes och gav goda resultat, de uppsatta delmålen resulterade i en omfattande utvärdering och framtida rekommendationer. / To shorten project lead times Volvo Cars Skövde decided to explore the possibilities regarding verifi-cation of PLC-logic in simulation programs. The overall objective of the thesis was to analyze the pos-sibilities for establishing communication between the flow simulation program Plant Simulation and a PLC-device. A thorough understanding of the area virtual commissioning was obtained by writing the frame of reference and a literature review which served as basis for the continued practical work. Through a collection of interviews, discussions and an extensive literature review a better under-standing regarding how the communication between the different programs works, along with im-portant points that should be considered under a virtual commissioning project was obtained. A hy-pothetical system was developed in Plant Simulation by Volvo Cars Skövde to be used as a test sys-tem. The Simumatik3D model was created by emulating the Plant Simulation model and at the same time developing the PLC-logic in Siemens Step 7. During the development progress subsystems were verified in Simumatik3D against the created PLC-logic until the model was fully developed. To make sure that both the Simumatik3D model and the Plant Simulation model was valid a number of valida-tion points were tested. After the validation test the experimental phase started were different sce-narios were analyzed and tested to bring up any problems in the models to the surface. A thorough evaluation is presented in which the entire construction phase of the models is evaluated in terms of time required, advantages and disadvantages and communication with the PLC-device. The two pro-grams Simumatik3D and Plant Simulation was evaluated against one another in order to find out which program that is the most suited for virtual verification of PLC-logic. An overall methodology was developed based on the evaluation carried out and the experience gained from the implementa-tion of the work. The result from the developed methodology is presented which describes the parti-tion between the client and supplier, the communication between them and a visualization of the methodology-process. The result from the evaluation showed that Simumatik3D was more suitable for verification of PLC logic on a detailed level. The evaluation also showed that the PLC logic could be verified with Plant Simulation, but not on the same detailed level. Plant Simulation was more suit-able for making simulation models more realistic. Virtual commissioning of PLC-logic is a new con-cept on Volvo Cars Skövde and therefore can the result from this thesis form a basis for future work in this area. Virtual verification of PLC-logic is discussed in which several important aspects to think about is presented. The projects main goal to virtually verify PLC-logic in simulation programs was achieved and yielded good results, the partial objectives resulted in a thorough evaluation and future recommendations.

Cette thèse propose une approche générique pour automatiser des expériences sur des réseaux quelle que soit la technologie utilisée ou le type de plate-forme d'évaluation. L'approche proposée est basée sur l'abstraction du cycle de vie de l'expérience en étapes génériques à partir desquelles un modèle d'expérience et des primitives d'expérimentation sont dérivés. Une architecture générique d'expérimentation est proposée, composée d'un modèle d'expérience générique, d'une interface pour programmer des expériences et d'un algorithme d'orchestration qui peux être adapté aux simulateurs, émulateurs et bancs d'essai de réseaux. La faisabilité de cette approche est démontrée par la mise en œuvre d'un framework capable d'automatiser des expériences sur toute combinaison de ces plateformes. Trois aspects principaux du framework sont évalués : son extensibilité pour s'adapter à tout type de plate-forme, son efficacité pour orchestrer des expériences et sa flexibilité pour permettre des cas d'utilisation divers, y compris l'enseignement, la gestion des plate-formes et l'expérimentation avec des plates-formes multiples. Les résultats montrent que l'approche proposée peut être utilisée pour automatiser efficacement l'expérimentation sur les plates-formes d'évaluation hétérogènes et pour un éventail de scénarios variés. / This thesis proposes a generic approach to automate network experiments for scenarios involving any networking technology on any type of network evaluation platform. The proposed approach is based on abstracting the experiment life cycle of the evaluation platforms into generic steps from which a generic experiment model and experimentation primitives are derived. A generic experimentation architecture is proposed, composed of an experiment model, a programmable experiment interface and an orchestration algorithm that can be adapted to network simulators, emulators and testbeds alike. The feasibility of the approach is demonstrated through the implementation of a framework capable of automating experiments using any combination of these platforms. Three main aspects of the framework are evaluated: its extensibility to support any type of platform, its efficiency to orchestrate experiments and its flexibility to support diverse use cases including education, platform management and experimentation with multiple platforms. The results show that the proposed approach can be used to efficiently automate experimentation on diverse platforms for a wide range of scenarios.

In order to test an automation code for a production cell it is necessary to have access to the physical model. Therefore, the automation code is validated in the end of the design process. Finding and correcting faults in the code takes time and changes late in the design process tend to be expensive. Having a virtual model of a production cell with the same features as a physical model enables to test automation code and evaluate different features in an early stage of development. The process of having a virtual model to validate code and try out new features is called Virtual Commissioning (VC). The ability to detect errors in the code and identify problems early in the process can lower the lead time for the project and reduce the overall cost. Virtual Commissioning is a relative new process step in the industry and have so far mainly used in larger enterprises. This project has been done at a company named NPB Automation AB, located in Jönköping, Sweden. NPB is a smaller company that designs and produces robot cells that are fully automated. This project is an investigate to see if a software that can perform a Virtual Commissioning should be added to their lineup of tools. This task has been managed by empirically finding how a Virtual Commissioning can be set up. To find out how Virtual Commissioning can affect different fields at the company interviews were held with personnel from different working fields. To get practical knowledge and verifying that Virtual Commissioning can be performed on a robot cell produced at the company, a Virtual Commissioning were set up of a subsystem of a robot cell. The Virtual Commissioning in this project was set up with the software Emulate3D connected to a Rockwell PLC model 1769- L33ERMS, the PLC code used were written in Studio 5000 Logix Designer. The conclusion of his project is that Virtual Commissioning can reduce time to market by reducing the commissioning time. The tasks where Virtual Commissioning will benefit the most is in new projects or when validating changes.

The aim of this master’s thesis Simulator of Production Lines is to design a concept of the simulator of conveyor production lines with focus on testing control software for PLC and to implement this simulator. The thesis includes description of ready to use solutions available on the market, description of PLC control algorithm to be tested, designed concept of the simulator, description of the implemented software, demonstration of the simulator on a specific task and evaluation of its capabilities.

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Accurate virtual platforms allow for crucial, early, and inexpensive assessments about the viability and hardware constraints of software/hardware applications. The growth of multicore architectures in both number of cores and relevance in the industry, in turn, demands the emergence of faster and more efficient virtual platforms to make the benefits of single core simulation and emulation available to their multicore successors whilst maintaining accuracy, development costs, time, and efficiency at acceptable levels. The goal of this thesis is to find optimal virtual platforms to perform hardware design space exploration for multi-core architectures running filtering functions, particularly, a discrete signal filtering Matlab algorithm used for oil surveying applications running on an ARM Cortex-A53 quadcore CPU. In addition to the filtering algorithm, the PARSEC benchmark suite was also used to test platform compliance under workloads with diverse characteristics. Upon reviewing multiple virtual platforms, the gem5 simulator and the QEMU emulator were chosen to be tested due to their ubiquitousness, prominence and flexibility. A Raspberry Pi Model B was used as reference to measure how closely these tools can model a commonly used embedded platform. The results show that each of the virtual platforms is best suited for different scenarios. The QEMU emulator with KVM support yielded the best performance, albeit requiring access to a host with the same architecture as the target, and not guaranteeing timing accuracy. The most accurate setup was the gem5 simulator using a simplified cache system and an Out-of-Order detailed ARM CPU model.

This work demonstrates the capability of a power electronic based power hardware-inthe- loop (PHIL) platform to emulate electric machines for the purpose of a motor drive testbench with a particular focus on induction machine emulation. PHIL presents advantages over full-hardware testing of motor drives as the PHIL platform can save space and cost that comes from the physical construction of multiple electric machine test configurations. This thesis presents real-time models that were developed for the purpose of PHIL emulation. Additionally, real-time modeling considerations are presented as well as the modeling considerations that stem from implementing the model in a PHIL testbench. Next, the design and implementation of the PHIL testbench is detailed. This thesis describes the design of the interface inductor between the motor drive and the emulation platform. Additionally, practical implementation challenges such as common mode and ground loop noise are discussed and solutions are presented. Finally, experimental validation of the modeling and emulation of the induction machine is presented and the performance of the machine emulation testbench is discussed. / Master of Science / According to the International Energy Agency (IEA), electric power usage is increasing across all sectors, and particularly in the transportation sector [1]. This increase is apparent in one's daily life through the increase of electric vehicles on the road. Power electronics convert electricity in one form to electricity in another form. This conversion of power is playing an increasingly important role in society because examples of this conversion include converting the dc voltage of a battery to ac voltage in an electric car or the conversion of the ac power grid to dc to power a laptop. Additionally, even within an electric car, power converters transform the battery's electric power from a higher dc voltage into lower voltage dc power to supply the entertainment system and into ac power to drive the car's motor. The electrification of the transportation sector is leading to an increase in the amount of electric energy that is being consumed and processed through power electronics. As was illustrated in the previous examples of electric cars, the application of power electronics is very wide and thus requires different testbenches for the many different applications. While some industries are used to power electronics and testing converters, transportation electrification is increasing the number of companies and industries that are using power electronics and electric machines. As industry is shifting towards these new technologies, it is a prime opportunity to change the way that high power testing is done for electric machines and power converters. Traditional testing methods are potentially dangerous and lack the flexibility that is required to test a wide variety of machines and drives. Power hardware-in-the-loop (PHIL) testing presents a safe and adaptable solution to high power testing of electric machines. Traditionally, electric machines were primarily used in heavy industry such as milling, processing, and pumping applications. These applications, and other applications such as an electric motor in a car or plane are called motor drive systems. Regardless of the particular application of the motor drive system, there are generally three parts: a dc source, an inverter, and the electric machine. In most applications, other than cars which have a dc battery, the dc source is a power electronic converter called a rectifier which converts ac electricity from the grid to dc for the motor drive. Next, the motor drive converts the dc electricity from the first stage to a controlled ac output to drive the electric machine. Finally, the electric machine itself is the final piece of the electrical system and converts the electrical energy to mechanical energy which can drive a fan, belt, or axle. The fact that this motor drive system can be generalized and applied to a wide range of applications makes its study particularly interesting. PHIL simplifies testing of these motor drive systems by allowing the inverter to connect directly to a machine emulator which is able to replicate a variety of loads. Furthermore, this work demonstrates the capability of PHIL to emulate both the induction machine load as well as the dc source by considering several rectifier topologies without any significant adjustments from the machine emulation platform. This thesis demonstrates the capabilities of the EGSTON Power Electronics GmbH COMPISO System Unit to emulate motor drive systems to allow for safer, more flexible motor drive system testing. The main goal of this thesis is to demonstrate an accurate PHIL emulation of a induction machine and to provide validation of the emulation results through comparison with an induction machine.

Des recherches récentes démontrent que les normes nord-américaines de construction et de dimensionnement des ponts sous-estiment les efforts engendrés lors de collisions de camions ou de barges avec un pont. La majorité des recherches sont menées par modélisations, puisque l’étude d’une collision pleine échelle est très coûteuse. Afin de mener des recherches au sujet des charges d’impact pour l’étude des mécanismes d’endommagement ainsi que des méthodes de réhabilitation, il serait intéressant qu’une méthode d’essai en laboratoire soit développée. Une façon innovatrice de reproduire ces charges serait de procéder par des tests hybrides en temps réel avec un vérin hydraulique dynamique pour l’application des charges. Or, les charges d’impact sont caractérisées en force et le contrôle en force des vérins hydrauliques dynamiques en boucle fermée cause problème. La problématique est due à une faible stabilité de contrôle en boucle fermée ainsi qu’une faible précision des charges appliquées. Ces problèmes peuvent être évités par l’ajout d’un mécanisme flexible entre le vérin et la structure à tester. La déflexion du mécanisme est utilisé comme rétroaction pour contrôler le vérin. En connaissant la rigidité du mécanisme et en contrôlant sa déflexion, un contrôle indirect en force peut être accompli selon la loi de Hooke. Le projet présenté dans ce mémoire consiste à développer et à optimiser un tel mécanisme d’une capacité de [plus ou moins] 50 kN. Son effet sur la stabilité et la performance de la boucle de contrôle est étudié par modélisation et par essais en laboratoire, sa conception et ses principes de fonctionnement sont décrits, son comportement sous sollicitation statique et dynamique est analysé et discuté. Les résultats obtenus montrent l’excellent comportement du prototype sous chargement statique et dynamique ainsi que l’amélioration des performances de contrôle en force avec un vérin hydraulique.