São apresentados os resultados do estudo das propriedades eletroquímicas do eletrodo de diamante dopado com boro (DDB) e do eletrodo de DDB modificado diretamente pelo método Sol-Gel com PbOx, para a determinação de carbaril. Mostrou-se que uma polarização anódica (3,0 V vs Ag/AgCl, 30 min) seguida de uma catódica (-3,0 V vs Ag/AgCl, 30 min), em meio ácido, são apropriadas para otimizar o desempenho catalítico da superfície. As imagens de AFM mostraram alterações topológicas significativas no eletrodo de PbOx/DDB, assim como as imagens digitais apresentaram uma provável mistura de óxidos de chumbo depositados na superfície do DDB. Caracterizações físicas do modificador PbOx foram realizadas com as técnicas de Microscopia Eletrônica de Varredura (MEV), Difratometria de raios-X (DRX) e Energia Dispersiva de raios-X (EDS). A MEV verificou os aspectos morfológicos da amostra e revelou que as partículas do modificador tinham formatos e tamanhos diferentes, distribuídas irregularmente. O difratograma de DRX confirmou a existência de uma mistura de óxidos de chumbo, produzida pelo método Sol-Gel e a análise por EDS mostrou a presença dos elementos chumbo e oxigênio, com proporção atômica de 43:57 (Pb:O). Para a determinação eletroanalítica do pesticida carbaril, empregou-se a técnica de Voltametria de Onda Quadrada (SWV) em tampão Britton-Robinson 4,0 x 10-2 mol L-1 (pH 6,0), com acréscimo de alíquotas obtidas de uma solução estoque de carbaril 1,0 x 10-2 mol L-1 em acetonitrila. Os parâmetros utilizados foram: frequência de 10 s-1, amplitude de pulso de 100 mV, incremento de potencial de 2 mV, potencial de pré-tratamento catódico de -1,1 V no tempo de 10 s. Curvas analíticas foram apresentadas para os dois eletrodos, mostrando que o eletrodo de DDB apresentou um limite de detecção (LD) de 2,0 µmol L-1. Já o eletrodo PbOx/DDB, um LD de 0,9 µmol L-1, baixo o suficiente em relação ao limite máximo de resíduo permitido pela ANVISA para a presença do pesticida em amostras de culturas agrícolas. A repetibilidade das medidas com o eletrodo de PbOx/DDB resultou em um desvio padrão relativo de 4,6% e a reprodutibilidade, em 5,2%. Em um estudo das velocidades de varredura, mostrou que a oxidação do carbaril é controlada por difusão e ocorre de maneira irreversível na superfície do eletrodo de PbOx/DDB. A técnica de SWV também foi aplicada em amostras reais de água artificialmente contaminadas de dois córregos da cidade de São Carlos - SP (Córrego Santa Maria do Leme e Córrego do Gregório), ambas tamponadas (pH 6,0), utilizando o eletrodo de PbOx/DDB. Com o objetivo de se comparar a precisão e a sensibilidade da SWV, foram obtidos espectros de UV-Vis em 280 nm e as correspondentes curvas analíticas para o carbaril em tampão BR e nas amostras dos córregos, num intervalo de concentrações de 5,0 x 10-6 a 3,5 x 10-5 mol L-1. O LD e o limite de quantificação (LQ) em solução tampão BR, calculados a partir dos experimentos de SWV, foram de 0,9 x 10-6 mol L-1 e 7,44 x 10-6 mol L-1, respectivamente. Para a técnica de UV-Vis, o LD foi de 2,6 x 10-5 mol L-1 e o LQ de 8,68 x 10-5 mol L-1, indicando que o método eletroanalítico é capaz de apresentar melhores resultados para a análise da oxidação de carbaril. Experimentos de eletrólises potenciostáticas a 3,0 V por 21 horas, acopladas a um detector de UV-Vis, mostraram que em solução tampão BR, o decaimento da concentração de carbaril para o eletrodo de DDB foi de 14,9%, ao passo que, para o eletrodo de PbOx/DDB, foi de 39,3%. Sendo assim, o eletrodo de PbOx/DDB mostrou melhores resultados, com uma excelente atividade catalítica, superior ao eletrodo de DDB sem modificação. / It is presented the results obtained in the study of electrochemical properties of the boron doped electrode (BDD) and of the BDD modified with PbOx by the Sol-Gel method, for the quantitative determination of carbaryl. It has been showed that an anodic polarization (3.0 V vs Ag/AgCl, 30 min) followed by a cathodic one (-3.0 V vs Ag/AgCl, 30 min), in acid medium, are appropriated to enhance the catalytic activity of the surface. The AFM images showed significant topologic alterations in the PbOx/DDB surface, moreover the digital imaging showed a mixture of lead oxides deposited in the DDB surface. Physical modifications of the PbOx modifier were carried out with Scanning Electron Microscopy (SEM), X-ray Diffraction Spectroscopy (XRD) and Energy Dispersive X-ray Spectroscopy (EDS). SEM measurements illustrated the morphologic aspects of the samples surfaces and showed that the modifier coating had shape and size distinct from the bare BDD surface and that it was irregularly distributed throughout the surface. The XRD difractogram confirmed the existence of a mixture of lead oxides, provided by the Sol-Gel procedure and the EDS indicated the presence of lead and oxygen in a 43:57 atomic proportion (Pb:O). For the electroanalytical determination of carbaryl, the Square Wave Voltammetry (SWV) technique was employed in Britton-Robinson buffer solution 4.0 x 10-2 mol L-1 (pH 6.0), with the additions of aliquots from a 1.0 x 10-2 mol L-1 cabaryl in acetonitrile. The voltammetric parameters were optimized and used as frequency of 10 s-1, pulse amplitude of 100 mV, potential increment of 2 mV, cathodic pre-treatment potential of -1.1 V during 10 s. Analytical curves were obtained for both electrodes (BDD and BDD modified with PbOx) with the limit of detection limit (LOD) calculated for BDD of 2.0 µmol L-1. On the other hand, for PbOx modified electrode the calculated LOD was 0.9 µmol L-1, below the maximum residue limit allowed by ANVISA for the presence of pesticide in agricultural samples. The repeatability of PbOx/BDD electrode revealed a relative standard deviation of 4.6% and a reproducibility of 5.2%. A voltammetry study in different scan rates showed that carbaryl oxidation occurs irreversibly with diffusion control on the modified electrode surface. The SWV was also applied in artificially contaminated water samples from two urban creeks in São Carlos-SP city (Santa Maria do Leme and Gregorio creeks), both water samples were buffered (pH 6.0) and analyzed with the modified electrode. Aiming to compare the precision and sensitivity of SWV in those samples, analyzes were also performed using UV-Vis absorption at 280 nm and the corresponding analytical curves for carbaryl in BR buffer were obtained for a pesticide concentration between 5.0 x 10 -6 to 3.5 x 10-5 mol L-1. The LOD and limit of quantification (LOQ) were obtained as 0.9 x 10-6 mol L-1 and 7.44 x 10-6 mol L-1 for each creek water sample, respectively. In the UV-Vis measurements, the LOD was 2.6 x 10-5 mol L-1 and LOQ was 8.68 x 10-5 mol L-1 for both water samples, pointing out the excellence of the electroanalytical methodology to quantify carbaryl concentrations in those matrices. Potentiostatic electrolysis experiments at 3.0 V for 21 hours were also conducted for BDD and PbOx/BDD surfaces, with \"in situ\" UV-Vis detection, in BR buffer solutions. After the time period the carbaryl concentration diminished 14.9% of its initial value for the BDD electrode, while for the modified one the diminishing was of 39.3 %. In this way, the PbOx/BDD electrode has demonstrated its excellent catalytic performance, quite superior to that of the bare BDD one.

This thesis proposes a new variable-order prediction method to predict the Shannon expansion order during the BDD tree generator. Combining this method with the original minimum width method, we can generator a better BDD tree to be used in our pass-transistor logic synthesizer. Also we propose two partitioning methods to reduce the length of the critical paths. The first method can effectively reduce the critical path delay at the cost of much higher area cost. The second method explores the common factors in the Boolean functions to reduce the critical path delay with reasonably increased area cost. Furthermore, we discuss the methods of inserting regenerating inverters/buffers along the path in BDD tree by selecting inverter cells and MUX cells of proper driving strength to optimize the area/cost/power performance. Finally, the automatic layout generation is considered to produce the physical layout more efficiently compared with that using commericial automatic place-and-route tools.

The current treatment of water contaminated with organic compounds includes adsorption, air stripping, and advanced oxidation processes. These methods large quantities of water and require excessive energy and time. A novel treatment process of concentrating and then electrochemically oxidizing compound would be a more feasible practice. This research investigated the oxidative destruction of perfluorooctane sulfonate (PFOS), perfluorobutane sulfonate (PFBS) and trichloroethene (TCE) at boron-doped diamond film electrodes and the adsorption of PFOS and PFBS on granular activated carbon and ion exchange resins.Experiments measuring oxidation rates of PFOS and PFBS were performed over a range in current densities and temperatures using a rotating disk electrode (RDE) reactor and a parallel plate flow-through reactor. Oxidation of PFOS was rapid and yielded sulfate, fluoride, carbon dioxide and trace levels of trifluoroacetic acid. Oxidation of PFBS was slower than that of PFOS. A comparison of the experimentally measured apparent activation energy with those calculated using Density Functional Theory (DFT) studies indicated that the most likely rate-limiting step for PFOS and PFBS oxidation was direct electron transfer. The costs for treating PFOS and PFBS solutions were compared and showed that PFOS is cheaper to degrade than PFBS.Screening studies were performed to find a viable adsorbent or ion exchange resin for concentrating PFOS or PFBS. Granular activated carbon F400 (GAC-F400) and an ion exchange resin, Amberlite IRA-458, were the best methods for adsorbing PFOS. Ionic strength experiments showed that the solubility of the compounds affected the adsorption onto solid phases. Regeneration experiments were carried out to determine the best method of recovering these compounds from the adsorbents; however, the compounds could not be effectively removed from the adsorbents using standard techniques.The electrochemical oxidation of trichloroethene (TCE) at boron-doped diamond film electrodes was studied to determine if this would be a viable degradation method for chlorinated solvents. Flow-through experiments were performed and showed TCE oxidation to be very rapid. Comparing the data from the DFT studies and the experimentally calculated apparent activation energies the mechanism for TCE oxidation was determined to be controlled by both direct electron transfer and oxidation via hydroxyl radicals.

Kentucky Architecture nanocontrollers employ a bit-serial SIMD-parallel hardware design to execute MIMD control programs. A MIMD program is transformed into equivalent SIMD code by a process called Meta-State Conversion (MSC), which makes heavy use of enable masking to distinguish which code should be executed by each processing element. Both the bit-serial operations and the enable masking imposed on them are expressed in terms of if-then-else (ITE) operations implemented by a 1-of-2 multiplexor, greatly simplifying the hardware. However, it takes a lot of ITEs to implement even a small program fragment. Traditionally, bit-serial SIMD machines had been programmed by expanding a fixed bitserial pattern for each word-level operation. Instead, nanocontrollers can make use of the fact that ITEs are equivalent to the operations in Binary Decision Diagrams (BDDs), and can apply BDD analysis to optimize the ITEs. This thesis proposes and experimentally evaluates a number of techniques for minimizing the complexity of the BDDs, primarily by manipulating normalization ordering constraints. The best method found is a new approach in which a simple set of optimization transformations is followed by normalization using an ordering determined by a Genetic Algorithm (GA).

Verification of digital hardware designs is becoming an increasingly complex task as the designs are incorporating more functionality, becoming complex and growing larger in size. Today, verification remains a bottleneck in meeting time-to-market requirements and consumes more than 70% of the overall design-costs. Traditionally, verification has been done using simulation-based approaches, where a set of appropriate test-stimuli is used by the designer. As the designs become more complex, however, simulation-based techniques often fail to capture corner-case errors. Furthermore, unless exhaustively tested, these approaches do not guarantee the correctness of a system with respect to its specifications. As a consequence, formal methods for design verification have been sought after. In formal verification, the conformance of a design to a given set of specifications is proven mathematically, thereby leaving no room for unexplored search spaces. Despite the exponential time/memory complexities often involved within the formal approaches, they have shown promise in capturing subtle bugs, which were missed otherwise. In this dissertation, we focus on Boolean Satisfiability (SAT) based formal verification, which has gained tremendous importance in the recent past. Importantly, SAT-based approaches often alleviate the memory explosion problem, which had been a bottleneck of the traditional symbolic (Binary Decision Diagram based) approaches. In SAT-based techniques, the set of verification tasks are converted into a set of Boolean formulae, which are checked for satisfiability using a SAT solver. These problems are often NP-complete and are prone to an explosion in the required run-time. To overcome this, we propose novel strategies which utilize both structural and logical information of a sequential circuit. In particular, we devise techniques to extract non-trivial invariants of a design, strengthen properties such that they can be proven faster and interleave bounded reachability analysis with bounded model checking. We provide the necessary algorithms and implementation details in order to automate the proposed techniques. Experiments conducted on a variety of benchmark circuits show that orders of magnitude improvement in overall run-times can be achieved via our techniques compared to the existing state-of-the-art SAT-based approaches. / Ph. D.

The increasing complexity of VLSI designs, in recent years, poses serious challenges while ensuring the correctness of large designs for functionality and timing. In this dissertation, we target two related problems in Design Verification and Testing: Unbounded Model Checking and Path Delay Fault Testing, that commonly suffer from extremely large memory requirements. We propose efficient representations and intelligent learning techniques that reason on the problem structure and take advantage of the repeated search space, thereby alleviating the memory required and time taken to solve these problems. In this dissertation, we exploit Automatic Test Pattern Generation (ATPG) for Unbounded Model Checking (UMC). In order to perform unbounded model checking, we need the core image / preimage computation engines that perform forward / backward reachability analysis. First, we develop an ATPG engine, with search-space aware learning, that computes ``all solutions" for a given target objective and stores it as a decision diagram. We propose efficient decision selection heuristics and derive a suitable cut-set metric to quickly obtain a compact solution set. The solution set that is obtained, with the initial state set as the objective, represents the one-cycle preimage. In order to use the preimage state set as the objective in the subsequent iterations, we propose efficient techniques to convert a decision diagram into clauses/circuit. We propose a node-based conversion scheme that derives the functionality of each node in the decision diagram. The proposed scheme contains the size of the state set and helps to iteratively compute the preimage for many cycles until a fixed point / desired state is reached. Further, we gear the ATPG engine to directly compute the circuit cofactors, rather than individual solutions. The circuit cofactors contain a large number of solutions and hence capture a larger solution space. We also propose efficient learning techniques to prune the cofactor space and accelerate preimage computation. Then, we develop an exclusive image computation procedure that branches on the combinational inputs of the circuit and projects the values on the next state flip-flops as the image. We perform learning on the input solution space and incrementally store the image obtained as a decision diagram. We consistently show, with our experimental results, that our techniques are better than the existing techniques in terms of both performance and capacity. In the case of delay testing, we consider the test generation for path delay fault (PDF) model, which is the most accurate in characterizing the cumulative effect of distributed delays along each path in a circuit. The main bottle-neck in the ATPG for PDFs is the exponential number of paths in a circuit. In this work, we use the circuit information to analyze the common segments shared by different paths in a circuit. Based on the common sensitization constraints, we propose to identify the ``untestable core of segments" that cannot be sensitized together. We use these segments to identify the conflict search space for a huge number of untestable path delay faults apriori and prune them on-the-fly during test generation. Experimental results show that a huge number of untestable path delay faults are identified and it helps to accelerate test generation. / Ph. D.

As the number of transistors per unit chip area increases, the power dissipation of the chip becomes a bottleneck. New nano-technology materials have been proposed as viable alternatives to CMOS to tackle area and power issues. The power consumption can be minimized by the use of reversible logic instead of conventional combinational circuits. Theoretically, reversible circuits do not consume any power (or consume minimal power) when performing computations. This is achieved by avoiding information loss across the circuit. However, use of reversible circuits to implement digital logic requires development of new Electronic Design Automation techniques. Several approaches have been proposed and each method has its own pros and cons. This often results in multiple designs for the same function. Consequently, this demands research in efficient equivalence checking techniques for reversible circuits. This thesis explores the optimization and equivalence checking of reversible circuits. Most of the existing synthesis techniques work in two steps — generate an original, often sub-optimal, implementation for the circuit followed optimization of this design. This work proposes the use of Binary Decision Diagrams for optimization of reversible circuits. The proposed technique identifies repeated gate (trivial) as well as non-contiguous redundancies in a reversible circuit. Construction of a BDD for a sub-circuit (obtained by sliding a window of fixed size over the circuit) identifies redundant gates based upon the redundant variables in the BDD. This method was unsuccessful in identifying any additional redundancies in benchmark circuits; however, hidden non-contiguous redundancies were consistently identified for a family of randomly generated reversible circuits. As of now, several research groups focus upon efficient synthesis of reversible circuits. However, little work has been done in identification of redundant gates in existing designs and the proposed peephole optimization method stands among the few known techniques. This method fails to identify redundancies in a few cases indicating the complexity of the problem and the need for further research in this area. Even for simple logical functions, multiple circuit representations exist which exhibit a large variation in the total number of gates and circuit structure. It may be advantageous to have multiple implementations to provide flexibility in choice of implementation process but it is necessary to validate the functional equivalence of each such design. Equivalence checking for reversible circuits has been researched to some extent and a few pre-processing techniques have been proposed prior to this work. One such technique involves the use of Reversible Miter circuits followed by SAT-solvers to ascertain equivalence. The second half of this work focuses upon the application of the proposed reduction technique to Reversible Miter circuits as a pre-processing step to improve the efficiency of the subsequent SAT-based equivalence checking. / Master of Science

Quality assurance is becoming increasingly important to implement in expanding development projects. The components being built must be tested regularly to ensure the functionality of the whole product. Leeroy applies scrum as a development method along with manual GUI tests that only are performed when all components belonging to each sprint are completed. This leads to shortage in time for a tester to apply the assigned test scenarios. Testers are therefore subjected to stress in their work as testing requires high accuracy and speed in order to effectively ensure that the components end up in a production environment. The purpose of this study is to streamline current test processes by replacing manual GUI tests with automated GUI regression tests using BDD principles. Specification of the requirements was carried out using data collection methods that were chosen for this study. The specifications were used both to evaluate the construction as well as the results obtained. The results show that it is important that both the tester and the rest of the agile team cooperate during each sprint, as the components are developed incrementally and tested regularly. The results show even the importance of prioritizing the test scenarios; this is done to ensure the efficiency of the workflow by first choosing the most important components to test. The tested aspects in this study have also proven that both frameworks Cucumber and Puppeteer have the potential to contribute to a smooth implementation of BDD in an agile development team. This is due partly to the reasonable results from the performance tests that measured the speed of feedbacks as an efficiency test, partly to a high degree of both usability and reusability. This study is limited to few test scenarios due to shortage of time given for this course and therefore the performance results doesn’t express all kind of testing scenarios. / Kvalitetssäkring blir allt viktigare att genomföra i växande utvecklingsprojekt. Komponenterna som byggs måste testas regelmässigt för att garantera funktionaliteten av produkten som utvecklas. Leeroy tillämpar idag Scrum som utvecklingsmetod med manuella tester som genomförs när alla komponenter är färdigbyggda vid slutet av varje sprint. Detta leder till att testaren har kortare tid på sig för att utföra testscenarierna. Testaren utsätts därför för stress i sitt arbete då uppdraget kräver en hög noggrannhet med snabbhet för att effektivt försäkra att komponenterna hamnar i en produktionsmiljö. Syftet med undersökningen är att effektivisera nuvarande testprocesser genom att ersätta de manuella GUI-tester med automatiserade GUI- regressionstester som tillämpar BDD principer. Specificering av kraven genomfördes med hjälp av datainsamlingsmetoder som valdes till denna undersökning. Kravspecifikationerna användes dels för utvärdering av konstruktionen och dels för utvärdering av de erhållna resultaten. Resultaten visar att det är viktigt att både testaren och resten av det agila teamet samarbetar under varje sprint, då komponenterna utvecklas inkrementellt och testas regelmässigt. Resultaten visar vikten av att prioritera testerna som kommer att utvecklas för att säkra effektiviteten i arbetsflödet och även säkra att de viktigaste funktionerna testas först. Undersökningen har visat att både Cucumber och Puppeteer kan bidra till en smidig implementation av BDD i ett agilt utvecklingsteam. Detta beror dels på de rimliga resultaten från prestandatesterna som mäter effektiviteten, dels en hög användbarhetsgrad vad gäller både läsbarhet och skrivbarhet i syntaxen och dels en hög återanvändbarhetsgrad. Denna studie avgränsades till få antal testscenarier på grund av brist på tid i undersökningen och därför visar resultaten från prestandatesterna inte alla slags testscenarier.

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L'usage intensif de pesticides dans l'agriculture engendre une contamination sans précédent des eaux de surface et des nappes phréatiques. Les traitements classiques appliqués aux eaux usées contenant des produits organiques polluants sont basés sur la biodégradation ou sur des méthodes physiques de transfert de masse (décantation, filtration, adsorption des polluants sur du charbon actif) ou des procédés chimique tels que l'oxydation à l'ozone ou au chlore. Cependant, ces procédés demeurent inefficaces dans le cas de traitement des eaux contaminées par les polluants organiques persistants (POPs). Les procédés d'oxydation avancés sont mis en œuvre pour dégrader ou même minéraliser ces polluants. Ce travail a donc pour objectif de déterminer un protocole expérimental pour détruire efficacement les pesticides, produits chimiques largement utilisés dans l'agriculture au Maroc, tels que le monochloro-benzène, le 1,2-dichlorobenzène, l'acide 2,4,5-trichlorophénoxy-acétique, et l'imazalil en utilisant les procédés d'oxydation avancée électro-Fenton et oxydation anodique avec différentes anodes telles que BDD, Pt et DSA. Ainsi, nous avons trouvé que le taux de minéralisation par procédé électro-Fenton avec l'anode BDD était de 92%, 95%, 92% et 97%pour le monochloro-benzène, le 1,2-dichlorobenzène, l'acide 2,4,5-trichlorophénoxy-acétique, et l'imazalil, respectivement, après 4 h de traitement. Ces résultats confirment l'efficacité des procédés d'oxydation avancés électrochimiques dans le traitement des eaux polluées par des pesticides / The intensive use of pesticides in agriculture generates, nowadays, an unprecedented contamination of surface water and groundwater. Conventional treatments applied to waste water containing organic pollutants are based on biological treatments méthods or physical mass transfer methods (decantation, filtration, adsorption of the pollutants on activated carbon), chemical oxidation with ozone, chlorine, etc. However, these methods remain ineffective for the treatment of water polluted by persistent organic pollutants (POPs). Advanced oxidation processes are implemented to degrade and mineralize these pollutants. This PhD thesis work aims to establish an experimental protocol to degrade and mineralize pesticides, chemicals widely used in agriculture in Morocco, such as monochlorobenzene, 1,2-dichlorobenzene, 2,4,5-trichlorophenoxy-acetic acid , and imazalil using the electro-Fenton and anodic oxidation processes with DD Pt or DSA anodes. Thus, the rate of mineralization was 92%, 95%, 92% and 97% for the monochloro-benzene, the 1,2-dichlorobenzene, the 2,4,5-trichlorophenoxyacetic acid , and the imazalil, respectively, after 4 h treatment by electro-Fenton process. These results confirm the effectiveness of electrochemical advanced oxidation processes for treating water polluted by pesticides