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Yes / This article presents a unique technique to enhance isolation between transmit/receive radiating elements in densely packed array antenna by embedding a metamaterial (MTM) electromagnetic bandgap (EMBG) structure in the space between the radiating elements to suppress surface currents that would otherwise contribute towards mutual coupling between the array elements. The proposed MTM-EMBG structure is a cross-shaped microstrip transmission line on which are imprinted two outward facing E-shaped slits. Unlike other MTM structures there is no short-circuit grounding using via-holes. With this approach, the maximum measured mutual coupling achieved is -60 dB @ 9.18 GHz between the transmit patches (#1 & #2) and receive patches (#3 & #4) in a four-element array antenna. Across the antenna’s measured operating frequency range of 9.12 to 9.96 GHz, the minimum measured isolation between each element of the array is 34.2 dB @ 9.48 GHz, and there is no degradation in radiation patterns. The average measured isolation over this frequency range is 47 dB. The results presented confirm the proposed technique is suitable in applications such as synthetic aperture radar (SAR) and multiple-input multiple-output (MIMO) systems. / H2020-MSCA-ITN-2016 SECRET-722424 and the financial support from the UK Engineering and Physical Sciences Research Council (EPSRC) under grant EP/E0/22936/1

Yes / A decoupling metamaterial (MTM) configuration based on fractal electromagnetic-bandgap (EMBG) structure is shown to significantly enhance isolation between transmitting and receiving antenna elements in a closely-packed patch antenna array. The MTM-EMBG structure is cross-shaped assembly with fractal-shaped slots etched in each arm of the cross. The fractals are composed of four interconnected-`Y-shaped' slots that are separated with an inverted-`T-shaped' slot. The MTM-EMBG structure is placed between the individual patch antennas in a 2 × 2 antenna array. Measured results show the average inter-element isolation improvement in the frequency band of interest is 17, 37 and 17 dB between radiation elements #1 & #2, #1 & #3, and #1 & #4, respectively. With the proposed method there is no need for using metallic-via-holes. The proposed array covers the frequency range of 8-9.25 GHz for X-band applications, which corresponds to a fractional-bandwidth of 14.5%. With the proposed method the edge-to-edge gap between adjacent antenna elements can be reduced to 0.5λ 0 with no degradation in the antenna array's radiation gain pattern. Across the array's operating band, the measured gain varies between 4 and 7 dBi, and the radiation efficiency varies from 74.22 and 88.71%. The proposed method is applicable in the implementation of closely-packed patch antenna arrays used in SAR and MIMO systems. / Partially supported by innovation programme under grant agreement H2020-MSCA-ITN-2016 SECRET-722424 and the financial support from the UK Engineering and Physical Sciences Research Council (EPSRC) under grant EP/E022936/1.

Due to the concerns regarding increasing fuel cost and air pollution, plug-in electric vehicles (PEVs) are drawing more and more attention. PEVs have a rechargeable battery that can be restored to full charge by plugging to an external electrical source. However, the commercialization of the PEV is impeded by the demands of a lightweight, compact, yet efficient on-board charger system. Since the state-of-the-art Level 2 on-board charger products are largely silicon (Si)-based, they operate at less than 100 kHz switching frequency, resulting in a low power density at 3-12 W/in3, as well as an efficiency no more than 92 - 94% Advanced power semiconductor devices have consistently proven to be a major force in pushing the progressive development of power conversion technology. The emerging wide bandgap (WBG) material based power semiconductor devices are considered as game changing devices which can exceed the limit of Si and be used to pursue groundbreaking high frequency, high efficiency, and high power density power conversion. Using wide bandgap devices, a novel two-stage on-board charger system architecture is proposed at first. The first stage, employing an interleaved bridgeless totem-pole AC/DC in critical conduction mode (CRM) to realize zero voltage switching (ZVS), is operated at over 300 kHz. A bi-directional CLLC resonant converter operating at 500 kHz is chosen for the second stage. Instead of using the conventional fixed 400 V DC-link voltage, a variable DC-link voltage concept is proposed to improve the efficiency within the entire battery voltage range. 1.2 kV SiC devices are adopted for the AC/DC stage and the primary side of DC/DC stage while 650 V GaN devices are used for the secondary side of the DC/DC stage. In addition, a two-stage combined control strategy is adopted to eliminate the double line frequency ripple generated by the AC/DC stage. The much higher operating frequency of wide bandgap devices also provides us the opportunity to use PCB winding based magnetics due to the reduced voltage-second. Compared with conventional litz-wire based transformer. The manufacture process is greatly simplified and the parasitic is much easier to control. In addition, the resonant inductors are integrated into the PCB transformer so that the total number of magnetic components is reduced. A transformer loss model based on finite element analysis is built and used to optimize the transformer loss and volume to get the best performance under high frequency operation. Due to the larger inter-winding capacitor of PCB winding transformer, common mode noise becomes a severe issue. A symmetrical resonant converter structure as well as a symmetrical transformer structure is proposed. By utilizing the two transformer cells, the common mode current is cancelled within the transformers and the total system common mode noise can be suppressed. In order to charge the battery faster, the single-phase on-board charger concept is extended to a higher power level. By using the three-phase interleaved CLLC resonant converter, the charging power is pushed to 12.5 kW. In addition, the integrated PCB winding transformer in single phase is also extended to the three phase. Due to the interleaving between each phase, further integration is achieved and the transformer size is further reduced. / PHD / Plug-in electric vehicles (PEVs) are drawing more and more attention due to the advantages of energy saving, low CO₂ emission and cost effective in the long run. The power source of PEVs is a high voltage DC rechargeable battery that can be restored to full charge by plugging to an external electrical source, during which the battery charger plays an essential role by converting the grid AC voltage to the required battery DC voltage. Silicon based power semiconductor devices have been dominating the market over the past several decades and achieved numerous outstanding performances. As they almost reach their theatrical limit, the progress to purse the high-efficiency, high-density and high-reliability power conversion also slows down. On this avenue, the emerging wide bandgap (WBG) material based power semiconductor devices are envisioned as the game changer: they can help increase the switching frequency by a factor of ten compared with their silicon counterparts while keeping the same efficiency, resulting in a small size, lightweight yet high efficiency power converter. With WBG devices, magnetics benefit the most from the high switching frequency. Higher switching speed means less energy to store during one switching cycle. Consequently, the size of the magnetic component can be greatly reduced. In addition, the reduced number of turns provides the opportunity to adopt print circuit board as windings. Compared with the conventional litz-wire based magnetics, planar magnetics not only can effectively reduce the converter size, but also offer improved reliability through automated manufacturing process with repeatable parasitics. This dissertation is dedicated to address the key high-frequency oriented challenges of adopting WBG devices (including both SiC and GaN) and integrated PCB winding magnetics in the battery charger applications. First, a novel two-stage on-board charger system architecture is proposed. The first stage employs an interleaved bridgeless totem-pole AC/DC with zero voltage switching, and a bi-directional CLLC resonant converter is chosen for the second stage. Second, a PCB winding based transformer with integrated resonant inductors is designed, so that the total number of magnetic components is reduced and the manufacturability is greatly improved. A transformer loss model based on finite element analysis is built and employed to optimize the transformer loss and volume to get the best performance under high frequency operations. In addition, a symmetrical resonant converter structure as well as a symmetrical transformer structure is proposed to solve the common noise issue brought by the large parasitic capacitance in PCB winding magnetics. By utilizing the two transformer cells, the common mode current is cancelled within the transformers, and the total system common mode noise can be suppressed. Finally, the single-phase on-board charger concept is extended to a higher power level to charge the battery faster. By utilizing the three-phase interleaved CLLC resonant converter as DC/DC stage, the charging power is pushed to 12.5 kW. In addition, the integrated PCB winding magnetic in single phase is also extended to the three phase. Due to the interleaving between the three phase, further integration is achieved and the transformer size is further reduced.

Gallium Oxide (Ga2O3) is an ultra-wide bandgap semiconductor with a bandgap of 4.5–4.9 eV, which is higher than the bandgap of Silicon (Si), Silicon Carbide (SiC), and Gallium Nitride (GaN). A benefit of this wide-bandgap is the high critical electric field of Ga2O3, which is estimated to be from 5 MV/cm to 9 MV/cm. This allows a higher Baliga’s figure of merit (BFOM), i.e., unipolar Ga2O3 devices potentially possess a smaller specific on-resistance (Ron,sp) as compared to the Si, SiC, and GaN devices with the same breakdown voltage (BV). This prospect makes Ga2O3 devices promising candidates for next-generation power electronics. This thesis explores the design, fabrication, and packaging of vertical Ga2O3 Schottky barrier diodes (SBDs). The power SBD allows for a small forward voltage and a fast switching speed; thus, it is ubiquitously utilized in power electronics systems. It is also a building block for many advanced power transistors. Hence, the study of Ga2O3 SBDs is expected to pave the way for developing a series of Ga2O3 power devices. In this work, a vertical β-Ga2O3 SBD with a novel edge termination, which is the small-angle beveled field plate (SABFP), is fabricated on thinned Ga2O3 substrates. This SABFP structure decreases the peak electric field (Epeak) at the triple point when the Ga2O3 SBD is reverse biased, resulting in a BV of 1.1 kV and an Epeak of 3.5 MV/cm. This device demonstrates a BFOM of 0.6 GW/cm2, which is among the highest in β-Ga2O3 power devices and is comparable to the state-of-the-art vertical GaN SBDs. The high-temperature characteristics of Ga2O3 SBDs with a 45o beveled angle sidewall edge termination are studied at temperatures up to 600 K. As compared to the state-of-the-art SiC and GaN SBDs with a similar blocking voltage, the vertical Ga2O3 SBDs are capable of operating at higher temperatures and show a smaller leakage current increase with temperature. The leakage current mechanisms were also revealed at various temperatures and reverse biases. A new fabrication method of a dielectric field plate and Ga2O3 mesa of a medium angle (10o~30o) is achieved by controlling the adhesion between the photoresist (PR) and the dielectric surface. As compared to the small-angle termination, this medium-angle edge termination can allow a superior yield and uniformity in device fabrication, at the same time maintaining the major functionalities of beveled edge termination. Good surface morphology of the field plates and Ga2O3 mesa of the medium angle 10o~30o sidewall angle is verified by atomic force microscopy. Finally, large-area Ga2O3 SBDs are fabricated and packaged using silver sintering as the die attach. The sintered silver joint has higher thermal conductivity and better reliability as compared to the solder joint. The metal finish on the anode and cathode has been optimized for silver sintering. Large-area, packaged Ga2O3 SBDs with an anode size of 3×3 mm2 are prototyped. They show a forward current of over 5 A, a current on/off ratio of ~109, and a BV of 190 V. To the best of the author’s knowledge, this is the first experimental demonstration of a large-area, packaged Ga2O3 power device. / M.S. / Power electronics is the processing of electric energy using solid-state electronics. It is ubiquitously used in consumer electronics, data centers, electric vehicles, electricity grids, and renewable energy systems. Advanced power device technologies are paramount to improving the performance of power electronic systems. Power device design centers on the concurrent realization of low on-resistance (RON), high breakdown voltage (BV), and small turn-on/turn-off power losses. The performance of power devices hinges on semiconductor material properties. Over the last several years, power devices based on wide-bandgap semiconductors like Silicon Carbide (SiC) and Gallium Nitride (GaN) have enabled tremendous performance advancements in power electronic systems. Gallium Oxide (Ga2O3) is an ultra-wide bandgap semiconductor with a bandgap of 4.5–4.9 eV, which is higher than the bandgap of Silicon (Si), SiC, and GaN. As a benefit of this wide bandgap, the theoretical performance of Ga2O3 devices is superior to the Si, SiC, and GaN counterparts. Hence, Ga2O3 devices are regarded as promising candidates for next-generation power electronics. This thesis explores the design, fabrication, and packaging of vertical Ga2O3 Schottky barrier diodes (SBDs). The power SBD allows a small forward voltage and a fast switching speed; thus, it is extensively utilized in power electronics systems. It is also a building block for many advanced power transistors. First, a vertical β-Ga2O3 SBD with a novel edge termination is fabricated. This edge termination structure reduces the peak electric field (Epeak) in the device and enhances the BV. The fabricated device shows one of the highest figure of merits in β-Ga2O3 power devices. Next, the high-temperature characteristics of the fabricated Ga2O3 SBDs are studied at temperatures up to 600 K. The leakage current mechanisms were also revealed at various temperatures and reverse biases. Finally, large-area Ga2O3 SBDs are fabricated and packaged using silver sintering as the die attach. The sintered silver joint has higher thermal conductivity and better reliability as compared to the conventional solder joint. The packaged Ga2O3 SBDs show a forward current of over 5 A and a BV of 190 V. To the best of the author’s knowledge, this is the first experimental demonstration of a large-area, packaged Ga2O3 power device.

Surge-energy robustness is essential for power devices in many applications such as automotive powertrains and electricity grids. While Si and SiC MOSFETs can dissipate surge energy via avalanche, the GaN high-electron-mobility transistor (HEMT) has no avalanche capability and withstands surge energy by its overvoltage capability. However, a comprehensive study into the surge-energy robustness of the cascode GaN HEMT, a composite device made of a GaN HEMT and a Si metal-oxide-semiconductor field-effect-transistor (MOSFET), is still lacking. This work fills this gap by investigating the failure and degradation of 650-V-rated cascode GaN HEMTs in single-event and repetitive unclamped inductive switching (UIS) tests. The cascode was found to withstand surge energy by the overvoltage capability of the GaN HEMT, accompanied by an avalanche in the Si MOSFET. In single-event UIS tests, the cascode failed in the GaN HEMT at a peak overvoltage of 1.4~1.7 kV, which is statistically lower than the device's static breakdown voltage (1.8~2.2 kV). In repetitive UIS tests, the device failure boundary was found to be frequency-dependent. At 100 kHz, the failure boundary (~1.3 kV) was even lower than the single-event UIS boundary. After 1 million cycles of 1.25-kV UIS stresses, devices showed significant but recoverable parametric shifts. Physics-based device simulation and modeling were then performed to understand the circuit test results. The electron trapping in the buffer layer of the GaN HEMT can explain all the above failure and degradation behaviors in the GaN HEMT and the resulted change in its dynamic breakdown voltage. Moreover, the GaN buffer trapping is believed to be assisted by the Si MOSFET avalanche. An analytical model was also developed to extract the charges and losses produced in the Si avalanche in a UIS cycle. These results provide new insights into the surge-energy and overvoltage robustness of cascode GaN HEMTs. / M.S. / Power conversion technologies are now inseparable in industrial and commercial applications with widespread solar panels, laptops, data centers, and electric vehicles. Power devices are the critical components of power conversion systems. Since the introduction of Si power metal-oxide-semiconductor field-effect-transistor (MOSFET) in the mid-1970s, it has become the go-to device that enables efficient and reliable power conversion. After decades of practice on Si MOSFET, the device performance has reached the theoretical limit of the Si material. The recent introduction of wide-bandgap (WBG) power transistors, represented by silicon carbide (SiC) and gallium nitride (GaN) devices with superior figures of merits, opens the door for faster and more efficient power systems. To exploit the benefits of WBG devices, researchers need to evaluate the reliability and robustness of these devices comprehensively. The work presented here provides a study on the robustness of one mainstream GaN power transistor – the cascode GaN high-electron-mobility transistor (HEMT). This robustness test replicates the surge events in power electronics systems and exams their impact on power devices. Over the years, people have thoroughly investigated the surge-energy robustness of Si MOSFETs and concluded that Si MOSFETs are very robust against these surge events thanks to the avalanche mechanism. However, GaN HEMTs lack p-n junction structures between the two major electrodes, leading to the lack of avalanche ability. Instead, GaN HEMTs rely on the overvoltage capability to sustain the surge energy. For the first time, this work evaluates the surge-energy and overvoltage ruggedness of cascode GaN HEMTs, a major player in the GaN power device market. By analyzing the device failure mechanism and degradation behaviors, this research work provides insight into the weakness of these devices for both device designers and application engineers.

Rapidly-increasing medium-voltage power electronics applications in emerging industry systems, including electrical ships, more electric aircraft, and microgrids, have emphasized the critical need for highly energy-efficient, reliable, and fast switching devices. As a result, Wide-Bandgap (WBG) devices have gained considerable interest over conventional silicon-based switches in recent years. For example, emerging WBG devices have unlocked new dimensions for modern motor drive systems with increased efficiency, switching frequency, and superior power density. Commercially-developed WBG devices such as Silicon Carbide (SiC) and Gallium Nitride (GaN) offer promising opportunities to meet those pressing requirements. However, the fast switching operation of WBG devices may cause substantially increased EMI emissions in medium-voltage applications, which can decrease the overall system’s performance or merits of power converters. This will be particularly an issue in a system where electric ground is unavailable, such as an electric ship, as a large Electro-Magnetic Interference current will be circulating within the system. The EMI in the WBG switch module will be emitted up to 500 MHz. This is the near radio-frequency (RF) band whose impact had not been clearly understood or properly analyzed in the power electronics field until recently. With new and critical challenges in recent years, to reliably adopt WBG devices in emerging power systems, there has been significant effort to improve electromagnetic compatibility (EMC) with new EMI mitigation techniques that comply with existing standards, including International Special Committee on Radio Interference (CISPR), Federal Communications Commission (FCC), Department of Defense (DOD), International Electro-Technical Commission (IEC), etc. This research investigates the common-mode EMI in networked power electronics-enabled power systems. Common-mode EMI phase information is a vital degree of freedom in EMI study that has not been considered in the state of the art. The EMI phase information reduces EMI without implementing any active or passive filter circuit. An effective and less complex method is introduced to reduce EMI in power electronics network. The work includes developing hybrid filter with passive and virtual filter. Including virtual filter reduces the passive common mode choke weight and volume significantly. Finally, a simplified switching node capacitance characterization technique for packaged WBG SiC has been introduced.

Thin film coatings of ZnO, TiO2, CeOX and BiOX have been deposited on soda lime silica glass through spray pyrolysis. The effects on the optical properties of the coated glass, as well as the possible impacts on the life expectancy and energy efficiency of PV-modules have been studied. ZnO and TiO2 coatings both reduced the transmission of UV radiation of wavelengths destructive to PV-modules. Therefore, both have the potential to increase the life expectancy of PV-modules if used on cover glass. The ZnO thin film also showed an increase in photoluminescence at 377 nm when radiated with UV radiation of 325 nm while TiO2 reduced the photoluminescence. ZnO coatings on the cover glass have the potential to increase the efficiency of PV-modules in addition to UV protection. No CeOX or BiOX films were found to be deposited with the method used. The ZnO and TiO2 coated samples showed a decrease in transmission of light, due to increased reflection and possibly scattering. This needs to be addressed if these kinds of coatings are going to be beneficial for Si PV-modules.

Les capteurs d’images CMOS sont de plus en plus utilisés dans le domaine industriel : la surveillance, la défense, le médical, etc. Dans ces domaines, les capteurs d?images CMOS sont exposés potentiellement à de grandes variations de température. Les capteurs d?images CMOS, comme tous les circuits analogiques, sont très sensibles aux variations de température, ce qui limite leurs applications. Jusquà présent, aucune solution intégrée pour contrer ce problème n’a été proposée. Afin de remédier à ce défaut, nous étudions, dans cette thèse, les effets de la température sur les deux types d?imageurs les plus connus. Plusieurs structures de compensation sont proposées. Elles reprennent globalement les trois méthodes existantes et jamais appliquées aux capteurs d’images. La première méthode utilise une entrée au niveau du pixel qui sera modulée en fonction de l’évolution de la température. La deuxième méthode utilise la technique ZTC (Zero Temperature Coefficient). La troisième méthode est inspirée de la méthode de la tension de référence bandgap. Dans tous les cas, nous réduisons de manière très intéressante l’effet de la température et nous obtenons une bonne stabilité en température de -30 à 125°C. Toutes les solutions proposées préservent le fonctionnement initial de l’imageur. Elles n’impactent également pas ou peu la surface du pixel / CMOS image sensors find widespread use in various industrial applications including military, surveillance, medical, etc. In these applications, CMOS image sensors are often exposed to large temperature variations. As analog circuits, these CMOS image sensors are very sensitive to temperature variations, which limit their applications. Until now, no integrated solution for this problem has been proposed. To solve this problem, we study, in this thesis, the temperature effects on the two most known types of CMOS image sensors. Several compensation structures are proposed. They generally return to the three existing methods and never applied to image sensors. The first method uses an entrance at the pixel level to be adjusted according to changes in temperature. The second method uses the ZTC (Zero Temperature Coefficient) technique. The third method is based on the method of the bandgap voltage reference. In all cases, we reduce a very interesting way the temperature effect and we get a good temperature stability of the sensor from -30 to 125°C. All the solutions preserve the initial operation of the imager. They also affect a little or not the surface of the pixel.

The ability to fabricate semiconductor wafers with spatially selected regions of different bandgap material is required for the fabrication of monolithic photonic integrated circuits (PIC's). Although this subject has been studied for three decades and many semiconductor engineering approaches have been proposed, the problem of achieving reproducible results has constantly challenged scientists and engineers. This concerns not only the techniques relaying on multiple sequential epitaxial growth and selective area epitaxy, but also the conventional quantum well intermixing (QWI) technique that has been investigated as a post-growth approach for bandgap engineering. Among different QWI techniques, those based on the use of different lasers appear to be attractive in the context of high-precision and the potential for cost-effective bandgap engineering. For instance, a tightly focused beam of the infrared (IR) laser could be used for the annealing of small regions of a semiconductor wafer comprising different quantum well (QW) or quantum dot (QD) microstructures. The precision of such an approach in delivering wafers with well defined regions of different bandgap material will depend on the ability to control the laser-induced temperature, dynamics of the heating-cooling process and the ability to take advantage of the bandgap engineering diagnostics. In the frame of this thesis, I have investigated IR laser-induced QWI processes in QW wafers comprising GaAs/A1GaAs and InP/InGaAsP microstructures and in InAs QD microstructures grown on InP substrates. For that purpose, I have designed and set up a 2-laser system for selective area rapid thermal annealing (Laser-RTA) of semiconductor wafers. The advantage of such an approach is that it allows carrying out annealing with heating-cooling rates unattainable with conventional RTA techniques, while a tightly focused beam of one of the IR lasers is used for `spot annealing'. These features have enabled me to introduce a new method for iterative bandgap engineering at selected areas (IBESA) of semiconductor wafers. The method proves the ability to deliver both GaAs and InP based QW/QD wafers with regions of different bandgap energy controlled to better than « 1nm of the spectral emission wavelength. The IBESA technique could be used for tuning the optical characteristics of particular regions of a QW wafer prepared for the fabrication of a PIC. Also, this approach has the potential for tuning the emission wavelength of individual QDs in wafers designed, e.g., for the fabrication of single photon emitters. In the 1st Chapter of the thesis, I provide a short review of the literature on QWI techniques and I introduce the Laser - RTA method. The 2nd Chapter is devoted to the description of the fundamental processes related to the absorption of laser light in semiconductors. I also discuss the results of the finite element method applied for modeling and semi-quantitative description of the Laser - RTA process. Details of the experimental setup and developed procedures are provided in the 3rd Chapter. The results concerning direct bandgap engineering and iterative bandgap engineering are discussed in the 4th and 5th Chapters, respectively.