A bridge approach is usually built to provide a smooth and safe transition for vehicles from the roadway pavement to the bridge structure. However, differential settlement between the roadway pavement resting on embankment fill and the bridge abutment built on more rigid foundation often creates a bump in the roadway. Previous work examined this issue at a microscopic level and presented new methods for eliminating or minimizing the effects at specific locations. This research studies the problem at a macroscopic level by determining methods to predict settlement severity to assist designers in developing remediation plans during project development to minimize the lifecycle costs of bridge bump repairs. The study is based on historic data from a wide range of Kentucky roads and bridges relating to bridge approach inspection and maintenance history. A macro method considering a combination of maintenance times, maintenance measures, and observed settlement was used to classify the differential settlement scale as minimal, moderate, and severe, corresponding to the approach performance status good, fair, and poor. A series of project characteristics influencing differential settlement were identified and used as parameters to develop a model to accurately predict settlement severity during preliminary design. Eighty-seven bridges with different settlement severities were collected as the first sample by conducting a survey of local bridge engineers in 12 transportation districts. Sample two was created by randomly selecting 600 bridges in the inspection history of bridges in Kentucky. Ordinal and/or multinomial logistic regression analyses were implemented to identify the relationships between the levels of differential settlement and the input variables. Two predictive models were developed. Prediction of bridge approach settlement can play an important role in selecting proper design, construction, and maintenance techniques and measures. The users can select one or two models to predict the approach settlement level for a new bridge or an existing bridge with different purposes. The significance of this study lies in its identification of parameters that had the most influence on the settlement severity at bridge ends, and how those parameters interacted in developing of a prediction model. The important parameters include geographic regions, approach age, average daily traffic (ADT), the use of approach slabs, and the foundation soil depth. The regression results indicate that the use of approach slabs can improve the performance of approaches on mitigating the problem caused by differential settlement. In addition, current practices regarding differential settlement prediction and mitigation were summarized by surveying the bridge engineers in 5 transportation districts.

As técnicas para síntese de textura em Computação Gráfica constituem um grupo bem específico cujo objetivo principal é a inclusão, na imagem, de alguma informação visual que aumente a percepção de realismo. São identificadas técnicas para síntese de textura com características favoráveis a implementação num ambiente limitado cujo aspecto central é a placa de vídeo VGA, a saber: mapeamento de textura, "bump mapping" e textura sólida. Um sistema para visualização de objetos simples com aplicação das técnicas selecionadas é descrito e implementado. Várias imagens são sintetizadas e os resultados analisados considerando-se o nível de realismo atingido. É explorado o uso de padrões para incremento da resolução visual das imagens em conjunto com a técnica de mapeamento de textura. Apresenta-se uma série de definições para textura das áreas de Computação Gráfica, Psicologia e Processamento de Imagens. Estas definições se integram e possibilitam a formação de um conceito genérico sobre o assunto. Os modelos e técnicas para descrição e síntese de texturas são apresentados, identificando-se as tendências nesta área. / The Computer Graphics texture synthesis techniques are a well defined group which main goal is to add visual information to the image. This visual information will increase the realism. Texture synthesis techniques for implementation in a limited environment are identified, namely texture mapping, bump mapping and solid texture. The main aspect of the environment is the VGA video card. A system is described and implemented to visualize simple objects where the selected texture synthesis techniques were applied . Some images are synthesized and the results are analysed. It is explored the use of patterns to increase images visual resolution in conection with texture mapping technique. It is presented a set of texture definitions from Computer Graphics, Psychology and Image Processing studies. These definitions are integrated and make possible to form a generic concept about the subject. Models and techniques for texture description and synthesis are presented. This survey identified trends in this area.

Ever growing demands for portability and functionality have always governed the electronic technology innovations. IC downscaling with Moore s law and system miniaturization with System-On-Package (SOP) paradigm has resulted and will continue to result in ultraminiaturized systems with unprecedented functionality at reduced cost. The trend towards 3D silicon system integration is expected to downscale IC I/O pad pitches from 40µm to 1- 5 µm in future. Device- to- system board interconnections are typically accomplished today with either wire bonding or solders. Both of these are incremental and run into either electrical or mechanical barriers as they are extended to higher density of interconnections. Alternate interconnection approaches such as compliant interconnects typically require lengthy connections and are therefore limited in terms of electrical properties, although expected to meet the mechanical requirements. As supply currents will increase upto 220 A by 2012, the current density will exceed the maximum allowable current density of solders. The intrinsic delay and electromigration in solders are other daunting issues that become critical at nanometer size technology nodes. In addition, formation of intermetallics is also a bottleneck that poses significant mechanical issues. Recently, many research groups have investigated various techniques for copper-copper direct bonding. Typically, bonding is carried out at 400oC for 30 min followed by annealing for 30 min. High thermal budget in such process makes it less attractive for integrated systems because of the associated process incompatibilities. In the present study, copper-copper bonding at ultra fine-pitch using advanced nano-conductive and non-conductive adhesives is evaluated. The proposed copper-copper based interconnects using advanced conductive and non-conductive adhesives will be a new fundamental and comprehensive paradigm to solve all the four barriers: 1) I/O pitch 2) Electrical performance 3) Reliability and 4) Cost. This thesis investigates the mechanical integrity and reliability of copper-copper bonding using advanced adhesives through test vehicle fabrication and reliability testing. Test vehicles were fabricated using low cost electro-deposition techniques and assembled onto glass carrier. Experimental results show that proposed copper-copper bonding using advanced adhesives could potentially meet all the system performance requirements for the emerging micro/nano-systems.

Out-of-plane displacement (warpage) is one of the major thermomechanical reliability concerns for board-level electronic packaging. Printed wiring board (PWB) and component warpage results from CTE mismatch among the materials that make up the PWB assembly (PWBA). Warpage occurring during surface-mount assembly reflow processes and normal operations may cause serious reliability problems. In this research, a convective reflow and projection moire warpage measurement system was developed. The system is the first real-time, non-contact, and full-field measurement system capable of measuring PWB/PWBA/chip package warpage with the projection moire technique during different thermal reflow processes. In order to accurately simulate the reflow process and to achieve the ideal heating rate, a convective heating system was designed and integrated with the projection moire system. An advanced feedback controller was implemented to obtain the optimum heating responses. The developed system has the advantages of simulating different types of reflow processes, and reducing the temperature gradients through the PWBA thickness to ensure that the projection moire system can provide more accurate measurements. Automatic package detection and segmentation algorithms were developed for the projection moire system. The algorithms are used for automatic segmentation of the PWB and assembled packages so that the warpage of the PWB and chip packages can be determined individually. The effect of initial PWB warpage on the fatigue reliability of solder bumps on board assemblies was investigated using finite element modeling (FEM) and the projection moire system. The 3-D models of PWBAs with varying board warpage were used to estimate the solder bump fatigue life for different chip packages mounted on PWBs. The simulation results were validated and correlated with the experimental results obtained using the projection moire system and accelerated thermal cycling tests. Design of experiments and an advanced prediction model were generated to predict solder bump fatigue life based on the initial PWB warpage, package dimensions and locations, and solder bump materials. This study led to a better understanding of the correlation between PWB warpage and solder bump thermomechanical reliability on board assemblies.

As técnicas para síntese de textura em Computação Gráfica constituem um grupo bem específico cujo objetivo principal é a inclusão, na imagem, de alguma informação visual que aumente a percepção de realismo. São identificadas técnicas para síntese de textura com características favoráveis a implementação num ambiente limitado cujo aspecto central é a placa de vídeo VGA, a saber: mapeamento de textura, "bump mapping" e textura sólida. Um sistema para visualização de objetos simples com aplicação das técnicas selecionadas é descrito e implementado. Várias imagens são sintetizadas e os resultados analisados considerando-se o nível de realismo atingido. É explorado o uso de padrões para incremento da resolução visual das imagens em conjunto com a técnica de mapeamento de textura. Apresenta-se uma série de definições para textura das áreas de Computação Gráfica, Psicologia e Processamento de Imagens. Estas definições se integram e possibilitam a formação de um conceito genérico sobre o assunto. Os modelos e técnicas para descrição e síntese de texturas são apresentados, identificando-se as tendências nesta área. / The Computer Graphics texture synthesis techniques are a well defined group which main goal is to add visual information to the image. This visual information will increase the realism. Texture synthesis techniques for implementation in a limited environment are identified, namely texture mapping, bump mapping and solid texture. The main aspect of the environment is the VGA video card. A system is described and implemented to visualize simple objects where the selected texture synthesis techniques were applied . Some images are synthesized and the results are analysed. It is explored the use of patterns to increase images visual resolution in conection with texture mapping technique. It is presented a set of texture definitions from Computer Graphics, Psychology and Image Processing studies. These definitions are integrated and make possible to form a generic concept about the subject. Models and techniques for texture description and synthesis are presented. This survey identified trends in this area.

As técnicas para síntese de textura em Computação Gráfica constituem um grupo bem específico cujo objetivo principal é a inclusão, na imagem, de alguma informação visual que aumente a percepção de realismo. São identificadas técnicas para síntese de textura com características favoráveis a implementação num ambiente limitado cujo aspecto central é a placa de vídeo VGA, a saber: mapeamento de textura, "bump mapping" e textura sólida. Um sistema para visualização de objetos simples com aplicação das técnicas selecionadas é descrito e implementado. Várias imagens são sintetizadas e os resultados analisados considerando-se o nível de realismo atingido. É explorado o uso de padrões para incremento da resolução visual das imagens em conjunto com a técnica de mapeamento de textura. Apresenta-se uma série de definições para textura das áreas de Computação Gráfica, Psicologia e Processamento de Imagens. Estas definições se integram e possibilitam a formação de um conceito genérico sobre o assunto. Os modelos e técnicas para descrição e síntese de texturas são apresentados, identificando-se as tendências nesta área. / The Computer Graphics texture synthesis techniques are a well defined group which main goal is to add visual information to the image. This visual information will increase the realism. Texture synthesis techniques for implementation in a limited environment are identified, namely texture mapping, bump mapping and solid texture. The main aspect of the environment is the VGA video card. A system is described and implemented to visualize simple objects where the selected texture synthesis techniques were applied . Some images are synthesized and the results are analysed. It is explored the use of patterns to increase images visual resolution in conection with texture mapping technique. It is presented a set of texture definitions from Computer Graphics, Psychology and Image Processing studies. These definitions are integrated and make possible to form a generic concept about the subject. Models and techniques for texture description and synthesis are presented. This survey identified trends in this area.

The different mapping techniques that are used increases the details on surfaces without increasing the number of polygons. Image Based Sculpting tools in the program Modo and Z-Brush is used to create folds and wrinkles from photographs of actual fabrics instead of trying to create these shapes by modeling them. This method makes it easier to achieve photorealistic renderings and produce as realistic fabric dynamics as possible when they are applied on objects.

Surface mean pressures, oil flow visualization, and 3-velocity-component laser-Doppler velocimeter measurements are presented for a turbulent boundary layer of momentum thickness Reynolds number, 7300 and thickness delta over two circular based axisymmetric bumps of height H = delta and 2delta and one rectangular based symmetric bump of H = 2delta. LDV data were obtained at one plane x/H ¥ 3.26 for each case. Complex vortical separations occur on the leeside and merge into large stream-wise mean vortices downstream for the 2 axisymmetric cases. The near-wall flow (y+ < 90) is dominated by the wall. For the axisymmetric cases, the vortices in the outer region produce large turbulence levels near the centerline and appear to have low frequency motions that contribute to turbulent diffusion. For the case with a narrower span-wise shape, there are sharper separation lines and lower turbulence intensities in the vortical downstream flow. Fine-spatial-resolution LDV measurements were also obtained on half of the leeside of an axisymmetric bump (H/delta = 2) in a turbulent boundary layer. Three-dimensional (3-D) separations occur on the leeside with one saddle separation on the centerline that is connected by a separation line to one focus separation on each side of the centerline. Downstream of the saddle point the mean backflow converges to the focal separation points in a thin region confined within about 0.15delta from the local bump surface. The mean backflow zone is supplied by the intermittent large eddies as well as by the near surface flow from the side of the bump. The separated flow has a higher turbulent kinetic energy and shows bimodal histograms in local and U and W, which appear to be due to highly unsteady turbulent motions. By the mode-averaged analysis of bimodal histograms, highly unsteady flow structures are estimated and unsteady 3-D separations seem to be occurring over a wide region on the bump leeside. The process of these separations has very complex dynamics having a large intermittent attached and detached flow region which is varying in time. These bimodal features with highly correlated local u and w fluctuating motions are the major source of large Reynolds stresses local u2, w2 and -uw. Because of the variation of the mean flow angle in the separation zones, the turbulent flow from different directions is non-correlated, resulting in lower shearing stresses. Farther from the wall, large stream-wise vortices form from flow around the sides of the bump. / Ph. D.

Understanding the brain and its functions is achallenging undertaking. To facilitate this work, brain-inspiredtechnology may be used to examine cognitive phenomena to acertain extent, by replacing real biological brains with simulations.The aim of this project was to provide insights intohow different kinds of plasticity modulation affected long-termmemory recall through the use of a computational model. Aneural network was constructed based on the existing BayesianConfidence Propagation Neural Network (BCPNN) model andtrained with binary patterns representing memories acquiredover a lifetime. By varying network plasticity parameters forselected patterns and performing recall of “aging” memories,greater effects were observed in recall statistics for modulationearly in the lifetime in comparison with modulation of later ages.From the experiments conducted in this study it was possible toconclude that selective modulation of learning affected the longtermrecall of all memories in the simulation. / Att förstå hjärnan och alla dess funktionerär en stor utmaning. För att underlätta detta arbete kanhjärninspirerad teknologi i viss utsträckning användas för attstudera kognitiva fenomen, genom att ersätta biologiska hjärnormed simuleringar. Syftet med denna studie var att ge en insikt ihur olika typer av modulering av synaptisk plasticitet påverkadeett simulerat biologiskt långtidsminne genom användning av endatoriserad modell. Ett neuralt nätverk implementerat med eninlärningsregel av typen Bayesian Confidence Propagation NeuralNetwork (BCPNN) konstruerades och användes för att träna och återkalla binära mönster, representerande minnen förvärvadeunder en livstid. Nätverkets synaptiska plasticitet varierades underträning av utvalda mönster och därefter utfördes återkallningav “åldrade” minnen. Testerna påvisade effekt på nätverketsförmåga att korrekt återkalla lagrade minnen. Det visade sigäven att modulering utförd på tidiga simulerade åldrar jämförtmed modulering av senare åldrar under livstiden hade störrepåverkan på långtidsminnet. Från resultaten var det möjligtatt konstatera att selektiv plasticitetsmodulering under inlärningpåverkade nätverkets förmåga att korrekt återkalla samtligabinära mönster i simuleringen. / Kandidatexjobb i elektroteknik 2021, KTH, Stockholm

This dissertation constitutes two major sections. In the first major section, a kinetic analysis was established to investigate the electromigration (EM), enhanced intermetallic compound (IMC) growth and void formation for Sn-based Pb-free solder joints to Cu under bump metallization (UBM). The model takes into account the interfacial intermetallic reaction, Cu-Sn interdiffusion, and current stressing. A new approach was developed to derive atomic diffusivities and effective charge numbers based on Simulated Annealing (SA) in conjunction with the kinetic model. The finite difference (FD) kinetic model based on this approach accurately predicted the intermetallic compound growth when compared to empirical observation. The ultimate electromigration failure of the solder joints was caused by extensive void formation at the intermetallic interface. The void formation mechanism was analyzed by modeling the vacancy transport under electromigration. The effects of current density and Cu diffusivity in Sn solder were also investigated with the kinetic model. The second major section describes the integration of Step and Flash Imprint Lithography (S-FIL®) into an industry standard Cu/low-k dual damascene process. The yield on a Back End Of the Line (BEOL) test vehicle that contains standard test structures such as via chains with 120 nm vias was established by electrical tests. S-FIL shows promise as a cost effective solution to patterning sub 45 nm features and is capable of simultaneously patterning two levels of interconnect structures, which provides a low cost BEOL process. The critical processing step in the integration is the reactive ion etching (RIE) process that transfers the multilevel patterns to the inter-level dielectrics (ILD). An in-situ, multistep etch process was developed that gives excellent pattern structures in two industry standard Chemical Vapor Deposited (CVD) low-k dielectrics. The etch process showed excellent pattern fidelity and a wide process window. Electrical testing was conducted on the test vehicle to show that this process renders high yield and consistent via resistance. Discussions of the failure behaviors that are characteristic to the use of S-FIL are provided. / text