Abstract Since 1990, the scientific and technique are progressing fast, especially for information technique field is advancing day by day and year by year. It makes the business environment changing quickly. The advance of 3C technique, economic integration for international and blocking, global market and competition, it makes so much challenge and crisis. In highly competitive environment, ¡§speed¡¨ is based requirement. Enterprise should go through ¡§process innovation ¡§ method to progress business competitive ability and to control the market. After Internet Network is invented and developed, the management concept of ERP (enterprise resource planned), SCM ( supply chain management ) and CRM( custom relation management ) leads the full newly competitive environment. During this newly competitive environment stage, the business how to make more better competitive advantage is the subject of this study. There are two main subjects for this study: 1. Analysis the key factors for competitive advantage of steel business and set up the model of competitive ability evaluation. The index for competitive ability evaluation include¡G¡]1¡^Growth¡]2¡^Profitability¡]3¡^Financiality¡]4¡^Stability¡]5¡^Activity¡]6¡^Productivity. 2. Set up the model for process innovation of steel business. According to evaluated model, analysis and compare 14 main companies in the steel world. The 3-best competitive ability companies are: Nucor steel is first, Thyssen Krupp company is 2nd, and 3rd is China steel company. Conclusion: 1.Competitive ability of steel company is not related to company size. 2.¡§ Process Innovation ¡§ is best tool to improve the competitive ability. 3.Want to make value, it should follow the trend of age pulse and catch up it.

Summary This study is base on Gudeng Precision Cooperation as the research example , applied questionnaire & interview methods for case study . This purpose is to discuss the the influences of customer satisfactions concentration from creative service & customer relationship management and provide suggestions. This research combines -- creative service , customer relationship , customer satisfaction concentrations and royalty ¡V 4 kinds of scales as the questionnaires . Then to investigate Gudeng¡¦s customers & vendors by the combined questionnaire. We collect 73 semiconductor on line engineers / leaders¡¦ feedback , use Spss14.0 for Windows to do the statistic analysis . By the methods of Descriptive Statistics , ANOVA , Pearson correlations & Multiple Regression Analysis , the hypothesis tests are as below: 1. Creative service & customer satisfaction concentrations has obvious correlations , up to high correlations: 0.845. When customers are better aware of the creative service , the customer satisfaction concentrations will get higher. There is 70.9% explanation ability in statics. 2. Creative service & customer royalty has obvious correlations, up to middle correlations: 0.594. When customers are better aware of the creative service, the customer royalty will get higher. There is 34.2% explanation ability in statics. 3. Customer relationship management & customer satisfaction concentrations has obvious correlations, up to high correlations: 0.762 . When customers are better aware of the customer relationship management, the customer satisfactions will get higher. There is 57.5% explanation ability in statics. 4. Customer relationship management & customer royalty has obvious correlations, up to middle correlations: 0.566. When customers are better aware of the customer relationship management, the customer royalty will get higher. There is 31% explanation ability in statics. 5. Customer satisfactions & customer royalty has obvious correlations, up to high correlations: 0.703. Base on statistic conclusions & interviews , this research provides 5 suggestions to Gudeng Precision Cooperation as below : 1. Enhance the speed & flexibility of creative service, especially focus on the research & development parts. 2. Emphasize the content of creative service, such as internet purchase order system & query function of production procedure. 3. Increase the reaction between sales , administration team and customers. 4. Develop new generation products , such as 18 inch wafer delivery equipments. 5. Adjust sales strategy , and focus on promotion activities. Keywords¡GCustom product, Creative service, customer satisfaction, customer satisfaction concentrations, customer royalty

<p>Background: Family Businesses’ way of doing marketing has similarities with B2B marketing. Usuallyfamily firms focus on what they have traditionally done well and diversify in related areas using their knowledge of how to perform in certain markets with certain customers and by offering certain productsand services. In order to do this, it is important for family firms, as for firms operating in B2Bmarkets, to create and keep good relationships with their stakeholders, so that at the end their customersare satisfied in the best possible manner. The process towards establishing long-term relationships between stakeholders and businesses requires certain characteristics and acts aimed at developingcommitment and trust. Since many of the most successful firms that have survived the longest arefamily businesses as well as B2B marketing is mainly about building and maintaining business relationships,we have decided to focus our study on the similarities between family firms’ marketing and B2Bmarketing within a specific context. B2B firms and Family firms make use of trade shows as an importantmarketing tool for improving relationships in networks. Trade shows are considered as the primary marketing tool to gain and sustain relationships with key stakeholders. Therefore, we chose the tradeshow context to execute our empirical survey.</p><p>Purpose: The overall purpose of this thesis consists in testing and comparing practices and principleswithin two apparently separate fields of study - B2B marketing and Family Business Development -with the aim of finding and developing associations that can complement and contribute to both fields of study on a marketing level.</p><p>Method: A quantitative method study has been conducted testing 50 companies participating at theBilsport Performance & Custom Motor show 2009 at Elmia – Jonkoping, Sweden. The primary data was gathered through a survey and a semi-structured interview, which constitutes our case study. The sample was chosen out of a population of 223 firms exhibing at the trade show, using a disproportionate stratified random method. Most secondary data involves research articles, books, reports, bachelorand master theses, and journals in order to determine marketing practices similarities between business-to-business firms and family business.</p><p>Conclusions: Our empirical findings confirmed most of the hypotheses derived from theory. Hence,we found that most exhibiting firms at the trade show are family-controlled and operate in B2C markets;B2B firms in our sample have a tendency to use more relationship marketing than transactional marketing; family firms in our sample are more likely to use long-term oriented than short-termoriented marketing; and the overlap between B2B marketing and Family firms’ marketing in the tradeshow context is characterized by the common marketing principles and practices of family and B2Bfirms that aim at gaining and sustaining long-term business relationships.</p>

There are a number of testability considerations for VLSI design, but test coverage, test time, accuracy of test patterns and correctness of design information for DFD (Design for debug) are the most important ones in design with embedded memories. The goal of DFT (Design-for-Test) is to achieve zero defects. When it comes to the memory subsystem in SOCs (system on chips), many flavors of memory BIST (built-in self test) are able to get high test coverage in a memory, but often, no proper attention is given to the memory interface logic (shadow logic). Functional testing and BIST are the most prevalent tests for this logic, but functional testing is impractical for complicated SOC designs. As a result, industry has widely used at-speed scan testing to detect delay induced defects. Compared with functional testing, scan-based testing for delay faults reduces overall pattern generation complexity and cost by enhancing both controllability and observability of flip-flops. However, without proper modeling of memory, Xs are generated from memories. Also, when the design has chip compression logic, the number of ATPG patterns is increased significantly due to Xs from memories. In this dissertation, a register based testing method and X prevention logic are presented to tackle these problems. An important design stage for scan based testing with memory subsystems is the step to create a gate level model and verify with this model. The flow needs to provide a robust ATPG netlist model. Most industry standard CAD tools used to analyze fault coverage and generate test vectors require gate level models. However, custom embedded memories are typically designed using a transistor-level flow, there is a need for an abstraction step to generate the gate models, which must be equivalent to the actual design (transistor level). The contribution of the research is a framework to verify that the gate level representation of custom designs is equivalent to the transistor-level design. Compared to basic stuck-at fault testing, the number of patterns for at-speed testing is much larger than for basic stuck-at fault testing. So reducing test and data volume are important. In this desertion, a new scan reordering method is introduced to reduce test data with an optimal routing solution. With in depth understanding of embedded memories and flows developed during the study of custom memory DFT, a custom embedded memory Bit Mapping method using a symbolic simulator is presented in the last chapter to achieve high yield for memories. / text

FPGAs are increasingly used to implement embedded digital systems because of their low time-to-market and low costs compared to integrated circuit design, as well as their superior performance and area over a general purpose microprocessor. However, the hardware design necessary to achieve this superior performance and area is very difficult to perform causing long design times and preventing wide-spread adoption of FPGA technology. The amount of hardware design can be reduced by employing a microprocessor for less-critical computation in the system. Often this microprocessor is implemented using the FPGA reprogrammable fabric as a soft processor which can preserve the benefits of a single-chip FPGA solution without specializing the device with dedicated hard processors. Current soft processors have simple architectures that provide performance adequate for only the least-critical computations. Our goal is to improve soft processors by scaling their performance and expanding their suitability to more critical computation. To this end we focus on the data parallelism found in many embedded applications and propose that soft processors be augmented with vector extensions to exploit this parallelism. We support this proposal through experimentation with a parameterized soft vector processor called VESPA (Vector Extended Soft Processor Architecture) which is designed, implemented, and evaluated on real FPGA hardware. The scalability of VESPA combined with several other architectural parameters can be used to finely span a large design space and derive a custom architecture for exactly matching the needs of an application. Such customization is a key advantage for soft processors since their architectures can be easily reconfigured by the end-user. Specifically, customizations can be made to the pipeline, functional units, and memory system within VESPA. In addition, general purpose overheads can be automatically eliminated from VESPA. Comparing VESPA to manual hardware design, we observe a 13x speed advantage for hardware over our fastest VESPA, though this is significantly less than the 500x speed advantage over scalar soft processors. The performance-per-area of VESPA is also observed to be significantly higher than a scalar soft processor suggesting that the addition of vector extensions makes more efficient use of silicon area for data parallel workloads.

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Die Studie informiert über die Gesamtsituation des Lohnarbeitssektors, seine bisherige und zukünftige Entwicklung und seine Bedeutung für die sächsische Landwirtschaft. Die umfangreiche Materialsammlung enthält darüber hinaus einen Vergleich zur Entwicklung in Deutschland und eine Stärken-Schwächen-Analyse.

FPGAs are increasingly used to implement embedded digital systems because of their low time-to-market and low costs compared to integrated circuit design, as well as their superior performance and area over a general purpose microprocessor. However, the hardware design necessary to achieve this superior performance and area is very difficult to perform causing long design times and preventing wide-spread adoption of FPGA technology. The amount of hardware design can be reduced by employing a microprocessor for less-critical computation in the system. Often this microprocessor is implemented using the FPGA reprogrammable fabric as a soft processor which can preserve the benefits of a single-chip FPGA solution without specializing the device with dedicated hard processors. Current soft processors have simple architectures that provide performance adequate for only the least-critical computations. Our goal is to improve soft processors by scaling their performance and expanding their suitability to more critical computation. To this end we focus on the data parallelism found in many embedded applications and propose that soft processors be augmented with vector extensions to exploit this parallelism. We support this proposal through experimentation with a parameterized soft vector processor called VESPA (Vector Extended Soft Processor Architecture) which is designed, implemented, and evaluated on real FPGA hardware. The scalability of VESPA combined with several other architectural parameters can be used to finely span a large design space and derive a custom architecture for exactly matching the needs of an application. Such customization is a key advantage for soft processors since their architectures can be easily reconfigured by the end-user. Specifically, customizations can be made to the pipeline, functional units, and memory system within VESPA. In addition, general purpose overheads can be automatically eliminated from VESPA. Comparing VESPA to manual hardware design, we observe a 13x speed advantage for hardware over our fastest VESPA, though this is significantly less than the 500x speed advantage over scalar soft processors. The performance-per-area of VESPA is also observed to be significantly higher than a scalar soft processor suggesting that the addition of vector extensions makes more efficient use of silicon area for data parallel workloads.

Reservoir Simulation is a very powerful tool used in the Oil and Gas industry to perform and provide various functions including but not limited to predicting reservoir performance, conduct sensitivity analysis to quantify uncertainty, production optimization and overall reservoir management. Compared to explored reservoirs in the past, current day reservoirs are more complex in extent and structure. As a result, reservoir simulators and algorithms used to represent dynamic systems of flow in porous media have invariably got just as complex. In order to provide the best solutions for analyzing reservoir performance, there is a need to continuously develop reservoir simulators and reservoir simulation algorithms that best represent the performance of the reservoir without compromising efficiency and accuracy. There exists several commercial reservoir simulation packages in the market that have been proven to be extremely resourceful with functionality that covers a wide range of interests in reservoir simulation yet there is the constant need to provide better and more efficient methods and algorithms to study and manage our reservoirs. This thesis aims at bridging the gap in the framework for developing these algorithms. To this end, this project has both an educational and research component. Educational because it leads to a strong understanding of the topic of reservoir simulation for students which can be daunting especially for those who require a more direct experience to fully comprehend the subject matter. It is research focused because it will serve as the foundation for developing a framework for integrating custom built external simulators and algorithms with the workflow of the model builder of our reservoir simulation package of choice i.e. Petrel with the Ocean programming environment in a seamless manner for simulating large scale multi-physics problems of flow in highly heterogeneous flow of porous media. Of particular interest are the areas of model order reduction and production optimization. In-house algorithms are being developed for these areas of interest and with the completion of this project. We hope to have developed a framework whereby we can take our algorithms specifically developed for areas of interest and add them to the workflow of the Petrel Model Builder. Currently, we have taken one of our in-house simulators i.e. a two dimensional, oil-water five-spot water flood pattern as a starting point and have been able to integrate it successfully into the “Define Simulation Case” process of Petrel as an additional choice for simulation by an end user. In the future, we will expand this simulator with updates to improve its performance, efficiency and extend its capabilities to incorporate areas of research interest.

Thesis (M.A.)--University of Hawaii at Manoa, 1993 / Pacific Islands Studies