In the design of the state-of-the-art electronic products, power management circuits play a very important role for the enhancement of overall system efficiency. Switched mode DC-DC converter is an increasingly popular power management circuit due to its superior power conversion efficiency. This thesis introduces two efficiency optimization techniques for switched mode power electronic circuits. One is dead-time optimization. This technique can automatically adjust the dead-time on-the-fly according to the circuit operating conditions. Second, an energy conservation based high-efficiency dimmable multi-channel LED driver is discussed. An auxiliary power switched is use to allow free wheeling of the inductor current during the load disconnect period. The sequential burst mode PWM current sharing scheme with dimming capability can effectively reduce design complexity and cost. The proposed LED driver provides a practical solution for the realization of LED BLU in the flat panel TVs with local dimming capability according to the video content.

L'utilisation des convertisseurs de puissance pour des applications de la vie quotidienne devient de plus en plus importante. Les applications technologiques actuelles demandent simultanément un haut niveau de précision et de performance, ainsi les convertisseurs DC-DC ont un rôle très important dans les systèmes nécessitant la conversion et l'adaptation du niveau d'énergie. Nous nous intéressons dans le cadre des travaux de cette thèse à une analyse des approches de modélisation et de synthèse de loi de commande permettant d'assurer la stabilité et un certain niveau de performances dans l'ensemble du domaine de fonctionnement défini par un cahier des charges tout en prenant en compte la problématique de leur application dans un environnement industriel. L'objectif de nos travaux de recherche est donc de proposer des lois de commandes dont la synthèse est fondée sur une approche formalisé {modélisation + commande} en vue d'obtenir des lois de commande adaptées au point de fonctionnement. Les principes exploités sont fondés sur la commande et l'observation par modes glissants d'une part, et sur la théorie de passivité pour la synthèse des lois de commande, complétées par un couple {observateur d'état + estimateur de charge} dont la synthèse est fondée sur l'exploitation des principes d'immersion et invariance, d'autre part. Le souci de la validation expérimentale et de l'implantation des structures de commande avec du matériel disponible industriellement a été en permanence un fil conducteur. Pour démontrer l'efficacité des méthodes proposées, leur application expérimentale a été effectuée sur un convertisseur de type SEPIC. Ce convertisseur présente plusieurs avantages par rapport à autres convertisseurs. Cependant, il reste peu exploité, en dépit de ces avantages, en raison des difficultés pour obtenir des lois commande performantes permettant la stabilisation de sa tension de sortie dans tout l'ensemble du domaine de fonctionnement.

In low power, battery-operated, portable applications, like cell phones, PDAs, digital cameras, etc., miniaturization at a low cost is a prominent driving factor behind product development and marketing efforts. As such, power supplies in portable applications must not only conform and adapt to their highly integrated on-chip and in-package environments but also, more intrinsically, respond quickly to fast load dumps to achieve and maintain high accuracy. The frequency-compensation network, however, limits speed and regulation performance because, in catering to all combinations of the output capacitor, its equivalent series resistance Resr, and the power inductor resulting from tolerance and modal design targets, it must compensate the worst-case condition and therefore restrain the performance of all other possible scenarios. Sigma-delta control, which addresses this issue in buck converters by easing its compensation requirements and offering one-cycle transient response, has not been able to simultaneously achieve high bandwidth, high accuracy, and wide LC-Resr compliance in boost (step-up) converters. This thesis investigates and presents techniques to achieve sigma-delta control in boost converters by essentially using explicit current and voltage control loops. The proposed techniques are developed conceptually and analytical expressions for stability range and transient response are derived. The proposed concepts are validated and quantified through PCB and IC prototypes to yield 1.41 to 6 times faster transient response than the state of the art in current-mode boost supplies, and this without any compromise in LC-Resr compliance range.

Switching frequency modulation techniques, an inductor current sensing circuit for fast switching converter, and a dual converter are proposed, and the simulation results and experimental results are drawn. The experimental results for monotonic and pseudo-random modulation techniques show that the switching noise peak was effectively reduced as much as -19 dBc. The inductor current sensing circuit accurately tracks the output current of the switching converter that switches up to 30MHz. This current sensing circuit is used to drive the slow converter in the dual converter. The dual converter consists of a fast converter and a slow converter. The fast converter provides only the high frequency conponents in the output current, and the slow converter provides the majority portion of the output current with a higher efficiency. Therefore, the dual converter can have a fast transient response without sacrificing its efficiency. All chips are fabricated in a standard CMOS 0.18um process.

Die vorliegende Arbeit beschäftigt sich mit DC/DC-Wandlern zur Einbindung von Doppelschichtkondensatoren in das Fahrzeugenergiebordnetz. Zunächst werden die Anforderungen an derartige DC/DC-Wandler anhand dreier entsprechender Beispielanwendungen zusammengestellt und verglichen. Für die Anwendung zur Entkopplung transienter Hochleistungsverbraucher, wie beispielsweise eine elektrische Lenkung, wird ein DC/DC-Wandler-Konzept entwickelt. Es findet ein Vergleich von drei geeigneten Topologien mittels einer hierfür erarbeiteten Methode statt, mit dem Ziel die beste Lösung für den betrachteten Anwendungsfall zu ermitteln. Um adäquate Kritierien für die Wahl der Schaltfrequenz und der Induktivitäten von Speicherdrosseln aufzustellen, erfolgt eine Untersuchung des Einflusses des Drosselstromwechselanteils auf das Schaltverhalten der MOSFETs sowie auf bestimmte Bereiche der EMV-Störemissionen. Als Methoden zur Optimierung des Synchrongleichrichterbetriebs werden das Parallelschalten von Schottky-Dioden und Synchrongleichrichtern sowie die Variation der Ausschalttotzeiten von Synchrongleichrichtern untersucht. Weiterhin wird unter Berücksichtigung der Besonderheiten der Anwendung und Topologie ein Konzept für die Regelung des Wandlers entwickelt. Abschließend findet eine Vorstellung ausgewählter Aspekte zur Umsetzung des DC/DC-Wandler-Konzepts sowie der Ergebnisse experimenteller Untersuchungen statt.

Distributed generation that utilizes 5-10kW Solid Oxide Fuel Cells requires power electronics to optimize the overall system efficiency while reducing the cost. The Adaptive Energy Zero-Voltage-Switching Phase-Shift-Modulated Full-Bridge (AE-ZVS-PSM-FB) topology meets these criteria under all loading conditions, but suffers from complexity associated with an analog control implementation. This thesis presents a novel Look-Up-Table (LUT) based digital controller required for such converter. The applied design approach also reduces the design time and controller requirements, which in turn decreases the overall system cost. Steady-state analysis for the AE-ZVS-PSM-FB converter is performed using a piece-wise equivalent circuit model. This analysis is used to verify the LUT concept that forms the basis for the proposed LUT-based digital controller. The proposed LUT-based digital control algorithm is developed and verified using Field Programmable Gate Array (FPGA) Logic platform. Design procedures and operational function under steady state and step change conditions are presented. Simulation results demonstrate the LUT concept in the AE-ZVS-PSM-FB converter, and the simplicity of the proposed LUT-based digital controller in producing the expected switching sequence. Simulation results were also produced showing successful dynamic response of LUT-based digital controller interconnected with the converter under different operating conditions. A Xilinx FPGA demonstration board was used to generate experimental switching sequence results to demonstrate the simplicity of the proposed controller. / Thesis (Master, Electrical & Computer Engineering) -- Queen's University, 2007-09-25 10:26:39.909

The demand to integrate more features has significantly increased the complexity and power consumption of smart portable devices. Therefore extending the battery life-time has become a major challenge and new approaches are required to decrease the power consumed from the source. Traditionally the focus has been on reducing the dynamic power consumption of the digital circuits used in these devices. However as process technologies scale, reducing the dynamic power has become less effective due to the increased impact of the leakage power. Alternatively, a more effective approach to minimize the power consumption is to continuously optimize the ratio of the dynamic and leakage power while delivering the required performance. This works presents a novel power-aware system for dynamic minimum power point tracking of digital loads in portable applications. The system integrates a dc-dc converter power-stage and the supplied digital circuit. The integrated dc-dc converter IC utilizes a mixed-signal current program mode (CPM) controller to regulate the supply voltage of the digital load IC. This embedded converter inherently measures the power consumption of the load in real-time, eliminating the need for additional power sensing circuitry. Based on the information available in the CPM controller, a minimum power point tracking (MiPPT) controller sets the supply and threshold voltages for the digital load to minimize its power consumption while maintaining a target frequency. The 10MHz mixed-signal CPM controlled dc-dc converter and the digital load are fabricated in 0.13µm IBM technology. Experimental results verify that the introduced system results in up to 30% lower power consumption from the battery source.

The proliferation of distributed energy resources (DER)s has prompted interest in the expansion of DC power systems. The technological limitations that hinder the expansion of DC power systems are the absence of DC circuit breakers and high step-up/high step-down DC converters for interconnecting DC systems. This thesis presents a transformerless high step-up DC-DC converter intended for use as an interconnect between DC systems. The converter is required to operate at medium to high voltage (>1kV) and provide high voltage gain (>5). This work details the steady state operation and dynamic model of the proposed converter. The component ratings are identified and converter design limitations are investigated. A 100V:1kV/4kW prototype is produced to verify the analytic steady state model and measure efficiency. An experimental efficiency of 90% was achieved at a step-up ratio of 1:10, however efficiency at low power is limited due to the need to circulate power.

The demand to integrate more features has significantly increased the complexity and power consumption of smart portable devices. Therefore extending the battery life-time has become a major challenge and new approaches are required to decrease the power consumed from the source. Traditionally the focus has been on reducing the dynamic power consumption of the digital circuits used in these devices. However as process technologies scale, reducing the dynamic power has become less effective due to the increased impact of the leakage power. Alternatively, a more effective approach to minimize the power consumption is to continuously optimize the ratio of the dynamic and leakage power while delivering the required performance. This works presents a novel power-aware system for dynamic minimum power point tracking of digital loads in portable applications. The system integrates a dc-dc converter power-stage and the supplied digital circuit. The integrated dc-dc converter IC utilizes a mixed-signal current program mode (CPM) controller to regulate the supply voltage of the digital load IC. This embedded converter inherently measures the power consumption of the load in real-time, eliminating the need for additional power sensing circuitry. Based on the information available in the CPM controller, a minimum power point tracking (MiPPT) controller sets the supply and threshold voltages for the digital load to minimize its power consumption while maintaining a target frequency. The 10MHz mixed-signal CPM controlled dc-dc converter and the digital load are fabricated in 0.13µm IBM technology. Experimental results verify that the introduced system results in up to 30% lower power consumption from the battery source.

The proliferation of distributed energy resources (DER)s has prompted interest in the expansion of DC power systems. The technological limitations that hinder the expansion of DC power systems are the absence of DC circuit breakers and high step-up/high step-down DC converters for interconnecting DC systems. This thesis presents a transformerless high step-up DC-DC converter intended for use as an interconnect between DC systems. The converter is required to operate at medium to high voltage (>1kV) and provide high voltage gain (>5). This work details the steady state operation and dynamic model of the proposed converter. The component ratings are identified and converter design limitations are investigated. A 100V:1kV/4kW prototype is produced to verify the analytic steady state model and measure efficiency. An experimental efficiency of 90% was achieved at a step-up ratio of 1:10, however efficiency at low power is limited due to the need to circulate power.