<p>Inom området för telemedicin efterfrågas praktiska sätt för läkare att snabbt och tillförlitligt kunna ställa preliminära diagnoser. Genom att använda GPRS kan stetoskopljud överföras över långa avstånd. På så vis kan en patient bli undersökt utan att behöva träffa sin läkare. Den här rapporten förklarar arbetet med att konstruera ett trådlöst stetoskop som använder sig av GPRS. In the area of telemedicine practical methods are wantedfor a doctor to quickly and reliably be able to set a preliminary diagnose. By using GPRS stethoscope sound can be sent over long distances. In that way a patient can be examined without having to meet his or her doctor. This report explains the work of constructing a wireless stethoscope using GPRS.</p>

<p>Security issues appearing in one or another form become a requirement for an increasing number of embedded systems. Those systems, which will be used to capture, store, manipulate, and access data with a sensitive nature, have posed several unique and urgent challenges. The challenges to those embedded system require new approaches to security covering all aspects of embedded system design from architecture, implementation to the methodology. However, security is always treated by embedded system designer as the addition of features, such as specific cryptographic algorithm or other security protocol. This paper is intended to draw both the SW and HW designer attention to treat the security issues as a new mainstream during the design of embedded system. We intend to show why hardware option issues have been taken into consideration and how those hardware mechanisms and key features of processor architecture could be implemented in the hardware level (through modification of processor architecture, for example) to deal with various potential attacks unique to embedded systems.</p>

<p>Larger systems today, like telephone and optical switches, are usually based on a multiboard architecture where a set of printed-circuit boards are connected to a backplane board. These systems are also equipped with Boundary-Scan to enable testing, however, the backplane in a multi-board system has a limited wiring capability, which makes the additional backplane Boundary-Scan wiring highly costly. The problem is to access the Boundary-Scan enabled boards with the Boundary-Scan controller located at a central board. In this MSc. thesis project we propose an approach suitable for the Advanced Telecommunication Computing Architecture (ATCA) standard where we make use of the existing Intelligent Platform Management Bus (IPMB) and expands its protocol for application of Boundary-Scan tests. We have also defined a command set as well as a test data format for storing embedded test data on the boards to support the remote execution of Boundary-Scan tests. For validation of the proposed approach we have developed demonstrator.</p>

<p>Embedded computer systems have become ubiquitous. They are used in a wide spectrum of applications, ranging from household appliances and mobile devices to vehicle controllers and medical equipment. This dissertation deals with design and verification of embedded systems, with a special emphasis on the real-time facet of such systems, where the time at which the results of the computations are produced is as important as the logical values of these results. Within the class of real-time systems two categories, namely hard real-time systems and soft real-time systems, are distinguished and studied in this thesis.</p><p>First, we propose modeling and verification techniques targeted towards hard real-time systems, where correctness, both logical and temporal, is of prime importance. A model of computation based on Petri nets is defined. The model can capture explicit timing information, allows tokens to carry data, and supports the concept of hierarchy. Also, an approach to the formal verification of systems represented in our modeling formalism is introduced, in which model checking is used to prove whether the system model satisfies its required properties expressed as temporal logic formulas. Several strategies for improving verification efficiency are presented and evaluated.</p><p>Second, we present scheduling approaches for mixed hard/soft real-time systems. We study systems that have both hard and soft real-time tasks and for which the quality of results (in the form of utilities) depends on the completion time of soft tasks. Also, we study systems for which the quality of results (in the form of rewards) depends on the amount of computation allotted to tasks. We introduce quasi-static techniques, which are able to exploit at low cost the dynamic slack caused by variations in actual execution times, for maximizing utilities/rewards and for minimizing energy.</p><p>Numerous experiments, based on synthetic benchmarks and realistic case studies, have been conducted in order to evaluate the proposed approaches. The experimental results show the merits and worthiness of the techniques introduced in this thesis and demonstrate that they are applicable on real-life examples.</p>

<p>In a system like a Scania heavy duty truck, faultcodes (DTCs) are generated and stored locally in the ECUs when components, e.g. sensors or actuators, malfunction. Tests are run periodically to detect failure in the system. The test results are processed by the diagnostic system that tries to isolate the faulty components and set local faultcodes.</p><p>Currently, in a Scania truck, local diagnoses are only based on local diagnostic information, which the DTCs are based upon. The diagnosis statement can, however, be more complete if diagnoses from other ECUs are considered. Thus a system that extends the local diagnoses by exchanging diagnostic information between the ECUs is desired. The diagnostic information to share and how it should be done is elaborated in this thesis. Further, a model of distributed diagnosis is given and a few distributed diagnostic algorithms for transmitting and receiving diagnostic information are presented.</p><p>A basic idea that has influenced the project is to make the diagnostic system scalable with respect to hardware and thereby making it easy to add and remove ECUs. When implementing a distributed diagnostic system in networked real-time embedded systems, technical problems arise such as memory handling, process synchronization and transmission of diagnostic data and these will be discussed in detail. Implementation of a distributed diagnostic system is further complicated due to the fact that the isolation process is a non deterministic job and requires a non deterministic amount of memory.</p>

<p>This thesis is about a number of improvements and additions done to a soft CPU optimized for field programmable gate arrays (FPGAs). The goal has been to implement the changes without substantially lowering the CPU's ability to operate at high clock frequencies. The result of the thesis is a number of high clock frequency modules, which when added completes the CPU hardware functionality in certain areas. The maximum frequency of the CPU is however somewhat lowered after the modules have been added.</p> / <p>Detta examensarbete handlar om ett antal förbättringar och utökningar av en mjuk processor speciellt anpassad för fältprogrammerbara grindmatriser (FPGA). Målet har varit att göra förändringarna utan att göra större avkall på processorns förmåga att operera i höga klockfrekvenser. Resultatet av examensarbetet är ett antal moduler som klarar av höga frekvenser och kompletterar processorns hårdvarufunktioner. Dock reduceras maxfrekvensen på processorn något med modulerna tillagda.</p>

<p>The amount of data handled by real-time and embedded applications is increasing. This calls for data-centric approaches when designing embedded systems, where data and its metainformation (e.g., temporal correctness requirements) are stored centrally. The focus of this thesis is on efficient data management, especially maintaining data freshness and guaranteeing correct age on data.</p><p>The contributions of our research are updating algorithms and concurrency control algorithms using data similarity. The updating algorithms keep data items up-to-date and can adapt the number of updates of data items to state changes in the external environment. Further, the updating algorithms can be extended with a relevance check allowing for skipping of unnecessary calculations. The adaptability and skipping of updates have positive effects on the CPU utilization, and freed CPU resources can be reallocated to, e.g., more extensive diagnosis of the system. The proposed multiversion concurrency control algorithms guarantee calculations reading data that is correlated in time.</p><p>Performance evaluations show that updating algorithms with a relevance check give significantly better performance compared to well-established updating approaches, i.e., the applications use more fresh data and are able to complete more tasks in time. The proposed multiversion concurrency control algorithms perform better than HP2PL and OCC and can at the same time guarantee correct age on data items, which HP2PL and OCC cannot guarantee. Thus, from the perspective of the application, more precise data is used to achieve a higher data quality overall, while the number of updates is reduced.</p> / Report code: LiU-Tek-Lic-2004:67.

<p>Systems controlled by embedded computers become indispensable in our lives and can be found in avionics, automotive industry, home appliances, medicine, telecommunication industry, mecatronics, space industry, etc. Fast, accurate and flexible performance estimation tools giving feedback to the designer in every design phase are a vital part of a design process capable to produce high quality designs of such embedded systems.</p><p>In the past decade, the limitations of models considering fixed task execution times have been acknowledged for large application classes within soft real-time systems. A more realistic model considers the tasks having varying execution times with given probability distributions. No restriction has been imposed in this thesis on the particular type of these functions. Considering such a model, with specified task execution time probability distribution functions, an important performance indicator of the system is the expected deadline miss ratio of tasks or task graphs.</p><p>This thesis proposes two approaches for obtaining this indicator in an analytic way. The first is an exact one while the second approach provides an approximate solution trading accuracy for analysis speed. While the first approach can efficiently be applied to monoprocessor systems, it can handle only very small multi-processor applications because of complexity reasons. The second approach, however, can successfully handle realistic multiprocessor applications. Experiments show the efficiency of the proposed techniques.</p> / Report code: LiU-Tek-Lic-2002:58.

<p>Embedded systems are used in a wide spectrum of applications ranging from home appliances and mobile devices to medical equipment and vehicle controllers. They are typically characterized by their real-time behavior and many of them must fulfill strict requirements on reliability and correctness.</p><p>In this thesis, we concentrate on aspects related to modeling and formal verification of realtime embedded systems.</p><p>First, we define a formal model of computation for real-time embedded systems based on Petri nets. Our model can capture important features of such systems and allows their representations at different levels of granularity. Our modeling formalism has a welldefined semantics so that it supports a precise representation of the system, the use of formal methods to verify its correctness, and the automation of different tasks along the design process.</p><p>Second, we propose an approach to the problem of formal verification of real-time embedded systems represented in our modeling formalism. We make use of model checking to prove whether certain properties, expressed as temporal logic formulas, hold with respect to the system model. We introduce a systematic procedure to translate our model into timed automata so that it is possible to use available model checking ools. Various examples, including a realistic industrial case, demonstrate the feasibility of our approach on practical applications.</p>

<p>Xilinx Virtex II Pro FPGA with integrated PowerPC core offers an opportunity to implementing a software and hardware codesign. The software application executes on the PowerPC processor while the FPGA implementation of hardware cores coprocess with PowerPC to achieve the goals of acceleration. Another benefit of coprocessing with the hardware acceleration core is the release of processor load. This thesis demonstrates such an FPGA based software and hardware codesign by implementing a real time video processing project on Xilinx ML310 development platform which is featured with a Xilinx Virtex II Pro FPGA. The software part in this project performs video and memory interface task which includes image capture from camera, the store of image into on-board memory, and the display of image on a screen. The hardware coprocessing core does a contrast enhancement function on the input image. To ease the software development and make this project flexible for future extension, an Embedded Operating System MontaVista Linux is installed on the ML310 platform. Thus the software video interface application is developed using Linux programming method, for example the use of Video4Linux API. The last but not the least implementation topic is the software and hardware interface, which is the Linux device driver for the hardware core. This thesis report presents all the above topics of Operating System installation, video interface software development, contrast enhancement hardware implementation, and hardware core’s Linux device driver programming. After this, a measurement result is presented to show the performance of hardware acceleration and processor load reduction, by comparing to the results from a software implementation of the same contrast enhancement function. This is followed by a discussion chapter, including the performance analysis, current design’s limitations and proposals for improvements. This report is ended with an outlook from this master thesis.</p>