Les modulations multiporteuses apparaissent aujourd'hui comme une technologie éprouvée pour la transmission de données à haut-débits sur des canaux pouvant être très perturbés. L'OFDM (Orthogonal Frequency Division Multiplexing) a d'ailleurs été choisie dans plusieurs normes de télécommunications (ADSL, Wi-Max, IEEE 802.11a/g/n, LTE, DVB,...). Cependant un des inconvénients de ce type de modulation est la forte variation de la puissance instantanée à transmettre. Cette propriété rend ces modulations très sensibles aux non-linéarités des composants analogiques, en particulier celles de l'amplificateur de puissance à l'émission. Or l'amplificateur de puissance est un élément déterminant dans une chaîne de communication dans la mesure où il a une influence prépondérante sur le bilan global de la transmission en termes de puissance, de rendement et de distorsion. Plus l'on souhaite que l'impact de ses non linéarités soit faible et plus son rendement est faible, et inversement. Il est donc nécessaire d'effectuer un compromis linéarité/rendement.L'objectif de la thèse est d'éviter cette détérioration du rendement tout en conservant de bonnes performances de linéarité, de surcroit pour des signaux OFDM. Pour ce faire nous proposons d'utiliser conjointement des méthodes de linéarisation (prédistorsion numérique en bande de base) et d'amélioration du rendement (envelope tracking) de l'amplificateur de puissance ainsi qu'une méthode de réduction de la dynamique du signal (active constellation extension). La prédistorsion numérique classique échouant aux fortes puissances, nous proposons une méthode d'amélioration de cette technique à ces puissances. Nos résultats sont validés par des mesures sur un amplificateur de puissance 50W. Nous proposons également une association des méthodes permettant d'améliorer simultanément les performances en terme de linéarité hors bande et de rendement en minimisant les dégradations des performances de taux d'erreur binaire. / Multi-carrier modulations appear as a well-tried technology for high-speed data transmission on potentially disrupted channels. OFDM (Orthogonal Frequency Division Multiplexing) has been chosen for that matter in several telecommunication standards (ADSL, Wi-Max, IEEE 802.11a/g/n, LTE, DVB,...). However one of the drawbacks of this modulation type is its high variation of the instantaneous power to transmit. This property makes these modulations very sensitive to the non-linearities of analog components, especially those related to power amplifiers. Yet the power amplifiers are critical elements in the communication chain as they have a major influence on the global assessment in terms of power, efficiency and distortion. More we want its non linearity impact is weak, more its efficiency is weak too. It is therefore necessary to make a trade-off between linearity and efficiency.The purpose of the thesis is to avoid this efficiency damage keeping at the same time the good linearity performance, moreover for OFDM signals. In this way we propose to jointly use a linearization technique (the base band digital predistortion) and a technique of efficiency improvement (the envelope tracking) for the power amplifier, together with a technique of signal dynamic reduction (the active constellation extension). The classic predistortion failing for high powers, we propose an improvement of this technique for these powers. Our results are validated by measurements on a 50W power amplifier. We also propose an association of the techniques allowing an improvement of the performance in terms of out-of-band linearity and efficiency, with smallbit error rate damages.

Modern communication systems operate with high peak-to-average-power ratio (PAPR) over wide bandwidth. Linearity requirements force operation in a low efficient highly linear back-off region. Then increasing efficiency is becoming critical. One of the most promising technologies to accomplish this is using supply modulation, e.g. envelope tracking (ET) and envelope elimination and restoration (EER). Supply modulated systems have been studied extensively in the past years, but no systems have been presented with flexibility in the envelope amplifier circuit.   In this work the supply modulator amplifiers have been studied. The focus is on hybrid switching amplifier (HSA) as envelope amplifier. Two envelope amplifier prototypes P-I and P-II have been designed. They are both designed for 15W output but P-II has 28V maximum supply voltage and P-I has 15V maximum supply voltage. P-II developed in version A, using silicon (Si) based switching transistor and version B using gallium-nitride (GaN) switching transistor. The efficiency is limited to a maximum 97 % possible by the circuit components.   The linearity was mainly analyzed by AM-AM diagrams. P-I, P-IIA and P-IIB, were analyzed in simulations and measurements. Results show high possibility of improvement with digital processing, i.e. digital pre-distortion (DPD). Linearization will improve the overall performance in the supply modulator (SM) systems, improving the delay issues and distortion produced by the implementation of the system.   The developed flexible board has made it possible to investigate alternative technologies of ET, focused in the hybrid switching amplifier (HSA). This has given the possibility to compare the overall performance for a traditional Si based switch with the novel Ferdinand Braun Institute’s (FBH) GaN-HEMT based switch with regards to bandwidth, efficiency and non-linearities introduced by the envelope tracking amplifier. P-I and P-II show high efficiency (> 60%) in results. For signals with adequate average power levels the efficiency is high, with around 70% efficiency for WCDMA signals. Phase distortions are evident already at a 5 MHz bandwidth.

In the past decade, there has been great motivation to improve the efficiency of power amplifiers (PAs) in handset transmitter systems in order to address critical issues such as poor battery life and excessive heat. Currently, the focus lies on high data rate applications such as wideband code division multiple access (WCDMA) and long term evolution (LTE) standards due to the stringent efficiency and linearity requirements on the PA. This thesis describes a simulation-based study of techniques for enhancing the efficiency of a CMOS power amplifier for WCDMA and LTE applications. The primary goal is to study the concepts of envelope and average power tracking in simulation and to demonstrate the effectiveness of these supply modulation techniques on a CMOS PA design. The P1dB and IMD performance of a Class A/AB CMOS PA has been optimized to operate with high peak-to-average modulation with WCDMA and LTE signals. Behavioral models of envelope and average power tracking are implemented using proposed algorithms, and a system-level analysis is performed. Envelope tracking is seen to offer a peak PAE improvement of 15% for WCDMA, versus a fixed voltage supply, while average power tracking renders a maximum efficiency gain of 9.8%. Better than -33dBc adjacent channel leakage-power ratio (ACLR) at 5MHz offset and EVM below 4% are observed for both supply tracking techniques. For LTE, envelope and average power tracking contribute to a peak PAE enhancement of 15.3% and 7%, respectively. LTE ACLR begins failing the -30dBc specification above 22.5dBm output power during envelope tracking operation in the PA implementation described here. / text

Cette thèse porte sur la conception d’amplificateurs de puissance reconfigurables en technologie CMOS avancée pour une application cellulaire de 4ème génération. Dans les systèmes de communication sans fil, le rendement énergétique est un critère primordial qui impacte la durée d’utilisation de la batterie. Principalement déterminé par la consommation d’énergie du transmetteur, il est plus particulièrement lié à celle de l’amplificateur de puissance (PA). Pour les terminaux mobiles de 4ème génération (4G), les techniques de transmission et les modulations utilisées pour atteindre les débits de données visés induisant une dynamique importante du signal à transmettre, l’implémentation de techniques d’amélioration du rendement autour du PA devient indispensable, afin de le reconfigurer en puissance.Nous avons mis au point dans ce travail de recherche des architectures innovantes utilisant les techniques d’amélioration du Power Cell Switching (PCS) et de l’Envelope Tracking (ET). Le double objectif visé étant d’améliorer significativement le rendement pour les faibles niveaux de puissance et d’apporter de la flexibilité par rapport à un PA utilisé seul. Une première architecture utilisant la technique du PCS totalement intégré en technologie CMOS 65nm de STMicroelectronics, mettant en œuvre des transformateurs comme combineurs de puissance, a été réalisée pour valider la fonctionnalité du concept proposé. Puis une deuxième architecture combinant les techniques du PCS et de l’ET a été conçue, afin d’évaluer les avantages qu’apporte la combinaison de ces deux techniques par rapport à un PA fonctionnant seul et à un PA développé utilisant la technique du PCS. / This thesis deals with the design of reconfigurable power amplifiers implemented in CMOS technology for 4G LTE application. For the next generation communication systems such as 4G LTE, orthogonal frequency division multiplexing (OFDM) is employed for a wideband communication. Indeed, signal information is encoded both in amplitude and phase domains, which results in a higher peak to average power ratio than for 2G and 3G systems. Consequently, the overall power amplifier (PA) efficiency does not only depend on efficiency at maximum power, but also and mainly on efficiency at back-off level where the PA operates most of the time. Obviously, classical PA architectures do not address this problem, because it can only achieve maximum efficiency at a single power level, usually around the peak output power. Therefore, the overall efficiency of the PA is considerably low and efficiency improvement techniques are required to increase the battery life-time. This thesis exposes innovative architectures using Power Cell Switching (PCS) and Envelope Tracking (ET) techniques. The main objective of the proposed architectures is to significantly improve the average efficiency in comparison with a stand-alone power amplifier at power back-off. Consequently, a reconfigurable PA architecture using a 4-step PCS technique has been implemented in CMOS 65nm technology. A second architecture was designed to evaluate the improvement obtained with the combination of these two techniques.

No description available.

<p>The current consumption of the IQ modulator is a significant part of the totalcurrent consumption of a mobile transmitter platform and reducing it is of greatinterest. Also, as the WCDMA/LTE standards specifies full duplex transmissionsand Tx and Rx are most often using the same antenna, it is crucial to have asolution with low noise generation. Two new proposals have been studied with theaim to reduce the current consumption and noise contribution of the IQ modulator.</p><p>A current mode envelope tracking IQM is the first of the studied designs. Thisimplementation lowers the bias currents in the circuit in relation to the amplitudeof the baseband input signals, meaning that a low input amplitude results in alowering of the current consumption. It proves to be very efficient for basebandsignals with a high peak-to-average ratio. Simulations and calculations have shownthat an average current reduction of 56 % can be achieved for an arbitrary LTEbaseband signal.</p><p>The second is an entirely new passive mixer design where the baseband voltagesare sequentially copied to the RF node, removing the need for V-to-I conversion inthe mixer which reduces current consumption and noise. Results from simulationshas proven that this design is fully capable of improving both current consumptionas well as the noise levels. With an output power of 4.0 dBm, the power consumptionwas 43.3 mW, including clock generating circuits. This, combined with thefact that the design is small and simple, means that there is definitely a possibilityto replace the present IQM design with a passive mixer.</p>

abstract: As wireless communication enters smartphone era, more complicated communication technologies are being used to transmit higher data rate. Power amplifier (PA) has to work in back-off region, while this inevitably reduces battery life for cellphones. Various techniques have been reported to increase PA efficiency, such as envelope elimination and restoration (EER) and envelope tracking (ET). However, state of the art ET supply modulators failed to address high efficiency, high slew rate, and accurate tracking concurrently. In this dissertation, a linear-switch mode hybrid ET supply modulator utilizing adaptive biasing and gain enhanced current mirror operational transconductance amplifier (OTA) with class-AB output stage in parallel with a switching regulator is presented. In comparison to a conventional OTA design with similar quiescent current consumption, proposed approach improves positive and negative slew rate from 50 V/µs to 93.4 V/µs and -87 V/µs to -152.5 V/µs respectively, dc gain from 45 dB to 67 dB while consuming same amount of quiescent current. The proposed hybrid supply modulator achieves 83% peak efficiency, power added efficiency (PAE) of 42.3% at 26.2 dBm for a 10 MHz 7.24 dB peak-to-average power ratio (PAPR) LTE signal and improves PAE by 8% at 6 dB back off from 26.2 dBm power amplifier (PA) output power with respect to fixed supply. With a 10 MHz 7.24 dB PAPR QPSK LTE signal the ET PA system achieves adjacent channel leakage ratio (ACLR) of -37.7 dBc and error vector magnitude (EVM) of 4.5% at 26.2 dBm PA output power, while with a 10 MHz 8.15 dB PAPR 64QAM LTE signal the ET PA system achieves ACLR of -35.6 dBc and EVM of 6% at 26 dBm PA output power without digital pre-distortion (DPD). The proposed supply modulator core circuit occupies 1.1 mm2 die area, and is fabricated in a 0.18 µm CMOS technology. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2017

abstract: A wideband hybrid envelope tracking modulator utilizing a hysteretic-controlled three-level switching converter and a slew-rate enhanced linear amplifierer is presented. In addition to smaller ripple and lower losses of three-level switching converters, employing the proposed hysteresis control loop results in a higher speed loop and wider bandwidth converter, enabling over 80MHz of switching frequency. A concurrent sensor circuit monitors and regulates the flying capacitor voltage VCF and eliminates conventional required calibration loop to control it. The hysteretic-controlled three-level switching converter provides a high percentage of power amplifier supply load current with lower ripple, reducing the linear amplifier high-frequency current and ripple cancellation current, improving the overall system efficiency. A slew-rate enhancement (SRE) circuit is employed in the linear amplifier resulting in slew-rate of over 307V/us and bandwidth of over 275MHz for the linear amplifier. The slew-rate enhancement circuit provides a parallel auxiliary current path directly to the gate of the class-AB output stage transistors, speeding-up the charging or discharging of out- put without modifying the operating point of the remaining linear amplifier, while maintaining the quiescent current of the class-AB stage. The supply modulator is fabricated in 65nm CMOS process. The measurement results show the tracking of LTE-40MHz envelope with 93% peak efficiency at 1W output power, while the SRE is disabled. Enabling the SRE it can track LTE-80MHz envelope with peak efficiency of 91%. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2019

The current consumption of the IQ modulator is a significant part of the totalcurrent consumption of a mobile transmitter platform and reducing it is of greatinterest. Also, as the WCDMA/LTE standards specifies full duplex transmissionsand Tx and Rx are most often using the same antenna, it is crucial to have asolution with low noise generation. Two new proposals have been studied with theaim to reduce the current consumption and noise contribution of the IQ modulator. A current mode envelope tracking IQM is the first of the studied designs. Thisimplementation lowers the bias currents in the circuit in relation to the amplitudeof the baseband input signals, meaning that a low input amplitude results in alowering of the current consumption. It proves to be very efficient for basebandsignals with a high peak-to-average ratio. Simulations and calculations have shownthat an average current reduction of 56 % can be achieved for an arbitrary LTEbaseband signal. The second is an entirely new passive mixer design where the baseband voltagesare sequentially copied to the RF node, removing the need for V-to-I conversion inthe mixer which reduces current consumption and noise. Results from simulationshas proven that this design is fully capable of improving both current consumptionas well as the noise levels. With an output power of 4.0 dBm, the power consumptionwas 43.3 mW, including clock generating circuits. This, combined with thefact that the design is small and simple, means that there is definitely a possibilityto replace the present IQM design with a passive mixer.

<p>The purpose of this master thesis was to study if the drain efficiency of power amplifiers can be maintained at power back off using a technique called load modulation.</p><p>The amplifier classes studied are E, F and D-1. The target figure was to obtain a 10 to 12 dB dynamic range of amplitude with reasonable efficiency. Studies of power amplifiers have been made to understand how power is generated. Several different load modulation networks have been evaluated. Attempts to derive design equations for the modulation networks have also been done.</p><p>The thesis work was carried out with simulations in ADS 2006. As active devices commercially available bare-die transistor models have been used. The power rating of the dies are 15 W.</p><p>A dynamic range of amplitude of over 15 dB has been achieved with drain efficiency greater than 60 percent. The peak output power is in the 40 – 45 dBm range.</p>