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Flexible Electronics: Materials and Device FabricationSankir, Nurdan Demirci 05 January 2006 (has links)
This dissertation will outline solution processable materials and fabrication techniques to manufacture flexible electronic devices from them. Conductive ink formulations and inkjet printing of gold and silver on plastic substrates were examined. Line patterning and mask printing methods were also investigated as a means of selective metal deposition on various flexible substrate materials. These solution-based manufacturing methods provided deposition of silver, gold and copper with a controlled spatial resolution and a very high electrical conductivity. All of these procedures not only reduce fabrication cost but also eliminate the time-consuming production steps to make basic electronic circuit components. Solution processable semiconductor materials and their composite films were also studied in this research. Electrically conductive, ductile, thermally and mechanically stable composite films of polyaniline and sulfonated poly (arylene ether sulfone) were introduced. A simple chemical route was followed to prepare composite films. The electrical conductivity of the films was controlled by changing the weight percent of conductive filler. Temperature dependent DC conductivity studies showed that the Mott three dimensional hopping mechanism can be used to explain the conduction mechanism in composite films. A molecular interaction between polyaniline and sulfonated poly (arylene ether sulfone) has been proven by Fourier Transform Infrared Spectroscopy and thermogravimetric analysis. Inkjet printing and line patterning methods also have been used to fabricate polymer resistors and field effect transistors on flexible substrates from poly-3-4-ethyleneoxythiophene/poly-4-sytrensulfonate. Ethylene glycol treatment enhanced the conductivity of line patterned and inkjet printed polymer thin films about 900 and 350 times, respectively. Polymer field effect transistors showed the characteristics of traditional p-type transistors. Inkjet printing technology provided the transfer of semiconductor polymer on to flexible substrates including paper, with high resolution in just seconds. / Ph. D.
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Tensile-Strained Ge/InₓGa₁₋ₓAs Heterostructures for Electronic and Photonic ApplicationsClavel, Michael Brian 25 June 2016 (has links)
The continued scaling of feature size in silicon (Si)-based complimentary metal-oxide-semiconductor (CMOS) technology has led to a rapid increase in compute power. Resulting from increases in device densities and advances in materials and transistor design, integrated circuit (IC) performance has continued to improve while operational power (VDD) has been substantially reduced. However, as feature sizes approach the atomic length scale, fundamental limitations in switching characteristics (such as subthreshold slope, SS, and OFF-state power dissipation) pose key technical challenges moving forward. Novel material innovations and device architectures, such as group IV and III-V materials and tunnel field-effect transistors (TFETs), have been proposed as solutions for the beyond Si era. TFETs benefit from steep switching characteristics due to the band-to-band tunneling injection of carriers from source to channel. Moreover, the narrow bandgaps of III-V and germanium (Ge) make them attractive material choices for TFETs in order to improve ON-state current and reduce SS. Further, Ge grown on InₓGa₁₋ₓAs experiences epitaxy-induced strain (ε), further reducing the Ge bandgap and improving carrier mobility. Due to these reasons, the ε-Ge/InₓGa₁₋ₓAs system is a promising candidate for future TFET architectures. In addition, the ability to tune the bandgap of Ge via strain engineering makes ε-Ge/InₓGa₁₋ₓAs heterostructures attractive for nanoscale group IV-based photonics, thereby benefitting the monolithic integration of electronics and photonics on Si. This research systematically investigates the material, optical, and heterointerface properties of ε-Ge/InₓGa₁₋ₓAs heterostructures on GaAs and Si substrates. The effect of strain on the heterointerface band alignment is comprehensively studied, demonstrating the ability to modulate the effective tunneling barrier height (Ebeff) and thus the threshold voltage (VT), ON-state current, and SS in future ε-Ge/InₓGa₁₋ₓAs TFETs. Further, band structure engineering via strain modulation is shown to be an effective technique for tuning the emission properties of Ge. Moreover, the ability to heterogeneously integrate these structures on Si is demonstrated for the first time, indicating their viability for the development of next-generation high performance, low-power logic and photonic integrated circuits on Si. / Master of Science
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Spatially resolved studies of the leakage current behavior of oxide thin-filmsMartin, Christian Dominik 27 May 2013 (has links)
Im Laufe der Verkleinerungen integrierter Schaltungen ergab sich die Notwendigkeit der alternativen dielektrischen Materialen. Hohe Polarisierbarkeiten in diesen dielektrischen Dünnfilmen treten erst in hoch direktionalen kristallinen Phasen auf. Aufgrund der erschwerten Integrierbarkeit von epitaktischen, einkristallinen Oxidfilmen können nur poly-, beziehungsweise nanokristalle Filme eingesetzt werden. Diese sind jedoch mit hohen Leckströmen behaftet. Weil die Information in einer DRAM-Zelle als Ladung in einem Kondensator gespeichert wird ist der Verlust dieser Ladung durch Leckströme die Ursache für Informationsverluste. Die Frequenz der notwendigen Auffrischungszyklen einer DRAM-Zelle wird direkt durch die Leckströme bestimmt. Voraussetzungen für die Entwicklung neuer dielektrischer Materialien ist das Verständnis der zugrunde liegenden Ladungsträgertransportmechanismen und ein Verständnis der strukturellen Schichteigenschaften, welche zu diesen Leckströmen führen. Conductive atomic force Microscopy ist ein Rastersondenmethode mit der strukturelle Eigenschaften mit lokaler elektrischer Leitfähigkeit korreliert wird. Mit dieser Methode wurde in einer vergleichenden Studie die räumlichen Leckstromverteilungen untersucht. Und es wurde gezeigt, dass es genügt eine nicht geschlossene Zwischenschicht Aluminiumoxid in eine Zirkoniumdioxidschicht zu integrieren um die Leckströme signifikant zu reduzieren während eine ausreichend hohe Kapazität erhalten bleibt. Darüberhinaus wurde ein CAFM modifiziert und benutzt um das Schaltverhalten eines Siliziumnanodrahtschottkybarrierenfeleffektransistor in Abhängigkeit der Spitzenposition zu untersuchen. Es konnte experimentell bestätigt werden das die Schottkybarrieren den Ladungstransport in diesen Bauteilen kontrollieren. Darüber hinaus wurde ein proof-of-concept für eine umprogrammierbaren nichtflüchtigen Speicher, der auf Ladungsakkumulation und der resultierenden Bandverbiegung an den Schottkybarrieren basiert, gezeigt. / In the course of the ongoing downscaling of integrated circuits the need for alternative dielectric materials has arisen. The polarizability of these dielectric thin-films is highest in highly directional crystalline phases. Since epitaxial single crystalline oxide films are very difficult to integrate into the complex DRAM fabrication process, poly- or nanocrystalline thin-films must be used. However these films are prone to very high leakage currents. Since the information is stored as charge on a capacitor in the DRAM cell, the loss of this charge through leakage currents is the origin of information loss. The rate of the necessary refresh cycles is directly determined by these leakage currents. A fundamental understanding of the underlying charge carrier transport mechanisms and an understanding of the structural film properties leading to such leakage currents are essential to the development of new, dielectric thin-film materials. Conductive Atomic Force Microscopy (CAFM) is a scanning probe based technique which correlates structural film properties with local electrical conductivity. This method was used to examine the spatial distribution of leakage currents in a comparative study. I was shown that it is sufficient to include an unclosed interlayer of Aluminium oxide into a Zirconium dioxide film to significantly reduce leakage currents while maintaining a sufficiently high capacitance. Moreover, a CAFM was modified and used to examine the switching behavior of a silicon nanowire Schottky barrier field effect transistors in dependence of the probe position. It was proven experimentally that Schottky barriers control the charge carrier transport in these devices. In addition, a proof of concept for a reprogrammable nonvolatile memory device based on charge accumulation and band bending at the Schottky barriers was shown.
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Multiskalensimulation des Ladungstransports in Silizium-Nanodraht-Transistoren / Multiscale simulations of charge transport in silicon nanowire-based transistorsEckert, Hagen 13 November 2012 (has links) (PDF)
Durch Multiskalensimulationen wird der Ladungstransport in nanodrahtbasierten Schottky-Barrieren-Feldeffekt-Transistoren im Materialsystem Ni2Si/Si untersucht. Die Bedingungen an die Genauigkeit der verwendeten Eingangsparameter werden bestimmt und Vorhersagen über optimale Material- und Geräteparameter werden getroffen. Es wird die Frage beantwortet, ob die Bestimmung von physikalischen Parametern aus einzelnen gemessenen Strom-Spannungs-Kennlinie möglich ist. Der Feldeffekt wird durch Berechnungen auf Basis der Finiten-Elemente-Methode und die resultierenden Stromflüsse durch ein quantenmechanisches Transportmodell ermittelt. In der Untersuchung der geometrischen Eingangsparameter wird gezeigt, dass bis auf den Radius des Nanodrahtes die in einem Experiment zu erwartenden Messfehler keinen drastischen Einfluss auf die Strom-Spannungs-Kennlinie haben. Signifikant ist hingegen der Einfluss der Temperatur, der effektiven Ladungsträgermassen und der Höhe der Schottky-Barriere. Da diese drei Eingangsparameter des betrachteten Systems mit relativ großen Ungenauigkeiten behaftet sind, ist die Bestimmung von physikalischen Parametern aus einzelnen gemessenen Strom-Spannungs-Kennlinien auf die erhoffte Weise nicht möglich. Die Arbeit zeigt auch, dass bereits moderate Veränderungen der Arbeitstemperatur einen bedeutenden Einfluss auf die Strom-Spannungs-Kennlinie haben. Für die Konstruktion von Transistoren mit hoher Stromdichte kann anhand der ermittelten Daten die Verkleinerung der aktiven Region durch Oxidation vorgeschlagen werden. / Charge transport in nanowire-based Schottky-barrier field-effect transistors in the material system Ni2Si/Si is examined by multi-scale simulations. The requirements for the accuracy of the input parameters are determined and predictions about optimum material and device parameters are made. The question is answered, whether the determination of physical parameters from individual measured current-voltage curves is possible? The field effect is described by calculations based on the finite element method and the resulting currents are calculated with a quantum mechanical transport model. In the study of the geometric input parameters it is shown that experimental uncertainties do not drastically affect the current-voltage characteristic, except from the nanowire radius. However, significant is the influence of the temperature, the effective charge carrier mass and the height of the Schottky-barrier. Since these three input parameters are known only with low experimental accuracy for the considered system, the determination of physical parameters from individual measured current-voltage curves is not possible in the expected way. The results also show that moderate changes of the working temperature have a significant influence on the current-voltage characteristic. For the construction of transistors with high current density the reduction of the active region by oxidation is proposed.
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Sub-Threshold Slope Modeling & Gate Alignment Issues In Tunnel Field Effect TransistorRamesha, A 08 1900 (has links)
The Tunnel Field Effect Transistor (TFET) with sub-60mV/decade Sub-threshold slope and extremely high ION/IOFF ratio has attracted enough attention for low standby power (LSTP) applications where the battery life is very important. So far research in this area has been limited to numerical simulation and experimental analysis. It is however extremely necessary to develop compact models for TFET in order to use them in nano-scale integrated circuit design and simulation. In this work, for the first time, we develop analytical Sub-threshold slope model for n-channel double gate TFET (nDGTFET). Unlike conventional FETs, current in TFET is mainly controlled by the band-to-band tunneling mechanism at source/channel interface. As the total drain current is proportional to band-to-band generation rate, the main challenge in the present work is to find an explicit relationship between average electric field over the tunneling path and the applied gate voltage under nonlocal tunneling condition. Two dimensional Poisson’s equation (with Laplace approximation)is first solved in a rectangular coordinate system in order to obtain analytical expression for electron energy distribution over the channel region.Kane’s Model[J. Phy. Chem.Solids 12(181)1959]for band-to-band tunneling along with some analytical approximation techniques are then used to derive the expression for the Sub-threshold slope under nonlocal tunneling conditions. This Sub-threshold slope model is verified against professional numerical device simulator (MEDICI) for different device geometries.
Being an asymmetric device, TFET fabrication suffers from source misalignment with gate. As the doping in source and drain-gate are different, conventional-FET-like self-aligned gate stack formation is not possible for TFET. Such misalignment, at source side, seriously degrades the performance of TFETs. To overcome this problem, in this work we explore the possibility of using “gate replacement” technique for TFET fabrication. We first develop process flow for single gate bulk nTFET, and then we extend it to n-channel double gate TFET (nDGTFET) using modified FinFET process. Good alignments between source and gate are observed with TCAD-simulations in both the cases.
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Studies on the Design of Novel MEMS MicrophonesMalhi, Charanjeet Kaur January 2014 (has links) (PDF)
MEMS microphones have been a research topic for the last two and half decades. The state-of-the-art comprises surface mount MEMS microphones in laptops, mobile phones and tablets, etc. The popularity and the commercial success of MEMS microphones is largely due to the steep cost reduction in manufacturing afforded by the mass scale production with microfabrication technology. The current MEMS microphones are de-signed along the lines of traditional microphones that use capacitive transduction with or without permanent charge (electret type microphones use permanent charge of their sensor element). These microphones offer high sensitivity, stability and reasonably at frequency response while reducing the overall size and energy consumption by exploiting MEMS technology.
Conceptually, microphones are simple transducers that use a membrane or diaphragm as a mechanical structure which deflects elastically in response to the incident acoustic pressure. This dynamic deflection is converted into an electrical signal using an appropriate transduction technique. The most popular transduction technique used for this application is capacitive, where an elastic diaphragm forms one of the two parallel plates of a capacitor, the fixed substrate or the base plate being the other one. Thus, there are basically two main elements in a microphone { the elastic membrane as a mechanical element, and the transduction technique as the electrical element. In this thesis, we propose and study novel design for both these elements. In the mechanical element, we propose a simple topological change by introducing slits in the membrane along its periphery to enhance the mechanical sensitivity. This simple change, however, has significant impact on the microphone design, performance and its eventual cost. Introduction of slits in the membrane makes the geometry of the structural element non-trivial for response analysis. We devote considerable effort in devising appropriate modeling techniques for deriving lumped parameters that are then used for simulating the system response. For transduction, we propose and study an FET (Field Effect Transistor) coupled micro-phone design where the elastic diaphragm is used as the moving (suspended) gate of an FET and the gate deflection modulated drain current is used in the subthreshold regime of operation as the output signal of the microphone. This design is explored in detail with respect to various design parameters in order to enhance the electrical sensitivity. Both proposed changes in the microphone design are motivated by the possibilities that the microfabrication technology offers. In fact, the design proposed here requires further developments in MEMS technology for reliably creating gaps of 50-100 nm between the substrate and a large 2D structure of the order of a few hundred microns in diameter.
In the First part of the thesis, we present detailed simulations of acoustic and squeeze lm domain to understand the effect slits could bring upon the behaviour of the device as a microphone. Since the geometry is nontrivial, we resort to Finite element simulations using commercial packages such as COMSOL Multiphysics and ANSYS in the structural, acoustic and Fluid-structure domains to analyze the behaviour of a microphone which has top plate with nontrivial geometry. On the simulated Finite element data, we conduct low and high frequency limit analysis to extract expressions for the lumped parameters. This technique is well known in acoustics. We borrow this technique of curve Fitting from the acoustics domain and apply it in modified form into the squeeze lm domain. The dynamic behaviour of the entire device is then simulated using the extracted parameters. This helps to simulate the microphone behaviour either as a receiver or as a transmitter.
The designed device is fabricated using MEMSCAP PolyMUMPS process (a foundry Polysilicon surface micromachining process). We conduct vibrometer (electrostatic ex-citation) and acoustic characterization. We also study the feasibility of a microphone with slits and the issues involved. The effect of the two dissipation modes (acoustic and squeeze lm ) are quantified with the experimentally determined quality factor. The experimentally measured values are: Resonance is 488 kHz (experimentally determined), low frequency roll-off is 796 Hz (theoretical value) and is 780 Hz as obtained by electrical characterization.
The first part of this thesis focusses on developing a comprehensive understanding
of the effect of slits on the performance of a MEMS microphone. The presence of slits near the circumference of the clamped plate cause reduction in its rigidity. This leads to an increase in the sensitivity of the device. Slits also cause pressure equalization between the top and bottom of the diaphragm if the incoming sound is at relatively low frequencies. At this frequency, also known as the lower cutoff frequency, the microphone's response starts dropping. The presence of slits also changes the radiation impedance of the plate as well as the squeeze lm damping below the plate. The useful bandwidth of the microphone changes as a consequence. The cavity formed between the top plate and the bottom fixed substrate increases the stiffness of the device significantly due to compression of the trapped air. This effect is more pronounced here because unlike the existing capacitive MEMS microphones, there is no backchamber in the device fabricated here.
In the second part of the thesis, we present a novel subthreshold biased FET based MEMS microphone. This biasing of the transistor in the subthreshold region (also called as the OFF-region) offers higher sensitivity as compared to the above threshold region (also called as the ON-region) biasing. This is due to the exponentially varying current with change in the bias voltage in the OFF-region as compared to the quadratic variation in the ON-region. Detailed simulations are done to predict the behaviour of the device. A lumped parameter model of the mechanical domain is coupled with the drain current equations to predict the device behaviour in response to the deflection of the moving gate. From the simulations, we predict that the proposed biasing offers a device sensitive to even sub-nanometer deflection of the flexible gate. As a proof of concept, we fabricate fixed-fixed beams which utilize CMOS-MEMS fabrication. The process involves six lithography steps which involve two CMOS and the remaining MEMS fabrication. The fabricated beams are mechanically characterized for resonance. Further, we carry out electrical characterization for I-V (current-voltage) characteristics.
The second part of the thesis focusses on a novel biasing method which circumvents the need of signal conditioning circuitry needed in a capacitive based transduction due to inbuilt amplification. Extensive simulations with equivalent circuit has been carried out to determine the increased sensitivity and the role of various design variables.
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Device Structure And Material Exploration For Nanoscale TransistorMajumdar, Kausik 06 1900 (has links) (PDF)
There is a compelling need to explore different material options as well as device structures to facilitate smooth transistor scaling for higher speed, higher density and lower power. The enormous potential of nanoelectronics, and nanotechnology in general, offers us the possibility of designing devices with added functionality. However, at the same time, the new materials come with their own challenges that need to be overcome. In this work, we have addressed some of these challenges in the context of quasi-2D Silicon, III-V semiconductor and graphene.
Bulk Si is the most widely used semiconductor with an indirect bandgap of about 1.1 eV. However, when Si is thinned down to sub-10nm regime, the quasi-2D nature of the system changes the electronic properties of the material significantly due to the strong geometrical confinement. Using a tight-binding study, we show that in addition to the increase in bandgap due to quantization, it is possible to transform the original in direct bandgap to a direct one. The effective masses at different valleys are also shown to vary uniquely in an anisotropic way. This ultra-thin Si, when used as a channel in a double gate MOSFET structure, creates so called “volume in version” which is extensively investigated in this work. It has been found that the both the quantum confinement as well as the gating effect play a significant role in determining the spatial distribution of the charge, which in turn has an important role in the characteristics of transistor.
Compound III-V semiconductors, like Inx Ga1-xAs, provide low effective mass and low density of states. This, when coupled with strong confinement in a nanowire channel transistor, leads to the “Ultimate Quantum Capacitance Limit” (UQCL) regime of operation, where only the lowest subband is occupied. In this regime, the channel capacitance is much smaller than the oxide capacitance and hence dominates in the total gate capacitance. It is found that the gate capacitance change qualitatively in the UQCL regime, allowing multi-peak, non-monotonic capacitance-voltage characteristics. It is also shown that in an ideal condition, UQCL provides improved current saturation, on-off ratio and energy-delay product, but a degraded intrinsic gate delay. UQCL shows better immunity towards series resistance effect due to increased channel resistance, but is more prone to interfacial traps. A careful design can provide a better on-off ratio at a given gate delay in UQCL compared to conventional MOSFET scenario.
To achieve the full advantages of both FinFET and HEMT in III-V domain, a hybrid structure, called “HFinFET” is proposed which provides excellent on performance like HEMT with good gate control like FinFET. During on state, the carriers in the channel are provided using a delta-doped layer(like HEMT) from the top of a fin-like non-planar channel, and during off state, the gates along the side of the fin(like FinFET) help to pull-off the carriers from the channel. Using an effective mass based coupled Poisson-Schrodinger simulation, the proposed structure is found to outperform the state of the art planar and non-planar MOSFETs. By careful optimization of the gate to source-drain underlap, it is shown that the design window of the device can be increased to meet ITRS projections at similar gate length. In addition, the performance degradation of HFinFET in presence of interface traps has been found to be significantly mitigated by tuning the underlap parameter.
Graphene is a popular 2D hexagonal carbon crystal with extraordinary electronic, mechani-cal and chemical properties. However, the zero band gap of grapheme has limited its application in digital electronics. One could create a bandgap in grapheme by making quasi-1D strips, called nanoribbon. However, the bandgap of these nanoribbons depends on the the type of the edge, depending on which, one can obtain either semiconducting or metallic nanoribbon. It has been shown that by the application of an external transverse field along the sides of a nanoribbon, one could not only modulate the magnitude of the bandgap, but also change it from direct to indirect. This could open up interesting possibilities for novel electronic and optoelectronic applications. The asymmetric potential distribution inside the nanoribbon is found to result in such direct to indirect bandgap transition. The corresponding carrier masses are also found to be modulated by the external field, following a transition from a“slow”electron to a“fast” electron and vice-versa.
Experimentally, it is difficult to control the bandgap in nanoribbons as precise edge control at nanometer scale is nontrivial. One could also open a bandgap in a bilayer graphene, by the application of vertical electric field, which has raised a lot of interest for digital applications. Using a self-consistent tight binding theory, it is found that, inspite of this bandgap opening, the intrinsic bias dependent electronic structure and the screening effect limit the subthreshold slope of a metal source drain bilayer grapheme transistor at a relatively higher value-much above the Boltzmann limit. This in turn reduces the on-off ratio of the transistor significantly. To overcome this poor on-off ratio problem, a semiconductor source-drain structure has been proposed, where the minority carrier injection from the drain is largely switched off due to the bandgap of the drain. Using a self-consistent Non-Equilibrium Green’s Function(NEGF) approach, the proposed device is found to be extremely promising providing unipolar grapheme devices with large on-off ratio, improved subthreshold slope and better current saturation.
At high drain bias, the transport properties of grapheme is extremely intriguing with a number of nontrivial effects. Optical phonons in monolayer grapheme couple with carriers in a much stronger way as compared to a bilayer due to selection rules. However, it is difficult to experimentally probe this through transport measurements in substrate supported grapheme as the surface polar phonons with typical low activation energy dominates the total scattering. However, at large drain field, the carriers obtain sufficient energy to interact with the optical phonons, and create so called ‘hot phonons’ which we have experimentally found to result in a negative differential conductance(NDC). The magnitude of this NDC is found to be much stronger in monolayer than in bilayer, which agrees with theoretical calculations. This NDC has also been shown to be compensated by extra minority carrier injection from drain at large bias resulting in an excellent current saturation through a fundamentally different mechanism as compared to velocity saturation. A transport model has been proposed based on the theory, and the experimental observations are found to be in agreement with the model.
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LATERAL AND VERTICAL ORGANIC TRANSISTORSAL-SHADEEDI, AKRAM 21 April 2017 (has links)
No description available.
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Analysis and Optimization of Graphene FET based Nanoelectronic Integrated CircuitsJoshi, Shital 05 1900 (has links)
Like cell to the human body, transistors are the basic building blocks of any electronics circuits. Silicon has been the industries obvious choice for making transistors. Transistors with large size occupy large chip area, consume lots of power and the number of functionalities will be limited due to area constraints. Thus to make the devices smaller, smarter and faster, the transistors are aggressively scaled down in each generation. Moore's law states that the transistors count in any electronic circuits doubles every 18 months. Following this Moore's law, the transistor has already been scaled down to 14 nm. However there are limitations to how much further these transistors can be scaled down. Particularly below 10 nm, these silicon based transistors hit the fundamental limits like loss of gate control, high leakage and various other short channel effects. Thus it is not possible to favor the silicon transistors for future electronics applications. As a result, the research has shifted to new device concepts and device materials alternative to silicon.
Carbon is the next abundant element found in the Earth and one of such carbon based nanomaterial is graphene. Graphene when extracted from Graphite, the same material used as the lid in pencil, have a tremendous potential to take future electronics devices to new heights in terms of size, cost and efficiency. Thus after its first experimental discovery of graphene in 2004, graphene has been the leading research area for both academics as well as industries. This dissertation is focused on the analysis and optimization of graphene based circuits for future electronics.
The first part of this dissertation considers graphene based transistors for analog/radio frequency (RF) circuits. In this section, a dual gate Graphene Field Effect Transistor (GFET) is considered to build the case study circuits like voltage controlled oscillator (VCO) and low noise amplifier (LNA). The behavioral model of the transistor is modeled in different tools: well accepted EDA (electronic design automation) and a non-EDA based tool i.e. \simscape. This section of the dissertation addresses the application of non-EDA based concepts for the analysis of new device concepts, taking LC-VCO and LNA as a case study circuits. The non-EDA based approach is very handy for a new device material when the concept is not matured and the model files are not readily available from the fab. The results matches very well with that of the EDA tools. The second part of the section considers application of multiswarm optimization (MSO) in an EDA tool to explore the design space for the design of LC-VCO. The VCO provides an oscillation frequency at 2.85 GHz, with phase noise of less than -80 dBc/Hz and power dissipation less than 16 mW. The second part of this dissertation considers graphene nanotube field effect transistors (GNRFET) for the application of digital domain. As a case study, static random access memory (SRAM) hs been design and the results shows a very promising future for GNRFET based SRAM as compared to silicon based transistor SRAM. The power comparison between the two shows that GNRFET based SRAM are 93% more power efficient than the silicon transistor based SRAM at 45 nm.
In summary, the dissertation is to expected to aid the state of the art in following ways:
1) A non-EDA based tool has been used to characterize the device and measure the circuit performance. The results well matches to that obtained from the EDA tools. This tool becomes very handy for new device concepts when the simulation needs to be fast and accuracy can be tradeoff with.
2)Since an analog domain lacks well-design design paradigm, as compared to digital domain, this dissertation considers case study circuits to design the circuits and apply optimization.
3) Performance comparison of GNRFET based SRAM to the conventional silicon based SRAM shows that with maturation of the fabrication technology, graphene can be very useful for digital circuits as well.
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ACENES, HETEROACENES AND ANALOGOUS MOLECULES FOR ORGANIC PHOTOVOLTAIC AND FIELD EFFECT TRANSISTOR APPLICATIONSGranger, Devin B. 01 January 2017 (has links)
Polycyclic aromatic hydrocarbons composed of benzenoid rings fused in a linear fashion comprise the class of compounds known as acenes. The structures containing three to six ring fusions are brightly colored and possess band gaps and charge transport efficiencies sufficient for semiconductor applications. These molecules have been investigated throughout the past several decades to assess their optoelectronic properties. The absorption, emission and charge transport properties of this series of molecules has been studied extensively to elucidate structure-property relationships. A wide variety of analogous molecules, incorporating heterocycles in place of benzenoid rings, demonstrate similar properties to the parent compounds and have likewise been investigated.
Functionalization of acene compounds by placement of groups around the molecule affects the way in which molecules interact in the solid state, in addition to the energetics of the molecule. The use of electron donating or electron withdrawing groups affects the frontier molecular orbitals and thus affects the optical and electronic gaps of the molecules. The use of bulky side groups such as alkylsilylethynyl groups allows for crystal engineering of molecular aggregates, and changing the volume and dimensions of the alkylsilyl groups affects the intermolecular interactions and thus changes the packing motif.
In chapter 2, a series of tetracene and pentacene molecules with strongly electron withdrawing groups is described. The investigation focuses on the change in energetics of the frontier molecular orbitals between the base acene and the nitrile and dicyanovinyl derivatives as well as the differences between the pentacene and tetracene molecules. The differences in close packing motifs through use of bulky alkylsilylethynyl groups is also discussed in relation to electron acceptor material design and bulk heterojunction organic photovoltaic characteristics.
Chapter 3 focuses on molecular acceptor and donor molecules for bulk heterojunction organic photovoltaics based on anthrathiophene and benzo[1,2-b:4,5-b’]dithiophene central units like literature molecules containing fluorene and dithieno[2,3-b:2’,3’-d]silole cores. The synthetic strategies of developing reduced symmetry benzo[1,2-b:4,5-b’]dithiophene to study the effect of substitution around the central unit is also described. The optical and electronic properties of the donors and acceptors are described along with the performance and characteristics of devices employing these molecules.
The final two data chapters focus on new nitrogen containing polycyclic hydrocarbons containing indolizine and (2.2.2) cyclazine units. The optical, electronic and other physical properties of these molecules are explored, in addition to the synthetic strategies for incorporating the indolizine and cyclazine units. By use of alkylsilylethynyl groups, crystal engineering was investigated for the benzo[2,3-b:5,6-b’]diindolizine chromophore described in chapter 4 to target the 2-D “brick-work” packing motif for application in field effect transistor devices. Optical and electronic properties of the cyclazine end-capped acene molecules described in chapter 5 were investigated and described in relation to the base acene molecules. In both cases, density functional theory calculations were conducted to better understand unexpected optical properties of these molecules, which are like the linear acene series despite the non-linear attachment.
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