This work provides overview of creating of a simple driver for the BIOS flash memory by accessing the physical computer memory. Although, the BIOS is one of a system's core components, there is no standardized update mechanism approach. Purpose of thesis is to create module driver by taking advantage of existing interface subsystem MTD, to suggest and implement driver for one specific device to Linux kernel operating system. Also explains technique allowing write access to registers of the flash memory with utilization of configuration file.

With the development of advanced driving assistance systems, the amount of data that needs to be transmitted within a car has increased tremendously. Traditional communication bus based systems are unable to meet today’s requirements; hence automotive Ethernet is being developed and standardized. Ethernet has for many years been the de facto standard in interconnecting computers. In that time several vulnerabilities of the networking protocol stack implementations and even the protocols themselves have been discovered. The knowledge from exploiting computer networks can be applied to the automotive domain. Additionally, vehicle manufacturers tend to implement their own stacks, due to copyleft reasons; hence the chances of implementation faults increases as opposed to using well-tested open source solutions. Since the line between security and safety in cars is almost nonexistent, security has to be properly addressed. This thesis investigates the security of automotive Ethernet and its accompanying protocols. It starts with an introduction to computer and automotive networking and protocols. After a solid foundation is laid, it investigates what makes up automotive Ethernet, its application in the field, and the automotive specific components relying on it. After looking at related work, a data network security audit and analysis as defined by the open-source security testing methodology is performed. The system is graded with risk assessment values. Weak points are identified and improvements suggested. The impact of the proposed improvements is shown by reevaluating the system and recalculating the risk assessment values. These efforts further the ultimate goal of achieving increased safety of all traffic participants. / Med utvecklingen av avancerade körningsassisterande system har mängden data som behöver sändas inom en bil ökat enormt. Traditionella kommunikationsbussbaserade system kan inte uppfylla dagens krav. Därmed utvecklas och standardiseras Ethernet för fordon. Ethernet har i många år varit de facto-standarden i sammankopplandet mellan datorer. Under den tiden har flera sårbarheter hos nätverksprotokolls implementeringar och protokoll själva upptäckts. Det finns anledning att tro att kunskapen från att utnyttja datanätverk kan tillämpas på fordonsdomänen. Att tillägga är att fordonstillverkare tenderar att genomföra sina egna staplar. På grund av copyleft skäl, ökar chanserna för implementeringsfel i motsats till att använda testade open source-lösningar. Eftersom människors säkerhet hos bilar är extremt viktigt, måste även dess system hanteras ordentligt. Denna avhandling undersöker säkerheten för Ethernet och kompletterande protokoll hos bilar. Den börjar med en introduktion till datorers och bilars nätverk och protokoll. Efter en stabil grund fastställts, undersöker den vad som utgör Ethernet hos bilar, dess tillämpning inom fältet, och de bilspecifika komponenterna den beror av. Efter att ha tittat på relaterat arbete utförs en säkerhetsgranskning och analys av datanätverk som definieras av säkerhetsmetoden för open-source. Systemet värderas med riskbedömningsvärden. Svaga punkter identifieras och förbättringar föreslås. Effekten av de föreslagna förbättringarna framgår utav omvärdering av systemet och omräkning av riskbedömningsvärdena. Dessa bedömningar leder till det yttersta målet för ökad säkerhet för alla trafikanter.

Device Firmware Upgrade (DFU) is now widely used on PC and smartphones for users to enjoy the latest applications. The project is derived from the new device of Yohoo and the firmware embedded in the system. This system can guide users on how to breathe through multiple sensory effects to reduce the harm from excessive stress. In order to be applied by different people, some breathing courses and personal settings will be used in the system, which makes the upgrade of the internal firmware of the device more important. However, the firmware upgrade for some embedded devices is not as rapid and convenient as PC and smartphones, which is still erasing and then programming the whole storage. This is a waste of time and meaningless wear to the entire device. In order to solve this problem and improve the efficiency of the firmware upgrade, the partial firmware upgrade is proposed in this project, and the storage method of new codes is improved to get better performance during the partial DFU process. The idea of wear leveling is introduced to extend the lifetime of the internal storage. As a result, the partial firmware upgrade feature was successfully designed and implemented, and integrated and tested on new devices. At the end of this work, the prototype system of the embedded software based on the nRF52832 microcontroller has basically been designed, improved and tested, and some functions which need to be updated instead of the whole firmware can be transmitted via Bluetooth and work normally. For the specific case of partial DFU, the firmware package size that maximizes the update efficiency is obtained through testing. In addition, the flash module in the chip has been divided into multiple portions for the update. The wear-leveling method ensures that when a certain function is updated multiple times, one certain part of the flash will not be overused, but the entire block will be used uniformly to alleviate the adverse effects of data abnormality or loss caused by damaged bits of the flash memory. In addition, the lifetime of the flash memory is prolonged and the industrial waste is reduced at the same time. / Device Firmware Upgrade (DFU) används nu allmänt på PC och smartphones för att användare ska kunna njuta av de senaste applikationerna. Projektet kommer från den nya enheten till Yohoo och den inbyggda programvaran i systemet. Detta system kan vägleda användare om hur man kan andas genom flera sensoriska effekter för att minska skadan från för hög stress. För att kunna tillämpas av olika personer kommer vissa andningskurser och personliga inställningar att användas i systemet, vilket gör uppgraderingen av enhetens interna firmware viktigare. Firmwareuppgraderingen för inbäddade enheter är dock inte lika snabb och bekväm som PC och smartphones, som fortfarande raderar och sedan programmerar hela lagringsutrymmet. Detta är slöseri med tid och meningslöst slitage på hela enheten. För att lösa detta problem och förbättra effektiviteten för uppgradering av firmware föreslås partiell uppgradering av firmware i detta projekt, och lagringsmetoden för nya koder förbättras för att få bättre prestanda under den partiella DFU-processen. Idén om slitstyrning införs för att förlänga livslängden för den interna lagringen. Som ett resultat designades och implementerades delvist firmware uppgraderings funktionen och integrerades och testades på nya enheter. I slutet av detta arbete har prototypsystemet för den inbäddade programvaran baserat på mikrokontrollern nRF52832 i princip utformats, förbättrats och testats, och vissa funktioner som måste uppdateras istället för hela firmware kan överföras via Bluetooth och fungera normalt. För det specifika fallet med delvis uppgradering erhålls firmwarepaketets storlek som maximerar uppdateringseffektiviteten genom testning. Dessutom har flashmodulen i chipet delats upp i flera delar för uppdateringen. Slitstyrningsmetoden gör att när en viss funktion uppdateras flera gånger kommer en viss del av blixt inte att överanvändas, men hela blocket kommer att användas enhetligt för att lindra de negativa effekterna av data i normalitet eller förlust orsakat av skadade bitar av flashminnet. Dessutom förlängs flashminnets livstid teoretiskt och industriavfallet minskas samtidigt.

High speed analog-to-digital converters (ADCs) used in, e.g., read channel and ultra wideband (UWB) applications are often based on a flash topology. The read channel applications is the intended application of this work, where a part of the work covers the design of two different types of 6-bit flash ADCs. Another field of application is UWB receivers. To optimize the performance of the whole system and derive the specifications for the sub-blocks of the system it is often desired to use a topdown design methodology. To facilitate the top-down design methodology the ADCs are modeled on behavioral level. The models are simulated in MATLAB®. The results are used to verify the functionality of the proposed circuit topologies and serve as a base to the circuit design phase. The first flash ADC has a conventional topology. It has a resistor net connected to a number of latched comparators, but its thermometer-tobinary encoder is based on 2-to-1 multiplexers buffered with inverters. This gives a compact encoder with a regular structure and short critical path. The main disadvantage is the code dependent timing difference between the encoder outputs introduced by this topology. The ADC was simulated on schematic level in Cadence® using the foundry provided transistor models. The design obtained a maximum sampling frequency of 1 GHz, an effective resolution bandwidth of 390 MHz, and a power consumption of 170 mW. The purpose of the second ADC is to demonstrate the concept of introducing dynamic element matching (DEM) into the reference net of a flash ADC. This design yields information about the performance improvements the DEM gives, and what the trade-offs are when introducing DEM. Behavioral level simulations indicate that the SFDR is improved by 11 dB when introducing DEM, but the settling time of the reference net with DEM will now limit the conversion speed of the converter. Further, the maximum input frequency is limited by the total resistance in the reference net, which gets increased in this topology. The total resistance is the total switch on-resistance plus the total resistance of the resistors. To increase the conversion speed and the maximum input frequency a new DEM topology is proposed in this work, which reduces the number of switches introduced into the reference net compared with earlier proposed DEM topologies. The transistor level simulations in Cadence® of the flash ADC with DEM indicates that the SFDR improves by 6 dB compared with when not using DEM, and is expected to improve more if more samples are used in the simulation. This was not possible in the current simulations due to the long simulation time. The improved SFDR is however traded for an increased chip area and a reduction of the maximum sampling frequency to 550 MHzfor this converter. The average power consumption is 92 mW. A goal of this work is to evaluate a 130 nm partially depleted silicon-oninsulator (SOI) complementary metal oxide semiconductor (CMOS) technology with respect to analog circuit implementation. The converters are therefore implemented in this technology. When writing this the ADCs are still being manufactured. Since the technology evaluation will be based on the measurement results the final results of the evaluation are not included in this thesis. The conclusions regarding the SOI CMOS technology are therefore based on a literature study of published scientific papers in the SOI area, information extracted during the design phase of the ADCs, and from the transistor level circuit simulations. These inputs indicate that to fully utilize the potential performance advantages of the SOI CMOS technology the partially depleted SOI CMOS technology should be exchanged for a fully depleted SOI CMOS technology. The manufacturing difficulties regarding the control of the thin-film thickness must however first be solved before the exchange can be done. / <p>Report code: LiU-Tek-Lic-2005:68.</p>

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Šiame baigiamajame magistro darbe tiriama R65 tipo bėgio kontaktinio suvirinimo jungtis. Supažindinama su pagrindiniais mokslininkų parašytais straipsniais, bėgių kontaktinio suvirinimo tematika. Pateikiama tyrimų metodika, kurią sudaro šios dalys: apžiūrimasis paviršiaus tyrimas, ultragarsinės kontrolės tyrimas, važiuojamasis paviršiaus kiečio bandymas, sulydimo zonos nustatymas, termiškai suminkštintos zonos kiečio matavimas, mikrokietumo matavimas, mikroskopinis jungties matomosios terminio poveikio ir sulydymo zonų tyrimas, smūginio tąsumo bandymas, cheminė analizė, aširačio bandažo ir bėgio sąveikos tyrimas baigtinių elementų metodu (BEM). Išanalizuoti gauti tyrimo rezultatai, kurie įvertina suvirinimo siūlės kokybę. Pateiktos tiriamojo darbo išvados. / In the final thesis of masters degree I analyze the R65 type rail joint that were welded flash butt. Introducing with scientific articles about flash butt welding of rails. Survey methodology of the research, which consists of the following parts: visual surface review of welded joint, ultrasonic rail inspection, hardness test of upper part of the rail, fusion area research, the measurement test hardness of heat-softened area, the measurement test microhardness, microstructure research of the welded joint, impact strenght experiments, chemical analysis of welded joint, wheel-rail interaction research of the finite element method (FEM). Analyzes the results of the research, who assess the quality of weld. The conclusion is based on the results of this research.

Arc Flash events occur due to faults in electrical equipment combined with a significant release of energy across an electrical arc. Due to the large energy release, plasma is generated, pressures increase, and the plasma expands. Under these conditions the plasma becomes excited enough to liquefy metal causing physical damage to equipment and any humans in the vicinity. This thesis investigates the state of art for detection of arc flash events and investigates a method of improving detection reliability, and speed by monitoring the high frequency voltage / current patterns utilizing methods similar to arc flash circuit interrupters (AFCI). A second alternative detection approach is determined through analysis of the physics of plasma development. The current state of art is based upon light detection. However this thesis experimentally investigates what happens before the arc event emits visible light. The results show that current flows to ground during an arc event slightly prior to the production of light. Further it shows through analysis of the physics of plasma that a high speed plasma detector has the potential to identify an arc event before the presence of visible light. Through the design and construction of experimental test setups, and physics analysis, this thesis provides new paths for detecting arc events that present opportunities to improve detection time.

Analog-to-Digital Converters (ADCs) can be classified into two categories namely Nyquist-rate ADCs and OversampledADCs. Nyquist-rate ADCs can process very high bandwidths while Oversampling ADCs provide high resolution using coarse quantizers and support lower input signal bandwidths. This work describes a Reconfigurable ADC (R-ADC) architecture which models 14 different ADCs utilizing four four-bit flash ADCs and four Reconfigurable Blocks (RBs). Both Nyquist-rate and Oversampled ADCs are included in the reconfiguration scheme. The R-ADC supports first- and second-order Sigma-Delta (ΣΔ) ADCs. Cascaded ΣΔ ADCs which provide high resolution while avoiding the stability issues related to higher order ΣΔ loops are also included. Among the Nyquist-rate ADCs, pipelined and time interleaved ADCs are modeled. A four-bit flash ADC with calibration is used as the basic building block for all ADC configurations. The R-ADC needs to support very high sampling rates (1 GHz to 2 GHz). Hence switched-capacitor (SC) based circuits are used for realizing the loop filters in the ΣΔ ADCs. The pipelined ADCs also utilize an SC based block called Multiplying Digital-to-Analog Converter (MDAC). By analyzing the similarities in structure and function of the loop filter and MDAC, a RB has been designed which can accomplish the function of either block based on the selected configuration. Utilizing the same block for various configurations reduces power and area requirements for the R-ADC. In SC based circuits, the minimum sampling capacitance is limited by the thermal noise that can be tolerated in order to achieve a specific ENOB. The thermal noise in a ΣΔ ADC is subjected to noise shaping. This results in reduced thermal noise levels at the inputs of successive loop filters in cascaded or multi-order ΣΔ ADCs. This property can be used to reduce the sampling capacitance of successive stages in cascaded and multi-order ΣΔ ADCs. In pipelined ADCs, the thermal noise in successive stages are reduced due to the inter-stage gain of the MDAC in each stage. Hence scaling of sampling capacitors can be applied along the pipeline stages. The RB utilizes the scaling of capacitor values afforded by the noise shaping property of ΣΔ loops and the inter-stage gain of stages in pipelined ADCs to reduce the total capacitance requirement for the specified Effective Number Of Bits (ENOB). The critical component of the RB is the operational amplifier (opamp). The speed of operation and ENOB for different configurations are determined by the 3 dB frequency and DC gain of the opamp. In order to find the specifications of the opamp, the errors introduced in ΣΔ and pipelined ADCs by the finite gain and bandwidth of the opamp were modeled in Matlab.The gain and bandwidth requirements for the opamp were derived from the simulation results. Unlike Nyquist-rate ADCs, the ΣΔ ADCs suffer from stability issues when the input exceeds a certain level. The maximum usable input level is determined by the resolution of the quantizer and the order of the loop filter in the ΣΔADC. Using Matlab models, the maximum value of input for different oversampling ADC configurations in the R-ADC were found. The results obtained from simulation are comparable to the theoretical values. The cascaded ADCs require digital filter functions which enable the cancellation of quantization noise from certain stages. These functions were implemented in Matlab. For the R-ADC, these filter functions need to run at very high sampling rates. The ΣΔ loop filter transfer functions were chosen such that their coefficients are powers of two, which would allow them to be implemented as shift and add operations instead of multiplications. The R-ADC configurations were simulated in Matlab. A schematic for the R-ADC was developed in Cadence using ideal switches and a finite gain, single-pole operational transconductance amplifier model. The ADC configuration was selected by four external bits. Performance parameters such as SNR, SNDR and SFDR obtained from simulations in Cadence agree with those from Matlab for all ADC configurations.

The design and optimisation of a modern gasoline direct injection (GDI) engine requires a thorough understanding of the fuel sprays characteristics and atomisation process.Therefore this thesis presents a detailed optical analysis of atomisation, penetration and interaction of multi-stream GDI sprays under engine relevant pressures and temperatures. The characteristics of the fuel spray in a GDI engine have a great influence on the fuel-air mixing and combustion processes as fuel injectors must provide adequate atomisation for vaporisation of the fuel to take place before combustion is initiated, whilst also avoiding spray impingement on the cylinder walls or piston crown. In this study multi-stream injectors, to be used within GDI engines, are quantified using Laser Doppler Anemometry (LDA) on an atmospheric bench. This process allowed for highly detailed spray analysis of droplet velocities and diameter at precise locations, using a three dimensional traverse, within the injector spray. The aim of the study was to analyse plume interaction between separate plumes of multi-stream injectors. Three multi-stream injectors were subjected to testing; two six-hole injectors and one three-hole injector. The injectors differed by having different distances between the plumes. The effect of fuel type on the liquid break-up and atomisation was investigated using Phase Doppler Anemometry (PDA) and Mie imaging. Mie imaging was also performed to capture images of fuel from a multi-stream injector as it was sprayed into a pressure chamber which was used to recreate the conditions found in an engine likely to cause flash boiling. In total, five variables were investigated: fuel pressure, ambient pressure, ambient temperature, fuel composition and injector geometry. Once processed, the recorded images allowed measurement of spray tip penetration and cone angle. Qualitative data on the change in shape of the spray was also available. The results showed that flash boiling has potential to reduce droplet diameters and improve fuel vaporisation, however, the associated change in spray shape must be taken into account to avoid problems with spray impingement. Keywords: Gasoline Direct Injection, multi-stream injector, atomisation, penetration, cone angle, Mie imaging, Phase Doppler Anemometry, flash boiling.