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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
411

FPGA prototyping of custom GPGPUs

Nigania, Nimit 08 January 2014 (has links)
Prototyping new systems on hardware is a time-consuming task with limited scope for architectural exploration. The aim of this work was to perform fast prototyping of general-purpose graphics processing units (GPGPUs) on field programmable gate arrays (FPGAs) using a novel tool chain. This hardware flow combined with the higher level simulation flow using the same source code allowed us to create a whole tool chain to study and build future architectures using new technologies. It also gave us enough flexibility at different granularities to make architectural decisions. We will also discuss some example systems that were built using this tool chain along with some results.
412

Charge-based analog circuits for reconfigurable smart sensory systems

Peng, Sheng-Yu 02 July 2008 (has links)
The notion of designing circuits based on charge sensing, charge adaptation, and charge programming is explored in this research. This design concept leads to a low-power capacitive sensing interface circuit that has been designed and tested with a MEMS microphone and a capacitive micromachined ultrasonic transducer. Moreover, by using the charge programming technique, a designed floating-gate based large-scale field-programmable analog array (FPAA) containing a universal sensor interface sets the stage for reconfigurable smart sensory systems. Based on the same charge programming technique, a compact programmable analog radial-basis-function (RBF) based classifier and a resultant analog vector quantizer have been developed and tested. Measurement results have shown that the analog RBF-based classifier is at least two orders of magnitude more power-efficient than an equivalent digital processor. Furthermore, an adaptive bump circuit that can facilitate unsupervised learning in the analog domain has also been proposed. A projection neural network for a support vector machine, a powerful and more complicated binary classification algorithm, has also been proposed. This neural network is suitable for analog VLSI implementation and has been simulated and verified on the transistor level. These analog classifiers can be integrated at the interface to build smart sensory systems.
413

Fabrication, characterization, and modeling of metallic source/drain MOSFETs

Gudmundsson, Valur January 2011 (has links)
As scaling of CMOS technology continues, the control of parasitic source/drain (S/D) resistance (RSD) is becoming increasingly challenging. In order to control RSD, metallic source/drain MOSFETs have attracted significant attention, due to their low resistivity, abrupt junction and low temperature processing (≤700 °C). A key issue is reducing the contact resistance between metal and channel, since small Schottky barrier height (SBH) is needed to outperform doped S/D devices. A promising method to decrease the effective barrier height is dopant segregation (DS). In this work several relevant aspects of Schottky barrier (SB) contacts are investigated, both by simulation and experiment, with the goal of improving performance and understanding of SB-MOSFET technology:First, measurements of low contact resistivity are challenging, since systematic error correction is needed for extraction. In this thesis, a method is presented to determine the accuracy of extracted contact resistivity due to propagation of random measurement error.Second, using Schottky diodes, the effect of dopant segregation of beryllium (Be), bismuth (Bi), and tellurium (Te) on the SBH of NiSi is demonstrated. Further study of Be is used to analyze the mechanism of Schottky barrier lowering.Third, in order to fabricate short gate length MOSFETs, the sidewall transfer lithography process was optimized for achieving low sidewall roughness lines down to 15 nm. Ultra-thin-body (UTB) and tri-gate SB-MOSFET using PtSi S/D and As DS were demonstrated. A simulation study was conducted showing DS can be modeled by a combination of barrier lowering and doped Si extension.Finally, a new Schottky contact model was implemented in a multi-subband Monte Carlo simulator for the first time, and was used to compare doped-S/D to SB-S/D for a 17 nm gate length double gate MOSFET. The results show that a barrier of ≤ 0.15 eV is needed to comply with the specifications given by the International Technology Roadmap for Semiconductors (ITRS). / QC 20111206
414

Cryptography and cryptanalysis on reconfigurable devices security implementations for hardware and reprogrammable devices

Güneysu, Tim Erhan January 2009 (has links)
Zugl.: Bochum, Univ., Diss., 2009
415

Uma plataforma de hardware para processamento de imagem baseada na transformada imagem-floresta

Cappabianco, Fabio Augusto Menocci 15 February 2006 (has links)
Orientadores: Guido Costa Souza de Araujo, Alexandre Xavier Falcão / Dissertação (mestrado) - Universidade Estadual de Campinas, Instituto de Computação / Made available in DSpace on 2018-08-07T09:45:52Z (GMT). No. of bitstreams: 1 Cappabianco_FabioAugustoMenocci_M.pdf: 2472578 bytes, checksum: 8df546b29eccff4337413df4b5d9a7c3 (MD5) Previous issue date: 2006 / Resumo: Implementações de operadores de processamento de imagens em plataformas de hardware têm obtido ótimos resultados devido a sua atuação paralela em diversas regiões da imagem. Ao mesmo tempo, a IFT (Image Foresting Transform) tem provado ser uma técnica eficiente de reduzir problemas de processamento de imagens em um problema de floresta de caminhos de um grafo, cuja solução é obtida em tempo linear no o número de pixels. Este trabalho contém a implementação de uma plataforma, em hardware, chamada SIFT {Silicon Image Foresting Transform), que executa o algoritmo da IFT paralelamente. O modelo de processamento e armazenamento SIFT serve como base para outras arquiteturas de processamento de imagens e amplia o entendimento de alguns conceitos de mapas de predecessores e rótulos utilizados pela IFT. / Abstract: Great results had been achieved by the use of hardware platforms to implement image processing operators. This success was reached due to the use of multiple processors working parallel in several regions of the image. On the other hand, IFT (Image Foresting Transform), a software technique to reduce image processing problems into a graph path forest problem, performs image operations in linear time in the number of pixels in most of applications. The main goal of this work was to generate a hardware platform, that implements the an algorithm based on the IFT in a fast and efficient way. / Mestrado / Mestre em Ciência da Computação
416

Implementação de codificador LDPC para um sistema de TV digital usando ferramentas de prototipagem rapida / Implementation of an LDPC encoder for a digital TV system using rapid protoyping tools

Garcia, Fábio Lumertz, 1979- 21 December 2006 (has links)
Orientadores: Dalton Soares Arantes, Fabbryccio A. Cardoso / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação / Made available in DSpace on 2018-08-08T03:13:26Z (GMT). No. of bitstreams: 1 Garcia_FabioLumertz_M.pdf: 3287022 bytes, checksum: 7cf0e283ddc5a0d2f929f3cc22b17903 (MD5) Previous issue date: 2006 / Resumo: O objetivo deste trabalho é apresentar as diversas etapas de implementação de um codificador LDPC para um sistema de televisão digital, desenvolvido através do emprego de algumas tecnologias inovadoras de prototipagem rápida em FPGA. O codificador implementado foi baseado em um código LDPC eIRA, que consiste em uma classe estendida de códigos de repetição e acumulação irregulares, com palavra-código de 9792 bits e taxa de 3/4. Visando agregar outras tecnologias emergentes ao projeto de TV Digital, o sistema proposto foi desenvolvido para operar sobre o Protocolo de Internet - IP. Os esforços para a realização deste trabalho fizeram parte de um esforço mais amplo de um consórcio de universidades brasileiras, visando à concepção, ao projeto, à simulação e à implementação em hardware de um Sistema de Modulação Inovadora para o SBTVD. A grande sinergia obtida neste projeto e o uso intensivo de ferramentas de prototipagem rápida em FPGA possibilitaram a obtenção de uma prova de conceito implementada e testada em um prazo de apenas 12 meses / Abstract: This work presents the several phases in the implementation of an LDPC encoder for a digital television system, developed using innovative technologies for rapid prototyping on Field Programmable Gate Array devices - FPGAs. The implemented encoder was based on an eIRA - extended Irregular Repeat Accumulate - LDPC code with codeword-Iength equal to 9792 bits and rate 3/4. The proposed system was developed to work with video streaming over the Internet Protocol- IP. This work is part of a more ambitious project that resulted in the development of an advanced Modulation System for the Brazilian Digital TV System - BTVD / Mestrado / Telecomunicações e Telemática / Mestre em Engenharia Elétrica
417

Mesure de la dose physique par lms radiochromiques et simulation Monte Carlo pour l'hadronthérapie / Dose measurement using radiochromic lms and Monte Carlo simulation for hadrontherapy

Zahra, Nabil 25 June 2010 (has links)
En raison des forts gradients de dose générés par les interactions des particules avec la matière, les traitements par hadronthérapie nécessitent un contrôle très précis de la dose délivrée au patient. Les codes Monte Carlo représentent des outils indispensables dans la validation des systèmes de planification de traitement utilisé en clinique. Nous nous intéressons dans cette thèse au calcul de la dose physique à l'aide des simulations Monte Carlo Geant4/Gate. Nous étudions l'ajustement de plusieurs paramètres qui peuvent influencer la précision du calcul de dose requise en clinique (2%, 2mm) pour un faisceau d'ions carbone de 300 MeV/u dans l'eau. Ces paramètres sont : le seuil de production des particules secondaires et la taille maximale d'un segment de la trace de particule. Les critères de tolérance sur la valeur et la localisation de la dose sont fixés de manière à avoir le meilleur compromis en termes de distribution spatiale et de temps de calcul. Nous proposons ici des paramètres permettant d'atteindre ces critères de précision. Dans la deuxième partie du travail, nous étudions la réponse des films radiochromiques MDv2-55 pour le contrôle qualité des faisceaux d'ions carbone et protons. Nous avons en particulier observé et étudié l'effet de saturation de ces films dosimétriques pour les irradiations à TEL élevés (≥ 20 KeV/µm) dans des milieux homogènes et hétérogènes. Cet effet est dû à la forte densité d'ionisation autour de la trace de particule. Nous avons proposé et développé un modèle appelé « RADIS RAdiochromic films Dosimetry for Ions using Simulations » qui permet de prédire la réponse de ces films avec la prise en compte de cet effet de saturation. Ce modèle est basé sur la réponse des films en photons et la saturation des films à des dépôts d'énergies linéïques élevés calculée par Monte Carlo. Plusieurs types de faisceaux ont été étudiés : ions carbone, protons et photons à différentes énergies. Ces expérimentations ont été menées au Grand Accélérateur National d'Ions Lourds (GANIL), au Centre de protonthérapie d'Orsay (CPO), au Centre A. Lacassagne (CAL) et au Centre Léon Bérard (CLB). A l'aide du modèle, nous pouvons ainsi reproduire la densité optique des films le long du profil de Bragg pour tous les faisceaux avec une précision meilleure que 2%. / Because of the increase in dose at the end of the range of ions, dose delivery during patient treatment with hadrontherapy should be controlled with high precision. Monte Carlo codes are now considered mandatory for validation of clinical treatment planing and as a new tool for dosimetry of ion beams. In this work, we aimed to calculate the absorbed dose using Monte Carlo simulation Geant4/Gate. The ejffect on the dose calculation accuracy of dierent Geant4 parameters has been studied for mono-energetic carbon ion beams of 300 MeV/u in water. The parameters are : the production threshold of secandary particules and the maximum step limiter of the particle track. Tolerated criterion were choosen to meet the precision required in radiotherapy (2%, 2mm) and to obtain the best compromise on dose distribution and computational time.We propose here the values of parameters in order to satisfy the precision required. In the second part of this work, we will study the response of radiochromic lms MD-v2-55 for quality control in proton and carbon ion beams. We have particularly observed and studie the quenching effect of dosimetric lms for high LET (20 KeV/m) irradiations in homogeneous and heterogeneous medium. This eject is due to the high ionization density around the track of the particule. We have developped a method to predict the response of radiochromic lms taking into account the saturation effect. This model is called the RADIS model forRAdiochromic films. Dosimetry for Ions using Simulations". It is based on the response of lms under photon irradiations and the saturation of lms due to high linear energy deposit calculated by Monte Carlo. Four beams were used in this study and aimed to validate the model for hadrontherapy applications : carbon ions, protons and photons at different energies. Experiments were performed at Grand Accélérateur National d'Ions Lourds (GANIL), Proton therpay center of Orsay (CPO), A. Lacassagne proton center (CAL) and Leon Berard cancer center (CLB). The model showed very good agreement between the measured and calculated optical density with an error less than 2%.
418

Modélisation de transistors en couches minces (TFT) fabriqués en technologie silicium microcristallin très basse température / Modeling of thin film transistors (TFT) based on microcrystalline silicon fabricated at low temperature

Samb, Mamadou Lamine 15 December 2014 (has links)
Cette thèse porte sur la modélisation de TFTs à base de silicium microcristallin fabriqués à basse température. L'enjeu est de produire un modèle de TFT valide qui nous permettra d'apporter des explications sur les phénomènes observés expérimentalement et qui pourrait servir de base à un modèle compact. Tout d'abord, une étude expérimentale, dans laquelle il est montré l'effet bénéfique de l'utilisation de fines couches actives pour les TFTs, a été effectuée. En effet, plus la couche active des TFTs est fine, plus les TFTs sont stables, et meilleures sont leurs caractéristiques électriques. La croissance colonnaire de la structure du silicium microcristallin et le mauvais état de surface pour les grandes épaisseurs de couche active jouent un rôle important sur la détérioration de la qualité des TFTs. Par la suite, une simulation (sous SILVACO) du comportement des TFTs ayant des couches actives de différentes épaisseurs a été effectuée, pour essayer d'apporter des explications d'ordre électrostatique. Les mêmes effets observés sont surtout causés par une augmentation du champ électrique latéral lorsque l'épaisseur de la couche active diminue pour un matériau défectueux, favorisant ainsi la formation rapide du canal. La mauvaise qualité des interfaces avant et arrière a aussi une forte influence sur la détérioration des caractéristiques électriques de TFTs. Cette influence est réduite en utilisant une très fine couche active. / This thesis focuses on the modeling of TFTs based on microcrystalline silicon fabricated at low temperature. The challenge is to produce a valid model of TFT which enable us to provide an explanation of the phenomena observed experimentally and that could be the basis for a compact model. Firstly, an experimental study, in which it is shown the beneficial effect for the use of thin active layers for TFTs, has been performed. Indeed, the TFTs performances are better, when their active layers are more thin. The columnar growth of microcrystalline silicon structure and the bad interfaces state for thick active layer have an important part in the deterioration of the quality of TFTs. Thereafter , a simulation (on SILVACO ) of the behavior of TFTs with active layers of different thicknesses were made to try to provide electrostatic explanations. The same effects are caused mainly by an increase of the lateral electric field when the thickness of the active layer decreases for a defective material, promoting thereby the rapid formation of the channel. The bad quality of the front and rear interfaces has also a strong influence on the deterioration of electrical characteristics of TFTs. This influence is reduced by using a very thin active layer.
419

Tuning the flexibility in MOFs by SBU functionalization

Bon, Volodymyr, Kavoosi, Negar, Senkovska, Irena, Müller, Philipp, Schaber, Jana, Wallacher, Dirk, Többens, Daniel M., Mueller, Uwe, Kaskel, Stefan 17 March 2017 (has links)
A new approach for the fine tuning of flexibility in MOFs, involving functionalization of the secondary building unit, is presented. The 'gate pressure' MOF [Zn3(bpydc)2(HCOO)2] was used as a model material and SBU functionalization was performed by using monocarboxylic acids such as acetic, benzoic or cinnamic acids instead of formic acid in the synthesis. The resulting materials are isomorphous to [Zn3(bpydc)2(HCOO)2] in the 'as made' form, but show different structural dynamics during the guest removal. The activated materials have entirely different properties in the nitrogen physisorption experiments clearly showing the tunability of the gate pressure, at which the structural transformation occurs, by using monocarboxylic acids with varying backbone structure in the synthesis. Thus, increasing the number of carbon atoms in the backbone leads to the decreasing gate pressure required to initiate the structural transition. Moreover, in situ adsorption/PXRD data suggest differences in the mechanism of the structural transformations: from 'gate opening' in the case of formic acid to 'breathing' if benzoic acid is used.
420

Nový přístup k polymorfismu číslicových obvodů na úrovni hradel / Novel approach to polymorphism in gate-level digital circuits

Nevoral, Jan Unknown Date (has links)
Před necelými dvaceti lety byl představen nekonvenční přístup k implementaci multifunkčních obvodů, tzv. polymorfní elektronika. Polymorfní elektronika umožňuje implementovat jedním obvodem dvě nebo více funkcí, přičemž aktuálně funkce závisí na stavu okolního prostředí obvodu. Klíčovými komponentami takových obvodů jsou polymorfní hradla. Od představení konceptu polymorfní elektroniky bylo publikováno několik desítek polymorfních hradel. Parametry většiny z nich však neumožňují jejich využití v reálných aplikacích. Bez dostatečného množství polymorfních hradel s dobrými parametry však nejspíše zůstane v aplikacích založených na multifunkčním chování nebo rekonfiguraci konvenční elektronika preferována před tou polymorfní. Tato disertační práce představuje nový přístup k polymorfní elektronice. Je založen na hradlech, jejichž funkce závisí na polaritě napájecích přívodů. Cílem této disertační práce je ukázat, že takový přístup umožňuje navrhnout hradla s výrazně lepšími parametry. Aby bylo možné systematicky navrhovat na úrovni tranzistorů takováto hradla, byla navržena evoluční metoda založená na kartézském genetickém programování (CGP). To umožnilo navrhnout několik sad efektivních polymorfních hradel založených jak na konvenčních MOSFET tranzistorech, tak na double-gate ambipolárních tranzistorech. Z těchto sad hradel byla vytvořena knihovna, která je v současné době volně dostupná pro ostatní vědce. Dále byla v této práci navržena řada složitějších obvodů založená na navržených hradlech. Na různých úrovních návrhu obvodů (hradla, RTL, cílová aplikace) je pak ukázáno, že navrhovaný polymorfismus na úrovni hradel představuje velké výhody v porovnání s předchozí generací polymorfních hradel, ale může být také konkurenceschopný nebo výrazně lepší než konvenční řešení takovýchto obvodů.

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