Linked to climate change, drivers such as increased temperatures and decreased water availability affect forest health in complex ways by simultaneously weakening tree vitality and promoting insect pest activity. One major beneficiary of climate-induced changes is the European spruce bark beetle (Ips typographus). To improve the mechanistic understanding of climate change impacts on long-term beetle infestation risks, individual-based simulation models (IBM) such as the bark beetle dispersion model IPS-SPREADS have been proven as effective tools. However, the computational costs of IBMs limit their spatial scale of application. While these tools are best suitable to simulate bark beetle dynamics on the plot level, upscaling the process to larger areas is challenging. The larger spatial scale is, nevertheless, often required to support the selection of adequate management intervention. Here, we introduce a novel two-step approach to address this challenge: (1) we use the IPS-SPREADS model to simulate the bark beetle dispersal at a local scale by dividing the research area into 250 × 250 m grid cells; and (2) we then apply a metamodel framework to upscale the results to the landscape level. The metamodel is based on Markov chains derived from the infestation probabilities of IPS-SPREADS results and extended by considering neighbor interaction and spruce dieback of each focal cell. We validated the metamodel by comparing its predictions with infestations observed in 2017 and 2018 in the Saxon Switzerland national park, Germany, and tested sanitation felling as a measure to prevent potential further outbreaks in the region. Validation showed an improvement in predictions by introducing the model extension of beetle spreading from one cell to another. The metamodel forecasts indicated an increase in the risk of infestation for adjacent forest areas. In case of a beetle mass outbreak, sanitation felling intensities of 80 percent and above seem to mitigate further outbreak progression.

As células iPS surgiram com a promessa de contornar as limitações das células-tronco embrionárias, como questões éticas, segurança, compatibilidade e disponibilidade. Essas células podem ser obtidas a partir de células somáticas de indivíduos normais ou de pacientes com doenças genéticas, fazendo destas uma importante ferramenta para o screening de drogas, modelos de doenças e testes toxicológicos. Grandes avanços ocorreram na reprogramação de células diferenciadas pela expressão forçada de fatores de transcrição (FT), principalmente, através de vetores lentivirais (VL), que proporcionam uma reprogramação eficiente. Entretanto, a inserção lentiviral no genoma humano e sua influência na reprogramação é pouco conhecida. Neste trabalho, avaliamos o perfil de inserção dos VL utilizados na geração de iPS. As iPS foram geradas e caracterizadas por nosso grupo a partir de fibroblastos humanos transduzidos com VL contendo 3 FT [SOX2, TCL-1A e C-MYC (célula TSM)], e de células mesenquimais derivadas de tecido adiposo com um vetor lentiviral policistrônico contendo 4 FT [OCT4, SOX2, KLF4 e C-MYC (iPS 4FT)]. Cinco colônias isoladas de cada iPS foram mapeadas e analisadas quanto aos sítios de inserção pela técnica de LM-PCR. O DNA genômico digerido foi amplificado com um primer específico para o LTR viral e outro para um linker sintético. Os produtos foram clonados, sequenciados, e analisados em bancos de dados para identificar similaridades com o genoma humano, entre outras análises. Na célula TSM, 176 sequências, obtidas com a técnica de LM-PCR, apresentaram identidade com o genoma humano, sendo que cerca de 50% ocorreram em regiões gênicas com 94% destas em introns. Já nas iPS 4FT, 251 sequências apresentaram identidade, com cerca de 45% atingindo genes, 92% destas em introns. As inserções distribuíram-se por todos os cromossomos, com preferência pelos cromossomos 16, 17 e 20 para a TSM e pelos cromossomos 11, 15 e 17 para a iPS 4FT. Analisamos a distância da inserção ao sítio de início de transcrição (TSS), e inserções próximas a ilhas CpG, que em geral correspondem a regiões regulatórias. A maior proporção de inserção ocorreu a partir de ±30Kb de distância desses sítios. Os sítios frágeis e as regiões repetitivas do genoma foram atingidas, mas com uma frequência baixa. Os resultados mostraram uma preferência de inserção lentiviral por regiões gênicas nas iPS, indicando a possível participação de proteínas como LEDGF/p75 na integração nas células estudadas. Este trabalho mostrou que o local da integração pode contribuir para a reprogramação e, apesar de possíveis efeitos negativos das integrações, estas as células iPS ainda são uma ferramenta importante para estudos in vitro. E identificar fatores que influenciem a seleção do sítio de inserção é importante para determinar regiões cromossômicas \"seguras\" para a integração, aumentando a segurança no uso clínico. / The induced pluripotent stem (iPS) cells came with the promise of circumvent some of the limitations in the use of embryonic stem cells, like ethical issues, biological safety, immune compatibility and availability. This cells can be generated from somatic cells of normal individuals or from patients with some genetic disease, making then an important tool for drug screening, construction of disease models and toxicological trials. Great advances have happened in reprogramming differentiated cells through the forced exogenous expression of transcription factors (TF), mostly by lentiviral vectors (LV), which provide an efficient reprogramming. However, the lentiviral insertion in the human genome and its influence in reprogramming is not well known. In this work, we evaluate the insertion profile of LV used to generate human iPS cells. The iPS cells were generated, by our group, from human fibroblasts transduced by LV containing 3 TF [SOX2, TCL-1A and C-MYC (TSM reprogrammed cell)], and from mesenchymal cells derived from human adipose tissue transduced by a polycistronic LV containing 4 TF [OCT4, SOX2, KLF4 and C-MYC (iPS 4TF)]. Five isolated colonies of each iPS cell were mapped and analyzed for the insertion sites through LM-PCR technique. The digested genomic DNA was amplified with a primer for the viral LTR e another for a synthetic linker. The products were cloned, sequenced and analyzed in database to identify similarities with the human genome, among other analyzes. In TSM cell, 176 sequences, derived from the LM-PCR technique, presented identity with the human genome, and about 50% of those occurred in genic regions with 94% in introns. In iPS 4TF, 251 sequences showed identity, with about 45% reaching genes, 92% of these in introns. The insertions were distributed on all chromosomes, with preference for the 16, 17 and 20 for the TSM cell, and for the 11, 15 and 17 for the iPS 4TF. We analyzed the distance of the insertion from de transcription start site, and insertions near CpG islands, which, overall, correspond to regulatory regions. The highest proportion of insertion occurred starting ±30Kb distance from these sites. The fragile sites and the repetitive regions of the genome were also reached, but with low frequency. The results showed a preference of lentiviral insertion for genic regions in iPS, indicating the potential participation of proteins like LEDGF/p75 in integration in the cells of this work. This work shows that the integration site may contribute to the reprogramming, and, despite possible negative effects of integration, these iPS cells are still an important tool for in vitro studies. Identify factors that influence the selection of insertion site is important for determination of \"safe\" chromosomal regions for the integration, increasing the safe in clinical use.

La BPCO (bronchopathie pulmonaire chronique obstructive) est un problème majeur de santé publique et représentera la 3ème cause de mortalité dans le monde en 2030. L’âge, le tabagisme, ainsi que la pollution atmosphérique via l’exposition aux particules de diesel mais également la pollution domestique – majoritairement représentée par la combustion domestique de biomasse – sont des facteurs de risque bien identifiés d’apparition d’une BPCO. Il n’existe à ce jour aucun traitement curatif pouvant interférer avec l’histoire naturelle de la maladie.Les cellules souches pluripotentes, et notamment les cellules souches humaines pluripotentes induites (hiPSCs), sont définies par deux propriétés fondamentales : l’auto-renouvellement et la capacité à se différencier en tous les types cellulaires de notre corps. Elles offrent une opportunité sans précédent de modéliser le développement humain normal et pathologique de l’appareil respiratoire.Ce projet de recherche a pour objectif de modéliser in vitro les trajectoires de la BPCO, en lien avec une origine développementale (racines pédiatriques) et/ou une susceptibilité au tabac. Afin d’élucider les mécanismes qui sous-tendent la pathogénie de la BPCO et de la susceptibilité au tabac, nous avons constitué deux groupes caricaturaux : i) 4 patients atteints d’une forme sévère de la BPCO, constituant le groupe « hautement susceptibles », ii) 4 patients fumeurs indemnes de BPCO ou tout autre comorbidité liée au tabac « hautement résistants » au tabac.Nous avons utilisés deux modèles de culture cellulaires in vitro : les hiPSCs et la culture de cellules épithéliales primaires bronchiques humaines (HBECs) cultivées en ALI (interface air liquide).Dans un premier temps, nous avons généré des lignées hiPSCs par reprogrammation cellulaire à partir du sang périphérique d’un sujet sain (contrôle), et de trois patients BPCO sévères hautement caractérisés. Dans un second temps, la différenciation dirigée des hiPSCs a permis de récapituler le développement pulmonaire précoce (génération de progéniteurs bronchiques NKX2.1) par la mise au point d’un protocole de différenciation dirigée robuste et reproductible sur plusieurs lignées hiPSCs. La maturation de ces progéniteurs bronchiques en culture 2D ou 3D a permis d’obtenir des structures épithéliales exprimant les marqueurs de cellules basales (KRT5), de cellules Club (CCSP), et ciliées (FOXJ1). Dans un second temps, ces épithélia seront exposés au tabac (CSE- cigarette smoke extract) afin d’induire un phénotype « BPCO-like ». Enfin, la culture des HBECs cultivées en ALI des patients BPCO sévères a été réalisée en condition exposée (CSE) et non exposée. La résistance transépithéliale, la motilité ciliaire, le profil sécrétoire et la diversité ARN ont été collecté.Ce travail a permis de mettre en place les outils nécessaires pour reproduire les trajectoires in vitro de la BPCO et élucider les origines de la pathologie. Les outils de séquençage à haut débit (transcriptomique dans notre étude), permettront de découvrir de nouveaux candidats, représentants de potentielles cibles en vue d’un criblage pharmacologique. / COPD (Chronic Obstructive Pulmonary Disease) is a major public health problem and will be the 3rd leading cause of death in the world in 2030. Age, smoking, and air pollution through the exposure to particulate matter but also domestic pollution - mostly represented by domestic biomass combustion - are well-identified risk factors for the development of COPD. To date, there is no cure that can interfere with the natural history of the disease.Pluripotent stem cells, including induced pluripotent human stem cells (hiPSCs), are defined by two fundamental properties: self-renewal and the ability to differentiate into all cell types in our body. They offer an unprecedented opportunity to model the normal and pathological human development of the respiratory system.This research project aimed to model in vitro the trajectories of COPD, related to a developmental origin (pediatric roots) and / or susceptibility to tobacco. In order to elucidate the underlying mechanisms of COPD and tobacco susceptibility, we established two extreme groups: i) 4 patients with a severe form of COPD, the "highly susceptible" group, ii) 4 patients who are free of COPD or other tobacco-related comorbidity despite heavy smoking, called as "highly resistant" to tobacco.We have used two different but complementary in vitro cell culture models: hiPSCs and human bronchial primary epithelial cell cultures (HBECs) grown in ALI condition (Air Liquid Interface).First of all, we generate hiPSCs cell lines by reprogramming cells from peripheral blood of a healthy subject (control), and three highly characterized severe COPD patients. In a second step, the directed differentiation of hiPSCs allowed to recapitulate the early pulmonary development (NKX2.1 generation of bronchial progenitors) by the development of a robust and reproducible directed differentiation protocol of several hiPSCs lines. The maturation of these bronchial progenitors in 2D or 3D culture allows the generation of epithelial structures expressing markers of KRT5 + basal cells , CSSP + Club cells and FOXJ1 + ciliated cells. In a second step, these epithelia will be exposed to tobacco (CSE-cigarette smoke extract) in order to induce a "COPD-like" phenotype. Finally, ALI culture of HBECs of severe COPD patients was performed in unexposed and exposed condition (CSE). Transepithelial resistance, ciliary motility, secretory profile, and RNA diversity were collected.This work allowed to put in place the necessary tools to reproduce the in vitro trajectories of COPD and to clarify the origins of this pathology. The high throughput sequencing tools (transcriptomic in our study), will allow the discovery of new candidates, that represent potential targets for future pharmacological screening.

Type I diabetes (T1D) is caused by autoimmune destruction of pancreatic β-cells. Immediate consequences of T1D are severe weight loss, ketoacidosis and death unless insulin is administered. The long-term consequences of T1D are dysregulation of metabolism leading to cardiovascular complications, neuropathy and kidney insufficiency. It is estimated that 3 million Americans have T1D, and its prevalence among young individuals is progressively rising. Islet transplantation is the most effective way to treat T1D. Unfortunately, there is a chronic shortage of cadaveric organ donors to treat all of the patients on the waiting list. Thus, an alternative source of insulin producing cells (IPCs) could significantly improve patient treatment. Our lab seeks to establish human induced pluripotent stem (iPS) cells as a novel source of IPCs that are patient tailored. The aim of this thesis was to 1) compare the differentiation of T1D and nondiabetic (ND) patient-derived iPS cells into IPCs, and 2) devise an effective protocol for differentiating skin fibroblast-derived T1D iPS cells into functional, glucose-responsive IPCs. Initially, T1D iPS cells were differentiated into IPCs. However, the yield was very poor. We hypothesized that epigenetic barriers were prevalent in T1D iPS cells, limiting their differentiation into IPCs. To address this problem, we utilized 5-aza-2’-deoxycytidine (5-aza-DC), a potent demethylating agent that inhibits the DNA methyltransferase (Dnmt). We reasoned that the use of a demethylation agent might induce a more labile, permissive state, allowing for greater cell responses to differentiation stimuli. Typically, after the differentiation of T1D iPS cells, several cell cluster types are obtained, namely compact cell clusters and hollow cysts. 5-aza-DC treatment appeared to convert all of the cell clusters into characteristic islet-like compact structures. In contrast, in untreated T1D IPC cultures, we observed the dominant presence of many hollow cysts with only a few tight spheroids. The hollow cysts stained negative for insulin whereas the rare solid spheroids highly expressed insulin. Flow cytometry analysis indicated a much greater percentage of Pdx1+ and insulin+ cells in 5-Aza-DC-treated cultures. These cells express markers typical of pancreatic β-cells, possessed insulin granules in similar quantities as islets, and were glucose-responsive. When transplanted in immunodeficient mice that had developed streptozotozin-induced diabetes, there was a dramatic decrease of hyperglycemia within 28 days. These mice effectively managed glucose challenge by recovering to normoglycemia, whereas nontransplanted mice did not. Altogether, our data for the first time reveal a very high yield of functional IPCs derived from human iPS cells derived from a patient with T1D, which presents a novel alternative source of IPCs that could be used to treat T1D.

No description available.

The effectiveness of countermeasures (pheromone traps or trap trees) and its combination in reliance with either spring or summer generation of spruce bark beetle in areas with differentiated calamitous base were surveyed in the summer of 2012--2014 in the district of Krasov, Forest Management of the town Albrechtice. During the spring swarm the combination with equal number of each countermeasure (50 TT /50 PT) seemed to be the most effective. In the summer swarm, the ratio with dominant number of trap trees (75 TT /25 PT) was more effective, closely followed by the ratio with dominant number of pheromone traps (25 TT /75 PT).

Dispositivos integrados de sistemas-em-chip (SoC), especialmente aqueles dedicados às aplicações multimídia, processam grandes quantidades de dados armazenados em memórias. O desempenho das portas de memória afeta diretamente no desempenho do sistema. A melhor utilização do espaço de armazenamento de dados e a redução do custo e do consumo de potência dos sistemas eletrônicos encorajam o desenvolvimento de arquiteturas eficientes para controladores de memória. Essa melhoria deve ser alcançada tanto para interfaces com memórias internas quanto externas ao chip. Em sistemas de processamento de vídeo, por exemplo, memórias de grande capacidade são necessárias para armazenar vários quadros de imagem enquanto que os algoritmos de compressão fazem a busca por redundâncias. No caso de sistemas implementados em tecnologia FPGA é possível utilizar os blocos de memória disponíveis internamente ao FPGA, os quais são limitados a poucos mega-bytes de dados. Para aumentar a capacidade de armazenamento de dados é necessário usar elementos de memória externa e um núcleo de propriedade intelectual (IP) de controlador de memória é necessário. Contudo, seu desenvolvimento é uma tarefa muito complexa e nem sempre é possível utilizar uma solução "sob demanda". O uso de FPGAs para prototipar sistemas permite ao desenvolvedor integrar módulos rapidamente. Nesse caso, a verificação do projeto é uma questão importante a ser considerada no desenvolvimento de um sistema complexo. Controladores de memória de alta velocidade são extremamente sensíveis aos atrasos de propagação da lógica e do roteamento. A síntese a partir de uma descrição em linguagem de hardware (HDL) necessita da verificação de sua compatibilidade com as especificações de temporização pré-determinadas. Como solução para esse problema, é apresentado nesse trabalho um IP do controlador de memória DDR SDRAM com função de BIST (Built-In Self-Test) integrada, onde o teste de memória é utilizado para verificar o funcionamento correto do controlador. / Many integrated Systems-on-Chip (SoC) devices, specially those dedicated to multimedia applications, process large amounts of data stored on memories. The performance of the memories ports directly affects the performance of the system. Optimization of the usage of data storage and reduction of cost and power consumption of the electronic systems encourage the development of efficient architectures for memory controllers. This improvement must be reached either for embedded or external memories. In systems for video processing, for example, large memory arrays are needed to store several video frames while compression algorithms search for redundancies. In the case of FPGA system implementation, it is possible to use memory blocks available inside FPGA, but for only a few megabytes of data. To increase data storage capacity it is necessary to use external memory devices and a memory controller intellectual property (IP) core is required. Nevertheless, its development is a very complex task and it is not always possible to have a custom solution. Using FPGA for system prototyping allows the developer to perform rapid integration of modules to exercise a hardware version. In this case, test is an important issue to be considered in a complex system design. High speed memory controllers are very sensitive to gate and routing delays and the synthesis from a hardware description language (HDL) needs to be verified to comply with predefined timing specifications. To overcome these problems, a DDR SDRAM controller IP was developed which integrate the BIST (Built-In Self-Test) function, where the memory test is used to check the correct functioning of the DDR controller.

Dispositivos integrados de sistemas-em-chip (SoC), especialmente aqueles dedicados às aplicações multimídia, processam grandes quantidades de dados armazenados em memórias. O desempenho das portas de memória afeta diretamente no desempenho do sistema. A melhor utilização do espaço de armazenamento de dados e a redução do custo e do consumo de potência dos sistemas eletrônicos encorajam o desenvolvimento de arquiteturas eficientes para controladores de memória. Essa melhoria deve ser alcançada tanto para interfaces com memórias internas quanto externas ao chip. Em sistemas de processamento de vídeo, por exemplo, memórias de grande capacidade são necessárias para armazenar vários quadros de imagem enquanto que os algoritmos de compressão fazem a busca por redundâncias. No caso de sistemas implementados em tecnologia FPGA é possível utilizar os blocos de memória disponíveis internamente ao FPGA, os quais são limitados a poucos mega-bytes de dados. Para aumentar a capacidade de armazenamento de dados é necessário usar elementos de memória externa e um núcleo de propriedade intelectual (IP) de controlador de memória é necessário. Contudo, seu desenvolvimento é uma tarefa muito complexa e nem sempre é possível utilizar uma solução "sob demanda". O uso de FPGAs para prototipar sistemas permite ao desenvolvedor integrar módulos rapidamente. Nesse caso, a verificação do projeto é uma questão importante a ser considerada no desenvolvimento de um sistema complexo. Controladores de memória de alta velocidade são extremamente sensíveis aos atrasos de propagação da lógica e do roteamento. A síntese a partir de uma descrição em linguagem de hardware (HDL) necessita da verificação de sua compatibilidade com as especificações de temporização pré-determinadas. Como solução para esse problema, é apresentado nesse trabalho um IP do controlador de memória DDR SDRAM com função de BIST (Built-In Self-Test) integrada, onde o teste de memória é utilizado para verificar o funcionamento correto do controlador. / Many integrated Systems-on-Chip (SoC) devices, specially those dedicated to multimedia applications, process large amounts of data stored on memories. The performance of the memories ports directly affects the performance of the system. Optimization of the usage of data storage and reduction of cost and power consumption of the electronic systems encourage the development of efficient architectures for memory controllers. This improvement must be reached either for embedded or external memories. In systems for video processing, for example, large memory arrays are needed to store several video frames while compression algorithms search for redundancies. In the case of FPGA system implementation, it is possible to use memory blocks available inside FPGA, but for only a few megabytes of data. To increase data storage capacity it is necessary to use external memory devices and a memory controller intellectual property (IP) core is required. Nevertheless, its development is a very complex task and it is not always possible to have a custom solution. Using FPGA for system prototyping allows the developer to perform rapid integration of modules to exercise a hardware version. In this case, test is an important issue to be considered in a complex system design. High speed memory controllers are very sensitive to gate and routing delays and the synthesis from a hardware description language (HDL) needs to be verified to comply with predefined timing specifications. To overcome these problems, a DDR SDRAM controller IP was developed which integrate the BIST (Built-In Self-Test) function, where the memory test is used to check the correct functioning of the DDR controller.

The relationship between religion and mental healthcare are somewhat complicated with the psychiatric need for control and religions attempt to accept what we cannot control. Swedish mental healthcare is undergoing a change towards a more individualistic and patient ruled care. Throughout the world clinicians are more and more convinced with the positive effects religion and spirituality can have on the recovery process for the mentally ill. This paper will show a variety of different studies made on the effect of combining religious coping with mental illness as well as showing result from interview made especially for the context of this paper. The result of these combined studies shows an overall positive effect of religious coping for the mentally ill. Focus within the primary study is behaviourproblematics with extra attention on IPS, emotionally instable personalitydisorder formerly known as borderline personalitydisorder and posttraumatic stresssymptom.

Dispositivos integrados de sistemas-em-chip (SoC), especialmente aqueles dedicados às aplicações multimídia, processam grandes quantidades de dados armazenados em memórias. O desempenho das portas de memória afeta diretamente no desempenho do sistema. A melhor utilização do espaço de armazenamento de dados e a redução do custo e do consumo de potência dos sistemas eletrônicos encorajam o desenvolvimento de arquiteturas eficientes para controladores de memória. Essa melhoria deve ser alcançada tanto para interfaces com memórias internas quanto externas ao chip. Em sistemas de processamento de vídeo, por exemplo, memórias de grande capacidade são necessárias para armazenar vários quadros de imagem enquanto que os algoritmos de compressão fazem a busca por redundâncias. No caso de sistemas implementados em tecnologia FPGA é possível utilizar os blocos de memória disponíveis internamente ao FPGA, os quais são limitados a poucos mega-bytes de dados. Para aumentar a capacidade de armazenamento de dados é necessário usar elementos de memória externa e um núcleo de propriedade intelectual (IP) de controlador de memória é necessário. Contudo, seu desenvolvimento é uma tarefa muito complexa e nem sempre é possível utilizar uma solução "sob demanda". O uso de FPGAs para prototipar sistemas permite ao desenvolvedor integrar módulos rapidamente. Nesse caso, a verificação do projeto é uma questão importante a ser considerada no desenvolvimento de um sistema complexo. Controladores de memória de alta velocidade são extremamente sensíveis aos atrasos de propagação da lógica e do roteamento. A síntese a partir de uma descrição em linguagem de hardware (HDL) necessita da verificação de sua compatibilidade com as especificações de temporização pré-determinadas. Como solução para esse problema, é apresentado nesse trabalho um IP do controlador de memória DDR SDRAM com função de BIST (Built-In Self-Test) integrada, onde o teste de memória é utilizado para verificar o funcionamento correto do controlador. / Many integrated Systems-on-Chip (SoC) devices, specially those dedicated to multimedia applications, process large amounts of data stored on memories. The performance of the memories ports directly affects the performance of the system. Optimization of the usage of data storage and reduction of cost and power consumption of the electronic systems encourage the development of efficient architectures for memory controllers. This improvement must be reached either for embedded or external memories. In systems for video processing, for example, large memory arrays are needed to store several video frames while compression algorithms search for redundancies. In the case of FPGA system implementation, it is possible to use memory blocks available inside FPGA, but for only a few megabytes of data. To increase data storage capacity it is necessary to use external memory devices and a memory controller intellectual property (IP) core is required. Nevertheless, its development is a very complex task and it is not always possible to have a custom solution. Using FPGA for system prototyping allows the developer to perform rapid integration of modules to exercise a hardware version. In this case, test is an important issue to be considered in a complex system design. High speed memory controllers are very sensitive to gate and routing delays and the synthesis from a hardware description language (HDL) needs to be verified to comply with predefined timing specifications. To overcome these problems, a DDR SDRAM controller IP was developed which integrate the BIST (Built-In Self-Test) function, where the memory test is used to check the correct functioning of the DDR controller.