High step-down dc/dc converters are widely adopted in a variety of areas such as industrial, automotive, and telecommunication. The 48 V power delivery system becomes increasingly popular for powering high-current and low-voltage chips. The Series-Capacitor Buck (SCB) converter doubles the duty ratio and equalizes the current between the two phases. Hard switching has hindered efforts to reduce volume via increased switching frequency, although a monolithically integrated SCB converter has boosted current density. A Series-Resonator Buck (SRB) converter is realized by adding a resonant tank in series with the series capacitor Cs. All switches turn on at zero-voltage (ZVOn), and the low-side switches turn off at zero-current (ZCOff). The design of the SRB converter includes characterizing the design variables' impacts on the converter performances and designing low-loss resonant components as the series resonator. The Series-Resonator Buck converter belongs to the class of quasi-resonant converters. Its resonant frequency is higher than the switching frequency, and its waveforms are quasi-sinusoidal. This work develops a steady-state model of the SRB converter to calculate voltage gain, component peak voltages, and resonant inductor peak current. Each switching cycle is modeled based on the concept of generalized state-space averaging. The soft-switching condition of the high-side switches is derived. The ZVS condition depends on the normalized control variable and the load condition. The gain equation models the load-dependent characteristic and the peak gain boundary. The theoretical peak voltage gain of the SRB converter is smaller than the maximum gain of the SCB converter. A smaller normalized load condition results in a larger peak voltage gain of the SRB converter. The large-signal model of the SRB converter characterizes the low-frequency behavior of the low-pass filters with the series capacitor and the high-frequency behavior of the resonant elements. A design recommendation of t_off f_r<0.5 is suggested to avoid the oscillation between the series capacitor Cs and the output inductors Lo. In other words, the off-duration of the low-side switches is less than half of 1/fr, and therefore the negative damping effect from the parallel resonant tank to the vCs response is reduced. The transfer functions of the SRB converter are presented and compared with those of the SCB converter. The series resonator brings in an extra damping effect to the response of output capacitor voltage. The understanding of the analytical relationships among the resonant tank energy, voltage gain, and component stresses was utilized to guide the converter design of the converter's parameters. A normalized load condition at √2 minimizes the stresses of the series resonator by balancing the peak energy in the resonant elements Lr and Cr. The f_s variation with voltage gain M is less than 10%. The non-resonant components C_s, L_oa, and L_ob are designed according to the specified switching ripples. The ac winding loss complicates the winding design of a resonant inductor. This work replaces the rectangular window with a rhombic window to reduce the eddy current loss caused by the fringing effect. The window ratio k_y is added as a design variable. The impacts of the design variables on the inductance, core loss, and winding loss are discussed. The air-gap length l_g is designed to control the inductance. A larger k_y design results in a short inductor length l_c and a smaller winding loss. The disadvantages include a smaller energy density design and a larger core loss due to the smaller cross-sectional area. In the design example presented in the thesis, the presence of the rhombic shape increases the gap-to-winding distance by two times, and also reduces the y-component of the magnetic field by a factor of two. The total inductor loss is reduced by 56% compared to a conventional design with a rectangular winding window while keeping the same inductance and the same inductor volume. This dissertation implements a resonator, replacing the series capacitor, in an SCB converter. The resultant SRB converter shows a 30% reduction in loss and a 50% increase in power density. The root cause of the divergence issue is identified by modeling the negative damping effect caused by resonant elements. The presented transient design guideline clears the barriers to closed-loop regulation and commercialization of the SRB converter. This work also reshapes winding windows from rectangle to rhombus which is a low-cost change that reduces magnetic loss by half. The theoretical analysis and design procedures are demonstrated in a 200 W prototype with 7% peak efficiency increase compared to the commonly used 30 W commercial SCB product. / Doctor of Philosophy / High step-down dc/dc converters are widely adopted in a variety of areas such as industrial, automotive, and telecommunication areas. The 48 V power delivery system becomes increasingly popular for powering high-current and low-voltage chips. The Series-Capacitor Buck (SCB) converter doubles the duty ratio and equalizes the current between the two phases. Hard switching has hindered efforts to reduce volume via increased switching frequency although a monolithically integrated SCB converter has boosted current density. A Series-Resonator Buck (SRB) converter is realized by adding a resonant tank in series with the series capacitor Cs. All switches turn on at zero-voltage (ZVOn), and the low-side switches turn off at zero-current (ZCOff). The challenges to designing the SRB converter include characterizing the design variables' impacts on the converter performances and designing low-loss resonant components as the series resonator. The resultant SRB converter shows a 30% reduction in loss and a 50% increase in power density. The root cause of the divergence issue is identified by modeling the negative damping effect caused by the resonant elements. The presented transient design guideline clears the barriers of closed-loop regulation and commercialization of the SRB converter. This work also reshapes winding windows from rectangle to rhombus, which is a low-cost change that reduces magnetic loss by half. The theoretical analysis and design procedures are demonstrated in a 200 W prototype with 7% peak efficiency increase compared to the commonly used 30 W commercial SCB product.

Cette thèse porte sur les défis techniques et technologiques dans la conception des architectures mobiles d'émission « tout numérique » reconfigurables fonctionnant dans les bandes cellulaires pour les standards GSM, W-CDMA, HSUPA et LTE. Avec l'évolution constante des besoins en communication, les terminaux mobiles doivent être en mesure de couvrir différents standards à partir d'une même architecture, en fonction des bandes de fréquences libres, du débit et des contraintes spectrales. Dans un but de réduction des coûts, de consommation et d'une plus grande intégration, de nouvelles architectures dites multistandards se sont développées permettant à un seul émetteur d'adresser chaque standard au lieu de paralléliser plusieurs architectures radio chacune dédiée à un standard particulier. Depuis plusieurs années ont émergé des technologies nanométriques telles que le CMOS 90nm ou 65nm, ouvrant la voie à une plus grande numérisation des blocs fonctionnels des architectures jusqu'alors analogiques. Dans cette étude, nous identifions les évolutions possibles entre « monde analogique » et « monde numérique » permettant de déplacer la limite de la bande de base jusqu'à l'amplificateur de puissance. Plusieurs architectures ont été étudiées avec des degrés de numérisation progressifs jusqu'à atteindre l'architecture « tout numérique » englobant une partie de l'amplification de puissance. Un travail approfondi sur l'étude des différents standards cellulaires mené conjointement avec l'implémentation et la simulation de ces architectures, a permis d'identifier les différents verrous technologiques et fonctionnels dans le développement d'architectures « tout numérique ». Les contraintes de pollution spectrale des raies de sur-échantillonnage sont apparues comme dimensionnantes. Pour chaque bande de chaque standard, ces contraintes ont été évaluées, afin de définir une méthode d'optimisation des fréquences de sur-échantillonnage. Cependant un filtrage externe reste nécessaire. Une deuxième étape nous a amené à identifier et concevoir une technique de filtrage passe bande reconfigurable pour les bandes cellulaires de 1710 à 1980MHz avec au moins 60MHz de largeur de bande afin d'adresser le standard LTE, et 23dB d'atténuation à 390MHz du centre de la bande pour adresser le pire cas de filtrage (bandes 1, 3 et 10 en W-CDMA). Nous avons alors conçu et implémenté un filtre reconfigurable à inductances actives, afin de garantir reconfigurabilité et très faibles pertes d'insertion. Cette thèse a donc permis à partir d'une problématique actuelle et au travers d'une démarche d'identification des limites des architectures « tout numérique », de proposer un prototype de filtre adapté. Ce filtre a été conçu en CMOS 65nm, réalisé et mesuré, les performances sont conformes aux exigences requises / This thesis addresses the technical and technological challenges in the design of “all digital” reconfigurable mobile architectures operating cellular standard bands (GSM, WCDMA, HSUPA and LTE). With the ever-changing communication needs, mobile devices must be able to address different standards from a common architecture depending on free frequency bands, data rate and spectral constraints. In order to reduce costs, consumption and to obtain a greater integration, new architectures were developed and called multi-standard allowing a single transmitter to transmit each standard instead of parallelizing several radio architectures each dedicated to a particular standard. For several years nanoscale technologies such as 90nm or 65nm CMOS have emerged, clearing the way to replace analog functional blocks by greater digital functional blocks. In this study, we identify possible changes between "analog world" and "digital world" to move the digital boundary from the baseband to power amplifier. Several architectures have been studied with progressive digitization degrees to meet "all digital" architecture, comprising part of the power amplifier. Extensive work on the study of different cellular standards conducted jointly with the implementation and simulation of these architectures, let us identified the different technological and functional locks in the development of "all digital" architectures. Oversampling spurious constraints have emerged as dimensioning. For each band of each standard, these constraints were evaluated to define an optimization method of over-sampling frequency. However an external filter is required. A second step led us to identify and design a reconfigurable bandpass filtering technique for cellular bands from 1710 to 1980MHz with at least 60MHz of bandwidth in order to address the LTE, and 23dB attenuation at 390MHz from the center of the filter to address the most constringent filtering cases (bands 1, 3 and 10 in W-CDMA). We then designed and implemented a reconfigurable filter based on active inductors to ensure reconfigurability and very low insertion loss. This thesis permit from an actual architecture system issue and through a process to identify limitations of “all digital” architectures, to propose an adapted filtering solution. This filter was designed in 65nm CMOS, implemented. Measured performance is consistent with requirements

En dépit de sa rareté au sein des produits naturels et des processus biologiques, le fluor joue un rôle de plus en plus important dans nos vies quotidiennes. Un atome de fluor ou un groupement fluoré, lorsqu’il fait partie d’une molécule biologiquement active, permet d’améliorer drastiquement ses propriétés physiques, chimiques et biologiques. Le groupement -CHF2, en plus de posséder les propriétés remarquables communes à de nombreuses espèces émergentes fluorées, est considéré comme un bioisostère des groupements hydroxyle, thiol et amino. Il peut également être engagé dans des liaisons de type hydrogène grâce à son proton acide. Cependant, les voies de synthèse permettant d’introduire stéréosélectivement le groupe -CHF2 sont encore peu nombreuses. Par exemple, seuls peu de groupes ont concentré leurs efforts sur la synthèse d’alcools α,α-difluorométhylés. Afin de remédier à ce manque de méthodologies, deux stratégies ont été imaginées au sein de notre équipe. La première consiste à utiliser un sulfoxyde α,α-difluorométhylé énantiopur en tant qu’inducteur de chiralité. La seconde méthode repose sur l’utilisation de cyclopeptoïdes chiraux lors de la difluorométhylation énantiosélective de dérivés carbonylés dans des conditions de catalyse à transfert de phase. Ces deux stratégies ainsi que les résultats qui ont été obtenus au cours de ce projet de thèse sont exposés dans le présent manuscrit. / Despite being largely absent from natural products and biological processes, fluorine plays an increasingly important role in numerous areas of our daily life. The presence of fluorine atoms or fluoroalkyl groups in bioactive molecules can indeed deeply modify their physical, chemical and biological properties. In addition to these outstanding properties common to many emerging fluorinated groups, the -CHF2 group has been shown to be an interesting bioisostere of hydroxyl, thiol and amine groups and a strong hydrogen bond donor. However, in contrast to enantioselective trifluoromethylation, the enantioselective introduction of a difluoromethyl group is still in its infancy. For instance only few examples in the literature describe the synthesis of enantioenriched α,α-difluoromethyl alcohols. As part of our study to overcome this scarcity, we envisaged two different strategies to synthesise these compounds. The first method aimed to access highly enantioenriched α,α-difluoromethyl alcohols by using an enantiopure aryl α,α-difluoromethyl sulfoxide as chiral and traceless auxiliary. Phase transfer catalysis was chosen as a second strategy for the enantioselective difluoromethylation of carbonyl derivatives in presence of chiral cyclopeptoïds. Those two methods and the results obtained are discussed in this manuscript.

Cette thèse est une tentative vers la conception de la bande Ka émetteur-récepteur RF pour les réseaux de capteurs sans fil (WSN), pour lesquelles la consommation d'énergie, le coût et la taille sont des paramètres critiques. Au sens de la consommation d'énergie, un transmetteur RF est la partie la plus cruciale d'un nœud de capteur. Nous avons choisi STMicroelectronics 90nm global purpose (GP) pour atteindre la technologie CMOS à faible puissance, faible coût et de petite taille. Pour la première fois, nous avons introduit la bande Ka dans le context de WSN, a fin de bénéficier de l'immunité élevée du réseau et la petite taille antenne. Étant donné que la technologie que nous avons choisi et du kit associé fonderie de conception n'est pas pour la conception RF, nous avons été obligés de mettre au point un outil de conception individuelle pour la bande à ondes millimétriques. De cette façon, nous avons développé une solution simple et précise le modèle MOS transistor, comprenant charge et le modèle de capacité, modèle de bruit et le modèle complet des effets parasites. Nous avons proposé une nouvelle structure pour les inducteurs de la ligne de transmission et un modèle précis de RLGC a été développé pour la conception et la simulation de ces inducteurs. Et puis par la simulation de la pleine d'onde (full wave) électromagnétique dans le logiciel HFSS, nous avons extrait des parameters du modele d'incucteurs , et d'autres éléments passifs, telles que des pads RF et T-jonctions. Comme notre première expérience, nous avons conçu et optimisé une LNA à 30 GHz, en utilisant notre outil de conception. Le LNA conçu a été fabriqué dans STMicroelectronics 90nm global dans le processus de GP CMOS et a été mesurée dans le laboratoire IMEP. Les résultats des mesures montrent 10dB gain de puissance et de 4,8 dB figre bruit (noise figure) avec 4mW DC la consommation de puissance. Dans l'étape suivante, nous avons conçu et optimisé mieux 30GHz LNA. La simulation post-layout montre 13.9dB gain de puissance et 3.6d figre bruit, avec seulement 3 mW de consommation de puissance. Nous avons proposé un lien simple radio et un structure simple a ete presente pour le récepteur_émetteur. Dans le récepteur, nous avons utilisé la structure hétérodyne, ou dans la quelle nous avons utilise de l'idee de Mixer Harmonique paire et oscillateur couple, à surmonter de nombreux problèmes se pose en mm bande des ondes dans la technologie CMOS. Le Mixer a été conçu en utilisant les résultats d'analyse et de simulation dans le kit de conception de fonderie: 4dB gain de conversion et de 5,8 double side band figre de bruit avec 2.2Mw consommation de puissance, un excellent résultat en comparaison avec les œuvres similaires rapports comme IF Stage 2GHz qui a été conçu comme multi-slice-amplificateur de la chaîne de detection pour accroître (ugmenter)la performance du récepteur et d'atteindre plus faible consommation d'énergie. Enfin, le récepteur a été simulé dans MATLAB et--87dBm de sensibilité, 890KHz de bande passante, avec 6.65mW consommation d'énergie sont obtenus. L'émetteur a été conçu aussi simple que possible, en utilisant idée power oscillateur, délivrant 6mW puissance RF de l'antenne. L'émetteur a généralement les 25% de power efficacité qui est très bon résultat en comparaison avec les œuvres déclarées.

This thesis reports on a new implementation of high quality factor (Q) copper (Cu) inductors on CMOS-grade (10-20ohm.cm) silicon (Si) substrates using a fully CMOS-compatible process. A low-temperature (less than300C) fabrication sequence is employed to reduce the loss of Si wafers at RF frequencies by trenching the Si substrate. The high aspect-ratio (30:1) trenches are subsequently bridged over or refilled with a low-loss material to close the open areas and to create a rigid low-loss island (Trenched Si Island) on which the inductors can be fabricated. The method reported here does not require air suspension of the inductors, resulting in mechanically-robust structures that are compatible with any packaging technology. The metal loss of inductors is reduced by electroplating thick (~20m) Cu layer. Fabricated inductors are characterized and modeled from S-parameter measurement. Measurement results are in good agreement with SONNET electromagnetic simulations. A one-turn 0.8nH Cu inductor fabricated on a Trenched Silicon Island (TSI) exhibits high Q of 71 at 8.75 GHz. Whereas, the identical inductor fabricated on a 20um thick silicon dioxide (SiO2) coated standard Si substrate has a maximum Q of 41 at 1.95GHz. Comparing the Q of inductors on TSI with that of other micromachined Si substrates reveals the significant effect of trenching the Si in reduction of the substrate loss. This thesis outlines the design, fabrication, characterization and modeling of spiral type Cu inductors on the TSIs.

This thesis presents the design and fabrication of coplanar waveguide to microstrip transitions and planar spiral inductors, and the design of metal-insulator-metal capacitors, a planar band-pass, and a low-pass filter structures as an application for the inductors and capacitors using the RF MEMS technology. This thesis also includes a packaging method for RF MEMS devices with the use of benzocyclobutene as bonding material. The transition structures are formed by four different methods between coplanar waveguide end and microstrip end, and they are analyzed in 1-20 GHz. Very low loss transitions are obtained by maintaining constant characteristic impedance which is the same as the port impedance through the transition structures. The planar inductors are formed by square microstrip spirals on a glass substrate. Using the self-inductance propery of a conductive strip and the mutual inductance between two conductor strips in a proper arrangement, the inductance value of each structure is defined. Inductors from 0.7 nH up to 20 nH have been designed and fabricated. The metal-insulator-metal capacitors are formed by two coplanar waveguide structures. In the intersection, one end of a coplanar waveguide is placed on top of the end of the other coplanar waveguide with a dielectric layer in between. Using the theory of parallel plate capacitors, the capacitance of each structure is adjusted by the dimensions of the coplanar waveguides, which obviously adjust the area of intersection. Capacitors from 0.3 pF up to 9.8 pF have been designed. A low-pass filter and a band-pass filter are designed using the capacitors and inductors developed in this thesis. In addition to lumped elements, the interconnecting transmission lines, junctions and input-output lines are added to filter topologies. The RF MEMS packaging is realized on a coplanar waveguide structure which stands on a silicon wafer and encapsulated by a silicon wafer. The capping chip stands on the BCB outer ring which promotes adhesion and provides semi hermeticity. Keywords: Transition between transmission lines, planar spiral inductor, metal-insulator-metal capacitor, RF MEMS packaging, surface micromachining.

Darbe nagrinėjami dviejų tipų spiraliniai induktoriai, bei matematiniai jų modeliai. Spiralinio induktoriaus tyrimai atliekami naudojant specialų eksperimentinį stendą, bei sukūriant jų metematinius modelius pasitelkiant FLUX® 9 programinį paketą. Darbe sukurtas specialus eksperimentinis stendas ir jo valdymo algoritmas. Pagal šį valdymo algoritmą, pasitelkiant Labview® 6.1 programinį paketą, parašyta stendo valdymo programa. FLUX® 9 programos aplinkoje sudaryti spiralinio induktoriaus modeliai. Gautos spiralinio induktoriaus magnetinio lauko priklausomybės nuo magnetinio lauko jutiklio padėties erdvėje. Tyrimų rezultatai suteikia galimybę prognozuoti realaus spiralinio induktoriaus parametrus, neatliekant brangių ir ilgai trunkančių eksperimentų. / Helix indicators of two types and their mathematical models are analyzed in this paper. Tests of the spiral indicator have been performed using a special experimental stand and establishing their mathematical models with a help of the FLUX® 9 software package. A special experimental stand and control algorithm have been developed in this research work. Based on this control algorithm a stand control program has been created with a help of the Labview® 6.1 software package. In the FLUX® 9 software environment, simulation models of the helix indicator have been established. Dependence of the magnetic field of the helix indicator on the location of the magnetic field sensor in the space was investigated. The results of the research provide for a possibility to forecast parameters of the real helix indicator avoiding expensive and long lasting experiments.

Orientador: Prof. Dr. Carlos Eduardo Capovilla / Dissertação (mestrado) - Universidade Federal do ABC, Programa de Pós-Graduação em Engenharia Elétrica, 2015. / Este trabalho tem como escopo o projeto e implementação de indutores ativos integrados em tecnologia CMOS para operação em circuitos integrados de r'adio frequência. Tais sistemas demandam por indutores passivos integrados, sendo que estes geralmente apresentam baixa indutância, baixo fator de qualidade, e tamanhos relativamente grandes. Estes fatores são limitantes no projeto de circuitos integrados. Como alternativa, indutores ativos integrados têm sido propostos, com o uso de circuitos que emulam o efeito do indutor passivo convencional. Estes circuitos apresentam menor dimens¿ao, possibilidade de ajustes no valor da indut¿ancia, da frequ¿encia de opera¸c¿ao, do fator de qualidade, ao custo de consumo de pot¿encia DC e um relativo aumento no ru'ýdo total do sistema. Al'em de um profundo estudo, quatro topologias distintas de indutores ativos integrados foram abordadas e projetadas, em seguida foi projetado um VCO aplicando dois indutores ativos como ressonadores. Uma an'alise a n'ývel de projeto utilizando a t'ecnica de-embedding 'e aplicada no projeto de um indutor ativo. Os modelos dos componentes utilizados s¿ao baseados na biblioteca CMOS em alta frequ¿encia da foundry austr'ýaca AMS. / This study aimed to design and implement integrated active inductors in CMOS technology for operation in integrated radio frequency circuits. These systems demand for integrated passive inductors, and these usually have low inductance, low quality factor, and relatively large sizes. These factors are limiting in integrated circuit design. As an alternative integrated active inductors have been proposed, with the use of circuits that emulate the effect of conventional passive inductor. These circuits have smaller, the possibility for tuning the inductance value, the operation frequency, quality factor, at the cost of DC power consumption and a relative increase in total system noise. In addition to a thorough study, four different topologies ofintegrated active inductors were approached and designed, then was design a VCO applying two active inductors as resonators. An examination at the design level using the de-embedding technique is applied in the design of an active inductor. The models of the components used are based on CMOS library at high frequency of the Austrian foundry AMS.

Orientador: Prof. Dr. Carlos Eduardo Capovilla / Dissertação (mestrado) - Universidade Federal do ABC, Programa de Pós-Graduação em Engenharia Elétrica, 2017.

abstract: Inductors are fundamental components that do not scale well. Their physical limitations to scalability along with their inherent losses make them the main obstacle in achieving monolithic system-on-chip platform (SoCP). For past decades researchers focused on integrating magnetic materials into on-chip inductors in the quest of achieving high inductance density and quality factor (QF). The state of the art on-chip inductor is made of an enclosed magnetic thin-film around the current carrying wire for maximum flux amplification. Though the integration of magnetic materials results in enhanced inductor characteristics, this approach has its own challenges and limitations especially in power applications. The current-induced magnetic field (HDC) drives the magnetic film into its saturation state. At saturation, inductance and QF drop to that of air-core inductors, eliminating the benefits of integrating magnetic materials. Increasing the current carrying capability without substantially sacrificing benefits brought on by the magnetic material is an open challenge in power applications. Researchers continue to address this challenge along with the continuous improvement in inductance and QF for RF and power applications. In this work on-chip inductors incorporating magnetic Co-4%Zr-4%Ta -8%B thin films were fabricated and their characteristics were examined under the influence of an externally applied DC magnetic field. It is well established that spins in magnetic materials tend to align themselves in the same direction as the applied field. The resistance of the inductor resulting from the ferromagnetic film can be changed by manipulating the orientation of magnetization. A reduction in resistance should lead to decreases in losses and an enhancement in the QF. The effect of externally applied DC magnetic field along the easy and hard axes was thoroughly investigated. Depending on the strength and orientation of the externally applied field significant improvements in QF response were gained at the expense of a relative reduction in inductance. Characteristics of magnetic-based inductors degrade with current-induced stress. It was found that applying an externally low DC magnetic field across the on-chip inductor prevents the degradation in inductance and QF responses. Examining the effect of DC magnetic field on current carrying capability under low temperature is suggested. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2014