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Low frequency sinusoidal oscillator for impedance spectroscopyRevanna, Nagaraja 22 July 2014 (has links)
Impedance measurement as a function of frequency is being increasingly used for the detection of organic molecules. The main building block required for this is a sinusoidal oscillator whose frequency can be varied in the range of a few KHz to tens of MHz. The thesis describes the design of Integrated CMOS Oscillator Circuits. There are 2 designs presented in the thesis, one of which is based on the Wien Bridge and the other, on an LC architecture. They provide both in-phase and quadrature outputs needed for the determination of the real and imaginary parts of complex impedances. The inductor in the LC tank is realized by gyration of a capacitor. This needs two variable transconductance elements. Linear transconductance elements with decoupled transconductance gm and output conductance go is presented. A novel circuit for detecting and controlling the amplitude of oscillation is described. A current mode technique to scale the capacitance is also discussed. Since this oscillator is used in an inexpensive hand-held instrument, both power consumption and chip area must be minimized. A comparison between the Wien Bridge and the LC tank based oscillator is presented. Simulation results pertaining to the design of the different blocks of the circuit are made available. / text
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Σχεδίαση και ανάπτυξη ψηφιακά ελεγχόμενου ταλαντωτή (Digitally Controlled Oscillator) στις συχνότητες 1.6-2 GHzΖωγράφος, Βασίλης 17 July 2014 (has links)
Σε αυτήν την εργασία μελετήθηκε και σχεδιάστηκε ένας ψηφιακά ελεγχόμενος ταλαντωτής (DCO) με σκοπό GSM εφαρμογή. Οι συχνότητες λειτουργίας κυμαίνονται στο φάσμα 1.6GHz – 2GHz με βήμα 20kHz. Ο θόρυβος φάσης ποσοτικοποιείται στα -160dB/Hz σε 20 MHz απόκλιση. Ο έλεγχος του DCO γίνεται πλήρως ψηφιακά επιτρέποντας την υλοποίηση πλήρους ψηφιακού βρόχου κλειδώματος φάσης (ADPLL) και καθολικού system on chip design (SoC). Ο ταλαντωτής καταναλώνει 4,5 mWatt με 3,76 mA ρεύμα σε 1.2 V τροφοδοσία. / A Digitally Controlled Oscillator is studied and designed for GSM application. The operating frequencies are 1.6-2GHz with tuning range of 400MHz and finest step size 20 KHz. A fully digital control is achieved form where arises the opportunity for fabrication of an All-Digital Phase Locked Loop (ADPLL) and the whole system on chip (SoC). The proposed DCO core consumes 3.76mA from a 1.2V supply.
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Méthodologie de conception de circuits analogiques pour des applications radiofréquence à faible consommation de puissance / Design methodology for low power RF analog circuitsFadhuile-Crepy, François 06 January 2015 (has links)
Les travaux de thèse présentés se situent dans le contexte de la conception de circuits intégrés en technologie CMOS avancée pour des applications radiofréquence à très faible consommation de puissance. Les circuits sont conçus à travers deux concepts. Le premier est l'utilisation du coefficient d'inversion qui permet de normaliser le transistor en fonction de sa taille et de sa technologie, ceci permet une analyse rapide pour différentes performances visées ou différentes technologies. La deuxième approche est d'utiliser un facteur de mérite pour trouver la polarisation la plus adéquate d'un circuit en fonction de ses performances. Ces deux principes ont été utilisés pour définir des méthodes de conception efficaces pour deux blocs radiofréquence : l'amplificateur faible bruit et l'oscillateur. / Thesis work are presented in the context of the integrated circuits design in advanced CMOS technology for ultra low power RF applications. The circuits are designed around two concepts. The first is the use of the inversion coefficient to normalize the transistor as a function of its size and its technology, this allows a quick analysis for different performances or different technologies. The second approach is to use a figure of merit to find the most appropriate polarization of a circuit based on its performance. These two principles were used to define effective design methods for two RF blocks: low noise amplifier and oscillator.
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Design of a Differential Cross-Coupled Power LC Oscillator with ASK ModulationSarker, Sanjay January 2023 (has links)
Rapid growth in the field of communications industry has led to newer opportunities and challenges in the design of CMOS based monolithic integrated circuits. ASK modulators are a class of digital modulators which are known for their relative simplicity of implementation for low cost applications in the industrial and biomedical domains. This thesis presents a LC-based CMOS Amplitude Shift Keying (ASK) modulator scheme which demonstrates promising capability for radio frequency designs. This work describes the design and implementation of differential cross-coupled NMOS only LC power oscillator with ASK modulation to operate at 2.4 GHz frequency. In this work, 65nm CMOS process technology has been used for implementation. The work mainly focused on system parameters such as oscillation frequency, output signal power, power consumption and phase noise. The LC tank was created with a centre-tap on-chip differential spiral inductor and a Metal Insulator Metal (MIM) capacitor. The method of a current mirror with switching technique is employed for biasing the LC oscillator as well as ASK modulation output. The oscillator circuit has been optimised by using a simulation based approach to study the design and measurements to gain a greater insight into the performance of the ASK modulator. An output signal power of -1.59dBm at 2.30 GHz with a phase noise of -115.39dBc/Hz@1MHz and a power consumption of 5.92mW has been achieved at the layout level. Optimal ASK modulated output performance has been obtained for the data rate of up to around 40Mbits/s. In this thesis, simulation results have been presented for both the schematic and the layout levels.
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Biological Agent Sensing Integrated Circuit (BASIC): A New Complementary Metal-oxide-semiconductor (CMOS) Magnetic Biosensor SystemZheng, Yi 10 June 2014 (has links)
Fast and accurate diagnosis is always in demand by modern medical professionals and in the area of national defense. At present, limitations of testing speed, sample conditions, and levels of precision exist under current technologies, which are usually slow and involve testing the specimen under laboratory conditions. Typically, these methods also involve several biochemical processing steps and subsequent detection of low energy luminescence or electrical changes, all of which reduce the speed of the test as well as limit the precision. In order to solve these problems and improve the sensing performance, this project proposes an innovative CMOS magnetic biological sensor system for rapidly testing the presence of potential pathogens and bioterrorism agents (zoonotic microorganisms) both in specimens and especially in the environment. The sensor uses an electromagnetic detection mechanism to measure changes in the number of microorganisms--tagged by iron nanoparticles--that are placed on the surface of an integrated circuit (IC) chip. Measured magnetic effects are transformed into electronic signals that count the number and type of organisms present. This biosensor introduces a novel design of a conical-shaped inductor, which achieves ultra-accuracy of sensing biological pathogens. The whole system is integrated on a single chip based on the fabrication process of IBM 180 nm (CMOS_IBM_7RF), which makes the sensor small-sized, portable, high speed, and low cost. The results of designing, simulating, and fabricating the sensor are reported in this dissertation. / Ph. D.
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Phase noise reduction of a 0.35 μm BiCMOS SiGe 5 GHz Voltage Controlled OscillatorLambrechts, Johannes Wynand 11 November 2009 (has links)
The research conducted in this dissertation studies the issues regarding the improvement of phase noise performance in a BiCMOS Silicon Germanium (SiGe) cross-coupled differential-pair voltage controlled oscillator (VCO) in a narrowband application as a result of a tail-current shaping technique. With this technique, low-frequency noise components are reduced by increasing the signal amplitude without consuming additional power, and its effect on overall phase noise performance is evaluated. The research investigates effects of the tail-current as a main contributor to phase noise, and also other effects that may influence the phase noise performance like inductor geometry and placement, transistor sizing, and the gain of the oscillator. The hypothesis is verified through design in a standard 0.35 μm BiCMOS process supplied by Austriamicrosystems (AMS). Several VCOs are fabricated on-chip to serve for a comparison and verify that the employment of tail-current shaping does improve phase noise performance. The results are then compared with mathematical models and simulated results, to confirm the hypothesis. Simulation results provided a 3.3 dBc/Hz improvement from -105.3 dBc/Hz to -108.6 dBc/Hz at a 1 MHz offset frequency from the 5 GHz carrier when employing tail-current shaping. The relatively small increase in VCO phase noise performance translates in higher modulation accuracy when used in a transceiver, therefore this increase can be regarded as significant. Parametric analysis provided an additional 1.8 dBc/Hz performance enhancement in phase noise that can be investigated in future works. The power consumption of the simulated VCO is around 6 mW and 4.1 mW for the measured prototype. The circuitry occupies 2.1 mm2 of die area. Copyright / Dissertation (MEng)--University of Pretoria, 2010. / Electrical, Electronic and Computer Engineering / unrestricted
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