The main contents of this thesis are improving a UWB LNA, and analyze the input-matching, the noise, and the gain. First we use the feedback of the input transistor , and it different from the traditional source-degeneration inductor.The design can increase the gain and reduce the noise of the circuit.The second stage CS architecture designed to improve the overall gain of the circuit. Output level to use the source follower with the device even when the output matching . In the input matching,we use a shunt inductor and the impedance of the transistor itself to achieve high frequency matching. The UWB LNA dissipates 16.8 mW power and achieves input return loss (S11) -9.3 to -10 dB, output return loss (S22) -16.83 to -13 dB, forward gain (S21) 13.8 to 11.6 dB, reverse isolation (S12) below -30 dB, and noise figure (NF) of 2.38~3.31 dB over the 6~10 GHz band of interest. 1-dB compression point (P1dB) of -12.5 dBm and input third-order inter-modulation point (IIP3) of -2.5 dBm are achieved at 6 GHz.

The permeation of CMOS technology to radio frequencies and beyond has fuelled an urgent need for a diverse array of passive and active circuits that address the challenges of rapidly emerging wireless applications. While traditional analog based design approaches satisfy some applications, the stringent requirements of newly emerging applications cannot necessarily be addressed by existing design ideas and compel designers to pursue alternatives. One such alternative, an amalgamation of microwave and analog design techniques, is pursued in this work. A number of passive and active circuits have been designed using a combination of microwave and analog design techniques. For passives, the most crucial challenge to their CMOS implementation is identified as their large dimensions that are not compatible with CMOS technology. To address this issue, several design techniques – including multi-layered design and slow wave structures – are proposed and demonstrated through experimental results after being suitably tailored for CMOS technology. A number of novel passive structures - including a compact 10 GHz hairpin resonator, a broadband, low loss 25-35 GHz Lange coupler, a 25-35 GHz thin film microstrip (TFMS) ring hybrid, an array of 0.8 nH and 0.4 nH multi-layered high self resonant frequency (SRF) inductors are proposed, designed and experimentally verified. A number of active circuits are also designed and notable experimental results are presented. These include 3-10 GHz and DC-20 GHz distributed low noise amplifiers (LNA), a dual wideband Low noise amplifier and 15 GHz distributed voltage controlled oscillators (DVCO). Distributed amplifiers are identified as particularly effective in the development of wideband receiver front end sub-systems due to their gain flatness, excellent matching and high linearity. The most important challenge to the implementation of distributed amplifiers in CMOS RFICs is identified as the issue of their miniaturization. This problem is solved by using integrated multi-layered inductors instead of transmission lines to achieve over 90% size compression compared to earlier CMOS implementations. Finally, a dual wideband receiver front end sub-system is designed employing the miniaturized distributed amplifier with resonant loads and integrated with a double balanced Gilbert cell mixer to perform dual band operation. The receiver front end measured results show 15 dB conversion gain, and a 1-dB compression point of -4.1 dBm in the centre of band 1 (from 3.1 to 5.0 GHz) and -5.2 dBm in the centre of band 2 (from 5.8 to 8 GHz) with input return loss less than 10 dB throughout the two bands of operation.

Different wireless communication systems utilizing different standards and for multiple applications have penetrated the normal people's life, such as Cell phone, Wireless LAN, Bluetooth, Ultra wideband (UWB) and WiMAX systems. The wireless receiver normally serves as the primary part of the system, which heavily influences the system performance. This research concentrates on the designs of several important blocks of the receiver; multi-stage amplifier and low noise amplifier. Two novel multi-stage amplifier typologies are proposed to improve the bandwidth and reduce the silicon area for the application where a large capacitive load exists. They were designed using AMI 0.5 m µ CMOS technology. The simulation and measurement results show they have the best Figure-of-Merits (FOMs) in terms of small signal and large signal performances, with 4.6MHz and 9MHz bandwidth while consuming 0.38mW and 0.4mW power from a 2V power supply. Two Low Noise Amplifiers (LNAs) are proposed, with one designed for narrowband application and the other for UWB application. A noise reduction technique is proposed for the differential cascode Common Source LNA (CS-LNA), which reduces the LNA Noise Figure (NF), increases the LNA gain, and improves the LNA linearity. At the same time, a novel Common Gate LNA (CG-LNA) is proposed for UWB application, which has better linearity, lower power consumption, and reasonable noise performance. Finally a novel practical current injection built-in-test (BIT) technique is proposed for the RF Front-end circuits. If the off-chip component Lg and Rs values are well controlled, the proposed technique can estimate the voltage gain of the LNA with less than 1dB (8%) error.

The expanding wireless market has resulted in complex integrated transceivers that involve RF, analog and mixed-signal circuits, resulting in expensive and complicated testing. The most important challenges that test engineering faces today are (1) providing a fast and accurate fault-diagnosis and performance characterization so as to accelerate the time-to-market and (2) providing an inexpensive test strategy that can be integrated with the design so as to aid the high-volume manufacturing process. The first part of the research focuses on the design of an RMS detector for built-in-self-test (BIST) of an RF integrated transceiver that can directly provide information at various test points in the design. A cascode low noise amplifier (LNA) has been chosen as the device under test (DUT). A compact (< 0.031 mm2) RF RMS detector with negligible input capacitance (< 13 fF) has been implemented in 0.35 µm CMOS technology along with the DUT. Experimental results are currently being assimilated and compared with the simulation results. Frequency limitations were encountered during the testing process due to unexpected increase in the value of the N-well resistors. All other problems faced during the testing, as well as the results obtained so far, are presented in this thesis. In the second part of the research, the use of the RMS detector for BIST has been extended to a continuous-time high-frequency boost-filter. The proposed HF RMS detector has been implemented along with a 24 dB 350 MHz boost filter as the DUT on 0.35 µm CMOS technology. The HF RMS detector occupies 0.07 mm2 and has an input capacitance of 7 fF. The HF RMS detector has a dynamic range greater than 24 dB starting from -38 dBm of input power. The bandwidth and boost of the filter have been accurately estimated in simulation using the HF RMS detector. The sensitivity of an intermediate band pass node of the filter has also been monitored to predict the filter's sensitivity to Q errors. The final part of the research describes the design of a single-ended to differential converter for use in a broadband transceiver operating from 50-850 MHz. This circuit is used as the second stage in the transceiver after the LNA. The design has been simulated on a 0.35 um CMOS process and has a power consumption of 13.5 mW and less than 8 dB of noise figure over the entire band. It is capable of driving a 500fF load with less than 1dB of gain ripple over the entire band (50-850 MHz).

The pursuit of dense monolithic integration and higher operating speed continues to push the integrated circuit (IC) fabrication technologies to their limits. The increasing process variation, associated with aggressive technology scaling, is having a negative impact on circuit yield in current IC technologies, and the problem is likely to become worse in the future. Circuit solutions that are more tolerant of the process variations are needed to fully utilize the benefits of technology scaling. The primary goal of this research is to develop high-frequency circuits that can deliver consistent performance even under the threat of increasing process variation. These circuits can be used to build ``self-healing" systems, which can detect process imperfections and compensate accordingly to optimize performance. In addition to improving yield, such adaptive circuits and systems can provide more robust and efficient solutions for a wide range of applications under varying operational and environmental conditions.Silicon-germanium (SiGe) BiCMOS technology is an ideal platform for highly integrated systems requiring both high-performance analog and radio-frequency (RF) circuits as well as large-scale digital functionality. This research is focused on designing circuit components for a high-frequency wideband self-healing receiver in SiGe BiCMOS technology. An adaptive image-reject mixer, low insertion-loss switches, a wideband low-noise amplifier (LNA), and a SiGe complementary LC oscillator were designed. Healing algorithms were developed, and automated self-healing of multiple parameters of the mixer was demonstrated in measurement. A monte-carlo simulation based methodology was developed to verify the effectiveness of the healing procedure. In summary, this research developed circuits, algorithms, simulation tools, and methods that are useful for building "self-healing" systems.

Chemical modifications of oligonucleotides provide an important tool to understand how the natural substrate works as well as how to improve their biochemical and biological properties as potential therapeutics and diagnostics. Our carba-LNA (2',4'-carba-bridged Locked Nucleic Acid) modified oligo-DNA or -RNA have been found to be useful to modulate oligo-RNA and -DNA activity. This thesis is based on four papers: Paper I (J. Org. Chem. 2010, 75, 7112-7128) deals with the synthesis of 2',4'-propylene-bridged (Carba-ENA) thymidine and its analogues. These carba-ENA nucleosides have been subsequently incorporated into 15mer antisense oligodeoxynucleotides (AON), and their affinity toward complementary mRNA and DNA, as well as their nuclease resistance and RNase H recruitment capability have been investigated in comparison with those of the native and ENA counterparts. Paper II (J. Org. Chem. 2012, 77, 6855–6872) illustrates the synthesis of dimethylbicyclo[2.2.1]heptane and a diastereomeric mixture of oxabicyclo[2.2.1]heptanes by the free-radical ring-closure reaction approach. The role of steric factors for different chair- and the boat-like transition states was evaluated involving the 5-exo radical ring closure reaction to a tethered olefin. Paper III (J. Org. Chem. 2012, 77, 9747-9755) shows an unusual strain releasing reaction of 1-mesyloxy-8,7-dimethylbicyclo[2.2.1]heptane by a base-promoted substitution at the chiral C3 followed by spontaneous concerted ring opening involving the most strained C2-C3-C4 bonds (with bond angle 94°) and the C2 bridgehead leading to anti-endo elimination of the C1-mesyloxy group by the conjugate base of adenine or thymine to give two diastereomeric C3'(S) and C3'(R) derivatives of 1-thyminyl and 9-adeninyl cyclohexene, and a mechanistic rational has been formulated. Paper IV (J. Org. Chem. 2014, 79, 7266−7276) focuses on the diastereospecific synthesis of E/Z bicyclo[2.2.1]heptane-7- and oxabicyclo[2.2.1]heptane-8-oximes and their corresponding C-nitroso derivatives. The comparative kinetic and thermodynamic studies of the conversions of the C-nitroso side products to the required oximes have been delineated leading to the synthesis of desmethyl sugar derivatives.

Determination of quantitative expression levels of alternatively spliced isoforms provides an important approach to the understanding of the functional significance of each isoform. Real-time PCR using exon junction overlapping primers has been shown to allow specific detection of each isoform. However, this design often suffers from severe cross amplification of sequences with high homology at the exon junctions. We used human GFRα2b as a model to evaluate the specificity of primers substituted with locked nucleic acids (LNAs). We demonstrate here that single LNA substitutions at different positions of 3’ terminus could improve the discrimination of the primers against GFRα2a template, a highly homologous isoform. While LNA substitutions of GFRα2b primer at the residues possessing different sequences as GFRα2a has limited improvement in specificity, two consecutive LNA substitutions preceding the different sequences has dramatically improved the discrimination by greater than 100,000-fold compared to the non-substituted primer. Thus, LNA when substituted at certain residues can allow the discrimination of highly homologous sequences. / Singapore-MIT Alliance (SMA)

This thesis offers the design and improvement of a 2 GHz to 20 GHz low noise amplifier (LNA) utilizing pHEMT technology. The pHEMT technology allows the LNA to generate a boosted signal at a lower noise figure (NF) while consuming less power and achieving smooth overall gain. The design achieves an overall gain (S21) of ≥ 10 dB with an NF ≤ 2 dB while consuming ≤ 30 mA of power while using commercial off-the-shelf (COTS) components.

Ce manuscrit présente une étude de la susceptibilité d’un amplificateur faible bruit (LNA)AsGa aux agressions électromagnétiques de forte puissance. La notion d’agressionélectromagnétique de forte puissance définit, du point de vue de la CEM, un environnementélectromagnétique particulier où les niveaux de champ électromagnétique sont tels qu’ilspeuvent engendrer une dégradation physique des composants électroniques du systèmevictime. Ces champs peuvent être générés par des systèmes particuliers appelés AED EM(arme à énergie dirigée électromagnétique).Cette étude s’intéresse ainsi non seulement à l’explication des effets physiques observés surles composants cibles, mais également à l’influence des paramètres de la sourceélectromagnétique sur la susceptibilité du composant.Cette thèse a été encadrée par les équipes du laboratoire IMS de l’université de Bordeauxd’une part, et du CEA Gramat d’autre part. / In this PhD thesis dissertation, a study of a GaAs low-noise amplifier (LNA) susceptibility tohigh power electromagnetic interference is presented.The term high power electromagnetic interference refers to a particular electromagneticenvironment in which E-field and H-field levels are high enough to cause physical damage tothe victim’s system electronic components.Such high level fields can be generated by dedicated systems, called electromagneticdirected energy weapons (DEW).The study presented in this document focuses not only on explaining failure mechanismstriggered by such interference, but also shows discussion on electromagnetic sourcesparameters trimming influence on component’s susceptibility.

Neste trabalho foi feita uma ampla pesquisa sobre blocos de RF, VCOs e LNAs, que fazem parte de transceptores. Esses blocos foram projetados utilizando um indutor externo com um alto Q, com o intuito de melhorar as principais características de desempenho de cada um dos blocos. Com a finalidade de ter um ponto de comparação foram projetados os mesmos blocos implementando todos os indutores integrados (internos). Foi proposta a utilização da tecnologia flip chip para interconectar os indutores externos aos dies dos circuitos, devido às vantagens que ela apresenta. Para implementar os indutores externos propôs-se um processo de fabricação completo, incluindo especificação das etapas de processos e dos materiais utilizados para estes indutores. Adicionalmente foi projetado um conjunto de máscaras para fabricar os indutores externos e fazer a montagem e teste dos circuitos que os utilizam. Para validar o processo proposto e caracterizar os indutores externos foram projetadas diferentes estruturas de teste. O Q do indutor externo é da ordem de 6 vezes maior que do indutor integrado, para a tecnologia escolhida. Foram projetados e fabricados dois VCOs LC: FC-VCO (Flip Chip VCO com o indutor externo), OC-VCO (On Chip VCO com o indutor interno), e dois LNAs CMOS de fonte comum cascode com degeneração indutiva: FC-LNA (Flip Chip LNA com o indutor Lg externo) e OC-LNA (On Chip LNA com todos os indutores internos). O objetivo desses quatro circuitos é demonstrar que o desempenho de circuitos RF pode ser melhorado, usando indutores externos com alto Q, conectados através de flip chip. Para implementação desses circuitos utilizou-se a tecnologia de processo AMS 0,35µm CMOS, para aplicações na banda 2,4GHz ISM, considerando o padrão Bluetooth. Foram medidos apenas os blocos com os indutores internos (OC-VCO e OC-LNA). Para os blocos com os indutores externos (FC-VCO e FC-LNA) foram apresentados os resultados de simulação pós-layout. Através da comparação dos resultados de simulação entre os VCOs foi comprovado que o uso de um indutor externo com alto Q conectado via flip chip pode melhorar significativamente o ruído de fase dos VCOs, atingindo -117dBc/Hz a 1MHz de frequência de offset para o FC-VCO, em 2,45GHz, onde a FOM é 8dB maior que o OC-VCO. Outro ganho foi através da área poupada, o FC-VCO tem uma área cerca de 83% menor que a do OC-VCO. Após as medidas elétricas do OC-VCO obteve-se um desempenho do ruído de fase de -110dBc/Hz@1MHz para 2,45GHz, e -112dBc/Hz@1MHz para 2,4GHz, o qual atende as especificações de projeto. O FC-LNA, que foi implementado com o indutor de porta Lg externo ao die, conectado via flip chip, atingiu uma figura de ruído de 2,39dB, 1,1dB menor que o OC-LNA com o mesmo consumo de potência. A área ocupada pelo FC-LNA é aproximadamente 30% menor do que o OC-LNA. Através das medidas elétricas do OC-LNA verificou-se que o circuito apresenta resultados adequados de S11 (perda de retorno da entrada) e S22 (perda de retorno da saída) na banda de frequências de interesse. No entanto, o valor do ganho apresenta uma redução em relação ao esperado. A proposta do trabalho de unir a tecnologia flip chip ao uso de indutores externos, proporciona circuitos mais compactos e consecutivamente mais baratos, pela economia de área de Si. Adicionalmente, após os indutores externos serem caracterizados, os mesmos indutores podem ser reutilizados independente da tecnologia CMOS utilizada facilitando o projeto dos blocos de RF em processos mais avançados. / This work presents a research about RF blocks that are used in Transceivers, VCOs and LNAs. These blocks were designed using a high-Q RF external inductor in order to improve the main performance characteristics. The same blocks were designed implementing all inductors on-chip (internal) in order to have a point of comparison. It was proposed the use of Flip Chip technology to interconnect the external inductors to the dies of the circuits due to the advantages that this technology offers. A full manufacturing process was proposed to implement the external inductors, including the specification of process steps and materials used for these inductors. Additionally, a set of masks was designed to fabricate the external inductors, to mount and test the circuits that used these inductors. Different test structures were designed to validate the proposed process and to characterize the external inductors. Q factor of the external inductor is around 6 times larger than the inductor integrated into the chosen IC technology. Two LC VCOs and two common-source cascode CMOS LNAs with inductive degeneration were designed and fabricated: FC-VCO (Flip Chip VCO using external inductor), OC-VCO (On Chip VCO using on-chip inductor), FCLNA (Flip Chip LNA using an external Lg inductor) and OC-LNA (On Chip LNA with all inductors implemented on-chip). The purpose of these four circuits is to demonstrate that the performance of RF circuits can be improved by using high-Q external inductors, connected by flip chip. The 0.35µm CMOS AMS technology was used to implement these circuits intended for applications in the 2.4 GHz ISM band, considering the Bluetooth standard. Were measured only the blocks with internal inductors (OC-VCO and OC-LNA). For the blocks with external inductors (FCVCO and FC-LNA) were presented the results of post-layout simulation. The comparison between the VCOs simulations results demonstrates that using an external high-Q inductor connected by flip chip can significantly improve the phase noise of VCOs. FC-VCO reached a phase noise of -117dBc/Hz at 1MHz offset frequency and a FOM 8dB greater than the OC-VCO. Another important improvement was the saved area, the FC-VCO has an area approximately 83% lower than that of OC-VCO. After electrical characterizations of the OC-VCO, phase noise performances of -110dBc/Hz@1MHz for 2.45GHz and -112dBc/Hz@1MHz for 2.4GHz were obtained, that accomplish the design specifications. FC-LNA reached a noise figure of 2.39dB, 1.1dB lower than that of OC-LNA with the same power comsumption. The total area occupied by FC-LNA is around 30% lower than that OC-LNA. Measurement results of the OC-LNA showed that the circuit presents suitable S11 (input return loss) and S22 (output return loss) values in the desired frequency band. However, the gain value presents a reduction compared with the expected values. The proposal to use the flip chip technology together with external inductors, allows more compact and cheap circuits, because Silicon area can be saved. Moreover, after the external inductors being characterized, the same inductors can be reused regardless of the CMOS technology facilitating the design of RF blocks in more advanced processes.