Neste trabalho foi feita uma ampla pesquisa sobre blocos de RF, VCOs e LNAs, que fazem parte de transceptores. Esses blocos foram projetados utilizando um indutor externo com um alto Q, com o intuito de melhorar as principais características de desempenho de cada um dos blocos. Com a finalidade de ter um ponto de comparação foram projetados os mesmos blocos implementando todos os indutores integrados (internos). Foi proposta a utilização da tecnologia flip chip para interconectar os indutores externos aos dies dos circuitos, devido às vantagens que ela apresenta. Para implementar os indutores externos propôs-se um processo de fabricação completo, incluindo especificação das etapas de processos e dos materiais utilizados para estes indutores. Adicionalmente foi projetado um conjunto de máscaras para fabricar os indutores externos e fazer a montagem e teste dos circuitos que os utilizam. Para validar o processo proposto e caracterizar os indutores externos foram projetadas diferentes estruturas de teste. O Q do indutor externo é da ordem de 6 vezes maior que do indutor integrado, para a tecnologia escolhida. Foram projetados e fabricados dois VCOs LC: FC-VCO (Flip Chip VCO com o indutor externo), OC-VCO (On Chip VCO com o indutor interno), e dois LNAs CMOS de fonte comum cascode com degeneração indutiva: FC-LNA (Flip Chip LNA com o indutor Lg externo) e OC-LNA (On Chip LNA com todos os indutores internos). O objetivo desses quatro circuitos é demonstrar que o desempenho de circuitos RF pode ser melhorado, usando indutores externos com alto Q, conectados através de flip chip. Para implementação desses circuitos utilizou-se a tecnologia de processo AMS 0,35µm CMOS, para aplicações na banda 2,4GHz ISM, considerando o padrão Bluetooth. Foram medidos apenas os blocos com os indutores internos (OC-VCO e OC-LNA). Para os blocos com os indutores externos (FC-VCO e FC-LNA) foram apresentados os resultados de simulação pós-layout. Através da comparação dos resultados de simulação entre os VCOs foi comprovado que o uso de um indutor externo com alto Q conectado via flip chip pode melhorar significativamente o ruído de fase dos VCOs, atingindo -117dBc/Hz a 1MHz de frequência de offset para o FC-VCO, em 2,45GHz, onde a FOM é 8dB maior que o OC-VCO. Outro ganho foi através da área poupada, o FC-VCO tem uma área cerca de 83% menor que a do OC-VCO. Após as medidas elétricas do OC-VCO obteve-se um desempenho do ruído de fase de -110dBc/Hz@1MHz para 2,45GHz, e -112dBc/Hz@1MHz para 2,4GHz, o qual atende as especificações de projeto. O FC-LNA, que foi implementado com o indutor de porta Lg externo ao die, conectado via flip chip, atingiu uma figura de ruído de 2,39dB, 1,1dB menor que o OC-LNA com o mesmo consumo de potência. A área ocupada pelo FC-LNA é aproximadamente 30% menor do que o OC-LNA. Através das medidas elétricas do OC-LNA verificou-se que o circuito apresenta resultados adequados de S11 (perda de retorno da entrada) e S22 (perda de retorno da saída) na banda de frequências de interesse. No entanto, o valor do ganho apresenta uma redução em relação ao esperado. A proposta do trabalho de unir a tecnologia flip chip ao uso de indutores externos, proporciona circuitos mais compactos e consecutivamente mais baratos, pela economia de área de Si. Adicionalmente, após os indutores externos serem caracterizados, os mesmos indutores podem ser reutilizados independente da tecnologia CMOS utilizada facilitando o projeto dos blocos de RF em processos mais avançados. / This work presents a research about RF blocks that are used in Transceivers, VCOs and LNAs. These blocks were designed using a high-Q RF external inductor in order to improve the main performance characteristics. The same blocks were designed implementing all inductors on-chip (internal) in order to have a point of comparison. It was proposed the use of Flip Chip technology to interconnect the external inductors to the dies of the circuits due to the advantages that this technology offers. A full manufacturing process was proposed to implement the external inductors, including the specification of process steps and materials used for these inductors. Additionally, a set of masks was designed to fabricate the external inductors, to mount and test the circuits that used these inductors. Different test structures were designed to validate the proposed process and to characterize the external inductors. Q factor of the external inductor is around 6 times larger than the inductor integrated into the chosen IC technology. Two LC VCOs and two common-source cascode CMOS LNAs with inductive degeneration were designed and fabricated: FC-VCO (Flip Chip VCO using external inductor), OC-VCO (On Chip VCO using on-chip inductor), FCLNA (Flip Chip LNA using an external Lg inductor) and OC-LNA (On Chip LNA with all inductors implemented on-chip). The purpose of these four circuits is to demonstrate that the performance of RF circuits can be improved by using high-Q external inductors, connected by flip chip. The 0.35µm CMOS AMS technology was used to implement these circuits intended for applications in the 2.4 GHz ISM band, considering the Bluetooth standard. Were measured only the blocks with internal inductors (OC-VCO and OC-LNA). For the blocks with external inductors (FCVCO and FC-LNA) were presented the results of post-layout simulation. The comparison between the VCOs simulations results demonstrates that using an external high-Q inductor connected by flip chip can significantly improve the phase noise of VCOs. FC-VCO reached a phase noise of -117dBc/Hz at 1MHz offset frequency and a FOM 8dB greater than the OC-VCO. Another important improvement was the saved area, the FC-VCO has an area approximately 83% lower than that of OC-VCO. After electrical characterizations of the OC-VCO, phase noise performances of -110dBc/Hz@1MHz for 2.45GHz and -112dBc/Hz@1MHz for 2.4GHz were obtained, that accomplish the design specifications. FC-LNA reached a noise figure of 2.39dB, 1.1dB lower than that of OC-LNA with the same power comsumption. The total area occupied by FC-LNA is around 30% lower than that OC-LNA. Measurement results of the OC-LNA showed that the circuit presents suitable S11 (input return loss) and S22 (output return loss) values in the desired frequency band. However, the gain value presents a reduction compared with the expected values. The proposal to use the flip chip technology together with external inductors, allows more compact and cheap circuits, because Silicon area can be saved. Moreover, after the external inductors being characterized, the same inductors can be reused regardless of the CMOS technology facilitating the design of RF blocks in more advanced processes.

L’émergence de l’internet des objets (IoT), les applications de types réseaux de capteurs et les nouveaux réseaux pour les objets nécessite le développement d’un nouvel écosystème. De nos jours, elle bouscule plusieurs secteurs de notre société. Cela, sollicite la conception des émetteurs-récepteurs radios fréquence à basse consommation étant donné que la réduction de la consommation d’énergie présente une contrainte importante dans le cas de ces applications afin d’obtenir une autonomie accrue. Dans ce contexte l’objet des travaux de thèse est de proposer des techniques de réduction de la consommation des récepteurs radio fréquence tout en cherchant à minimiser l’impact de ces techniques sur les performances des récepteurs réalisés. Dans l’optique de réaliser un démonstrateur composé d’un émetteur récepteur permettant une transmission vidéo, deux récepteurs UWB impulsionnel non cohérent à gestion dynamique d’énergie ont été réalisés en technologie HCMOS9 0.13µm de STMicroelectronics. Dans un premier temps, une étude des techniques de gestion dynamique d’alimentation sur les circuits analogiques radio fréquences a été proposée. Cette étude a été menée sur différents circuits qui semblent être le plus utilisés en conception de circuits analogiques à hautes fréquences. La technique proposée permet d’allumer et éteindre les circuits entre deux impulsions reçues afin de réduire leur consommation. L’application de cette technique nécessite par ailleurs une réduction du temps de latence causé par l’allumage et les extinctions des fonctions radio fréquence. Dans ce cas, un modèle permettant de minimiser l’impact de l’effet d’encapsulation a été proposé. / The emergence of the Internet of Things (IoT), sensors networks and new networks to objects requires the development of a new ecosystem. Nowadays, it upsets many sectors of our society. It solicits design of low power radio transceivers as reducing energy consumption presents a major constraint in the case of these applications in order to obtain greater autonomy. In this context, the purpose of the thesis is to provide techniques allowing reducing the power consumption of radio frequency receivers while seeking to minimize the impact of these technologies on the performance of the achieved receiver. In order to realize a demonstrator consists of a transmitter and receiver for video transmission, two UWB receivers with dynamic power management have been made in 0.13µm HCMOS9 technology from STMicroelectronics. First, a study of dynamic power management techniques on analog radio frequency circuits was proposed. This study was conducted on different circuits that seem to be the most used in design of analog circuits at high frequencies. The proposed technique allows to turn on and off the circuit between two pulses received to reduce their consumption. The application of this technique also requires a reduction of the latency caused by the ignition and the extinction radio frequency functions. In this case, a model to minimize the impact of the encapsulating effect has been proposed. Secondly, the first receiver was performed for 6-10GHz frequency band and implements dynamic power management using the technique of "Power Gating".

O projeto de amplificadores de baixo ruído (LNA) aparenta ser um trabalho simples pelos poucos componentes ativos e passivos que o compõe, porém a alta correlação entre os seus parâmetros de projeto dificulta muito esse trabalho. Esta dissertação apresenta uma proposta para contornar essa dificuldade: o uso de algoritmos metaheurísticos, em particular algoritmos genéticos e simulated annealing. Algoritmos metaheurísticos são técnicas avançadas que emulam princípios físicos ou naturais para resolver problemas com alto grau de complexidade. Esses algoritmos estão emergindo nos últimos anos porque têm mostrado eficiência e eficácia. São feitos neste trabalho os projetos de três LNAs, dois (LNA1 e LNA2) para sistemas com arquitetura homódine (LNA com carga capacitiva) e um (LNA3) para sistemas com arquitetura heteródine (LNA com carga resistiva) utilizando-se algoritmos genéticos e simulated annealing (recozimento simulado). Apresenta-se inicialmente a análise detalhada da configuração escolhida para os projetos (fonte comum cascode com degeneração indutiva FCCDI). A frequência de operação dos LNAs é 1,8 GHz e a fonte de alimentação de 2,0 V. Para o LNA1 e o LNA2 se atingiu uma figura de ruído de 2,8 dB e 3,2 dB, consumo de potência de 6,8 mW e 2,7 mW e ganho de tensão de 22 dB e 24 dB, respectivamente. Para LNA3 se atingiu uma figura de ruído de 3,5 dB, consumo de potência de 7,8 mW e ganho de tensão de 15,5 dB. Os resultados obtidos e comparações feitas com LNAs da literatura demonstram viabilidade e eficácia da aplicação de algoritmos metaheurísticos no projeto de LNA. Neste trabalho utilizaram-se as ferramentas ELDO (simulador de circuitos elétricos), versão 2009.1 patch1 64 bits, ASITIC (para projetar e simular os indutores), versão 03.19.00.0.0.0 e MATLAB (o toolbox fornece os algoritmos metaheurísticos), versão 7.9.0.529 R2009b. Além disso, os projetos foram desenvolvidos na tecnologia CMOS 0,35 m da AMS (Austria Micro Systems). / The design of low noise amplifiers (LNA) seems to be a simple work because the small number of active and passive device that they are composes, nevertheless the high trade off of LNA parameters complicates very much the work. This research presents a proposal to contour act the obstacle: to use metaheuristic algorithms, in special genetic algorithms and simulated annealing. The metaheuristic algorithms are advanced techniques that emulate physics or natural principles to solve problems with high grade of complexity. They have been emerging in the last years because they have shown effectiveness and efficiency. In this dissertation were designed three LNAs using genetic algorithms and simulated annealing: two (LNA1 and LNA2) to homódine architecture (LNA with capacitive load) and one (LNA3) to heteródine architecture (LNA with resistive load). First it is show the detailed analysis of configuration chosen to the designs (common source cascode with inductive degeneration). The operation frequency is 1.8 GHz and power supply is 2.0 V for all LNAs. LNA1 and LNA2 reached a noise figure of 2.8 dB and 3.2 dB, a dissipation power of 6.8 mW and 2.7 mW, and a voltage gain of 22 dB and 24 dB respectively. LNA3 reached 3.5 dB of noise figure, 7.8 mW of dissipation power, and 15.5 dB of voltage gain. The results obtained and the comparisons with LNAs from the literature demonstrate that the metaheuristic algorithms show efficiency and effectiveness in the design of LNA. This study was developed with the help of the tools ELDO (electric circuit simulator) version 2009.1 patch1 64 bits, ASITIC (to design and simulate the inductors) version 03.19.00.0.0.0, and MATLAB (the toolbox provides the metaheuristic algorithms) version 7.9.0.529 R2009b. Furthermore, the designs were developed on CMOS 0.35 AMS (Austria Micro Systems) technology.

O objetivo desta dissertação é propor o projeto de amplificadores de baixo rudo (LNAs) do tipo banda estreita e banda larga em tecnologia CMOS. O projeto de LNAs de banda estreita é representado através de um método de otimização conhecido como programação geométrica. Também, neste trabalho foi projetada uma topologia para LNAs de banda larga, aplicando a programação geométrica durante a fase inicial de projeto. Os layouts de ambos os circuitos foram desenhados e fabricados usando três processos CMOS diferentes. O aumento da utilização de circuitos digitais está reduzindo e substituindo a quantidade de circuitos analógicos implementados nos sistemas atuais. Nos transceptores de radiofrequência, a maior parte dos circuitos foi substituída por circuitos digitais equivalentes. A razão para esta substituição é devido a sua escalabilidade, variações PVT (Process, Voltage and Temperature) baixas, e menor tempo de projeto, resultado de um fluxo altamente automatizado. A redução do tempo de projeto representa um time-to-market menor e custos mais baixos. No entanto, o amplificador de baixo rudo é um dos blocos de radiofrequência que permanecem principalmente no domínio analógico, tornando a redução do tempo de projeto mediante a otimização do fluxo analógico como um bom foco de estudo. O LNA deve ser capaz de receber um sinal de baixa potência e alta frequência, e amplificá-lo adicionando o menor rudo possível, mantendo o casamento de impedâncias, baixo consumo de potência, e uma linearidade adequada a fim de evitar a distorção. Nesta dissertação, a maioria das especificações de desempenho citadas são formuladas rigorosamente e descritas como um programa geométrico. Além disso, vários scripts são escritos de forma a automatizar o fluxo de projeto. A programação geométrica é considerada como uma boa opção porque se o problema de otimização tem solução, o resultado é o ponto de otimização global, e pode ser atingido rapidamente (na ordem de segundos). Para um LNA fonte comum de banda estreita, o problema de projeto é completamente formulado como um programa geométrico, e alguns parâmetros normalmente desprezados, como as não idealidades dos indutores CMOS e a capacitância portadreno do transistor MOS são considerados no projeto. O problema de otimização é resolvido em minutos e testado em cinco processos CMOS diferentes, e para diferentes frequências de operação entre 1,5 GHz e 5 GHz. Os resultados são comparados e validados através de simulações, e dois layouts de LNAs para 2,45 GHz foram desenhados, fabricados e testados usando dois processos de 0,18 mm diferentes. Neste trabalho, também foi formulado um LNA de banda larga com cancelamento de rudo, e um bloco LNA-Misturador de banda larga é projetado incluindo a programação geométrica no cálculo da impedância de entrada e o cancelamento de rudo. Os layouts de dois protótipos diferentes do bloco LNA-Misturador de banda larga, operando na faixa de frequência entre 1 GHz e 5 GHz, foram desenhados e fabricados usando um processo de 0,18 mm. / This dissertation proposes the design of CMOS narrowband and wideband low noise amplifiers. The design problem of narrowband LNAs is represented as an optimization problem known as geometric programming. Furthermore, a topology for wideband LNAs is designed including the geometric programming in an early stage of the design. Both type of circuits were layouted and fabricated using three different CMOS processes. The tendency to increase the number of applications for digital-intensive circuitry, is reducing and replacing the amount of analog circuits implemented on systems nowadays. In radiofrequency transceivers, most of the circuits have been replaced by a digital-intensive counterpart. Digital circuitry is preferred over the analog one due to its scalability, low PVT (Process, Voltage and Temperature) variations, and shorter designing time result of a highly automated flow. The reduction of the designing time represents a faster time-to-market and lower costs. However, the low noise amplifier is one of the radiofrequency blocks that remain mainly in the analog domain, thus reducing its designing time by optimizing an analog design flow become a good focus of study. The LNA should be capable of receiving a low power and high frequency signal and amplify it adding the minimum noise possible, while maintaining good impedance matching, low power consumption and an adequate linearity in order to avoid distortion. In this dissertation, most of the performance parameters aforementioned are formulated rigorously and described as a geometric program. Moreover, various scripts are written in order to automate the design flow. The geometric programming is considered a good option because if the optimization problem is feasible, the result is the global optimum and can be obtained in seconds. For a common source narrowband LNA, the design problem is fully formulated as a geometric program and some parameters commonly neglected, as the CMOS inductors non-idealities and the gate-drain capacitance of MOS transistor are considered. The optimization problem is solved in minutes and tested on five different CMOS processes at different operating frequencies between 1.5 GHz and 5 GHz. The results are compared and validated through simulations, and two layouts for 2.45 GHz LNAs are drawn, fabricated and tested using two different 0.18 mm processes. In addition, a noise canceling wideband LNA is formulated, and a wideband LNA-Mixer cell is designed by including the geometric programming to estimate the input impedance matching and assure the noise cancelation. The layouts of two different prototypes of the wideband LNA-Mixer cells for the 1 GHz-5 GHz frequency band are drawn and fabricated using a 0.18 mm process.

O objetivo desta dissertação é propor o projeto de amplificadores de baixo rudo (LNAs) do tipo banda estreita e banda larga em tecnologia CMOS. O projeto de LNAs de banda estreita é representado através de um método de otimização conhecido como programação geométrica. Também, neste trabalho foi projetada uma topologia para LNAs de banda larga, aplicando a programação geométrica durante a fase inicial de projeto. Os layouts de ambos os circuitos foram desenhados e fabricados usando três processos CMOS diferentes. O aumento da utilização de circuitos digitais está reduzindo e substituindo a quantidade de circuitos analógicos implementados nos sistemas atuais. Nos transceptores de radiofrequência, a maior parte dos circuitos foi substituída por circuitos digitais equivalentes. A razão para esta substituição é devido a sua escalabilidade, variações PVT (Process, Voltage and Temperature) baixas, e menor tempo de projeto, resultado de um fluxo altamente automatizado. A redução do tempo de projeto representa um time-to-market menor e custos mais baixos. No entanto, o amplificador de baixo rudo é um dos blocos de radiofrequência que permanecem principalmente no domínio analógico, tornando a redução do tempo de projeto mediante a otimização do fluxo analógico como um bom foco de estudo. O LNA deve ser capaz de receber um sinal de baixa potência e alta frequência, e amplificá-lo adicionando o menor rudo possível, mantendo o casamento de impedâncias, baixo consumo de potência, e uma linearidade adequada a fim de evitar a distorção. Nesta dissertação, a maioria das especificações de desempenho citadas são formuladas rigorosamente e descritas como um programa geométrico. Além disso, vários scripts são escritos de forma a automatizar o fluxo de projeto. A programação geométrica é considerada como uma boa opção porque se o problema de otimização tem solução, o resultado é o ponto de otimização global, e pode ser atingido rapidamente (na ordem de segundos). Para um LNA fonte comum de banda estreita, o problema de projeto é completamente formulado como um programa geométrico, e alguns parâmetros normalmente desprezados, como as não idealidades dos indutores CMOS e a capacitância portadreno do transistor MOS são considerados no projeto. O problema de otimização é resolvido em minutos e testado em cinco processos CMOS diferentes, e para diferentes frequências de operação entre 1,5 GHz e 5 GHz. Os resultados são comparados e validados através de simulações, e dois layouts de LNAs para 2,45 GHz foram desenhados, fabricados e testados usando dois processos de 0,18 mm diferentes. Neste trabalho, também foi formulado um LNA de banda larga com cancelamento de rudo, e um bloco LNA-Misturador de banda larga é projetado incluindo a programação geométrica no cálculo da impedância de entrada e o cancelamento de rudo. Os layouts de dois protótipos diferentes do bloco LNA-Misturador de banda larga, operando na faixa de frequência entre 1 GHz e 5 GHz, foram desenhados e fabricados usando um processo de 0,18 mm. / This dissertation proposes the design of CMOS narrowband and wideband low noise amplifiers. The design problem of narrowband LNAs is represented as an optimization problem known as geometric programming. Furthermore, a topology for wideband LNAs is designed including the geometric programming in an early stage of the design. Both type of circuits were layouted and fabricated using three different CMOS processes. The tendency to increase the number of applications for digital-intensive circuitry, is reducing and replacing the amount of analog circuits implemented on systems nowadays. In radiofrequency transceivers, most of the circuits have been replaced by a digital-intensive counterpart. Digital circuitry is preferred over the analog one due to its scalability, low PVT (Process, Voltage and Temperature) variations, and shorter designing time result of a highly automated flow. The reduction of the designing time represents a faster time-to-market and lower costs. However, the low noise amplifier is one of the radiofrequency blocks that remain mainly in the analog domain, thus reducing its designing time by optimizing an analog design flow become a good focus of study. The LNA should be capable of receiving a low power and high frequency signal and amplify it adding the minimum noise possible, while maintaining good impedance matching, low power consumption and an adequate linearity in order to avoid distortion. In this dissertation, most of the performance parameters aforementioned are formulated rigorously and described as a geometric program. Moreover, various scripts are written in order to automate the design flow. The geometric programming is considered a good option because if the optimization problem is feasible, the result is the global optimum and can be obtained in seconds. For a common source narrowband LNA, the design problem is fully formulated as a geometric program and some parameters commonly neglected, as the CMOS inductors non-idealities and the gate-drain capacitance of MOS transistor are considered. The optimization problem is solved in minutes and tested on five different CMOS processes at different operating frequencies between 1.5 GHz and 5 GHz. The results are compared and validated through simulations, and two layouts for 2.45 GHz LNAs are drawn, fabricated and tested using two different 0.18 mm processes. In addition, a noise canceling wideband LNA is formulated, and a wideband LNA-Mixer cell is designed by including the geometric programming to estimate the input impedance matching and assure the noise cancelation. The layouts of two different prototypes of the wideband LNA-Mixer cells for the 1 GHz-5 GHz frequency band are drawn and fabricated using a 0.18 mm process.

Darmkrebs ist die zweithäufigste malignombedingte Todesursache in den westlichen Industrieländern. Durch eine frühzeitige Diagnose besteht jedoch eine hohe Chance auf Heilung. Der Goldstandard zur Darmkrebsfrüherkennung ist gegenwärtig die Koloskopie. Eine Darmspiegelung ist jedoch invasiv und mit Unannehmlichkeiten für den Patienten verbunden. Die Akzeptanz in der Bevölkerung ist daher gering. Ziel des BMBF- Projektes „Entwicklung eines nichtinvasiven Nachweissystems zur Früherkennung von humanem Darmkrebs“, in dessen Rahmen diese Arbeit entstand, ist die Bereitstellung eines nichtinvasiven Nachweisverfahrens zur Darmkrebsfrüherkennung. Der Nachweis soll über die Detektion von aus neoplastischen Zellen stammender DNA in Stuhl erfolgen. Die Entartung dieser Zellen beruht auf Veränderungen im Erbgut, welches unter anderem Mutationen sind. Im ersten Teil des BMBF-Projektes wurde ein Set von Mutationen zusammengestellt, welches eine hohe Sensitivität für Vorstufen von Darmkrebs aufweist. Ziel dieser Arbeit war es, eine Nachweismethode für die zuvor identifizierten Punktmutationen zu entwickeln. Das Nachweisverfahren musste dabei unempfindlich gegen einen hohen Hintergrund nichtmutierter DNA sein, da im Stuhl geringe Mengen DNA aus neoplastischen Zellen bei einem hohen Hintergrund von DNA aus gesunden Zellen vorliegen. Hierzu wurden Plasmidmodellsysteme für die aus dem Marker-Set stammenden Genfragmente BRAF und dessen Mutante V600E, CTNNB1 und T41I, T41A, S45P und K-ras G12C hergestellt. Mit Hilfe dieser Plasmidmodellsysteme wurde dann das Nachweissystem entwickelt. Der entscheidende Schritt für die Detektion von Punktmutationen bei hohem Wildtypüberschuss ist eine vorhergehende Anreicherung. In der vorliegenden Arbeit wurde dazu die Methode der LNA-clamp-PCR (locked nucleic acid) etabliert. Die Bewertung der erzielten Anreicherung erfolgte über das relative Detektionslimit. Zur Bestimmung des Detektionslimits wurde die Schmelzkurvenanalyse von Hybridisierungssonden eingesetzt; diese wurde im Rahmen dieser Arbeit für die drei oben genannten Genfragmente und ihre Mutanten entwickelt. Die LNA-clamp-PCR wird in Anwesenheit eines LNA-Blockers durchgeführt. Das Nukleotidanalogon LNA weist im Vergleich zu DNA eine erhöhte Affinität zu komplementären DNA-Strängen auf. Gleichzeitig kommt es bei Anwesenheit einer Basenfehlpaarung zu einer größeren Destabilisierung der Bindung. Als Blocker werden kurze LNA-DNA-Hybridoligonukleotide eingesetzt, die den mutierten Sequenzbereich überspannen und selbst der Wildtypsequenz entsprechen. Durch Bindung an die Wildtypsequenz wird deren Amplifikation während der PCR verhindert (clamp = arretieren, festklemmen). Der Blocker selbst wird dabei nicht verlängert. Der Blocker bindet unter optimalen Bedingungen jedoch nicht an die mutierte Sequenz. Die Mutante wird daher ungehindert amplifiziert und somit gegenüber dem Wildtyp-Fragment angereichert. Die Position des Blockers kann im Bindungsbereich eines der Primer sein und hier dessen Hybridisierung an dem Wildtyp-Fragment verhindern oder zwischen den beiden Primern liegen und so die Synthese durch die Polymerase inhibieren. Die Anwendbarkeit beider Systeme wurde in dieser Arbeit gezeigt. Die LNA-clamp-PCR mit Primerblocker wurde für BRAF etabliert. Es wurde ein Detektionslimit von mindestens 1:100 erzielt. Die LNA-clamp-PCR mit Amplifikationsblocker wurde erfolgreich für BRAF, K-ras und CTNNB1: T41I, T41A mit einem Detektionslimit von 1:1000 bis 1:10 000 entwickelt. In Stuhlproben liegt DNA aus neoplastischen Zellen nach Literaturangaben zu einem Anteil von 1% bis 0,1% vor. Die LNA-clamp-PCR weist also mit Amplifikationsblockern ein ausreichend hohes Detektionslimit für die Analyse von Stuhlproben auf. Durch die erfolgreiche Etablierung der Methode auf drei verschiedenen Genfragmenten und vier unterschiedlichen Punktmutationen konnte deren universelle Einsetzbarkeit gezeigt werden. Für die Ausweitung der LNA-clamp-PCR auf die übrigen Mutationen des Marker-Sets wurden Richtlinien ausgearbeitet und die Blockereffizienz als Kennzahl eingeführt. Die LNA-clamp-PCR ist ein schnelles, kostengünstiges Verfahren, welches einen geringen Arbeitsaufwand erfordert und wenig fehleranfällig ist. Sie ist somit ein geeignetes Anreicherungsverfahren für Punktmutationen in einem diagnostischen System zur Darmkrebsfrüherkennung. Darüber hinaus kann die LNA-clamp-PCR auch in anderen Bereichen, in denen die Detektion von Punktmutationen in einem hohen Wildtyphintergrund erforderlich ist, eingesetzt werden. / Colon cancer is the second leading cause of cancer related deaths in the western world. However if diagnosed early there is a great chance curing the disease. Coloscopy is the gold standard for early detection of colorectal cancer today. Its greatest disadvantage is the fact that it is an invasive technique and provides some discomfort for the patients. Therefore, the compliance to undergo such a procedure is extremely low. This work was generated in the context of the BMBF-project „Development of a non-invasive assay for the early detection of preneoplastic and neoplastic lesions in the human colon“. The aim of the work described here is the development of a non-invasive assay for the early detection of colon cancer. The assay should detect DNA from neoplastic cells in feces samples. The transformation of these cells is based on alterations in the genome predominantly mutations. In the first part of the BMBF-project a mutation panel with high sensitivity for preneoplastic lesions of colon cancer was determined. The aim of this work was to develop a detection method for the point mutations of the determined mutation panel. The rare mutant DNA needs to be detected in the presence of a great amount of wild-type DNA shed from healthy tissue. The assay system needs to be insensitive to this high background of healthy DNA. Therefore a model system of plasmid DNA containing gene fragments of BRAF and its mutation V600E, CTNNB1 and T41I, T41A, S45P and K-ras G12C obtained from the marker panel was established. Using these plasmid system the detection method was developed. The most critical parameter for the detection of rare point mutations is an enrichment of these rare DNA molecules. In this work LNA-clamp-PCR (locked nucleic acid) technology was used to enrich the mutant DNA.. For the estimation of the achieved enrichment the relative detection limit was used. The detection limit was determined by melting curve analysis of hybridization probes. These assays were established in the present work for the three above mentioned gene fragments. LNA-clamp-PCR is performed in the presence of an LNA blocker. LNA is a synthetic DNA analog. LNA nucleotide analog bind to complementary DNA strands with higher affinity. In addition a single mismatch in the LNA-DNA duplex causes a much greater destabilization compared to a DNA-DNA duplex. Short LNA-DNA-hybrids were used as clamp, which cover the mutated region and represent the wild-type sequence. Within an appropriate temperature range, LNA can specifically bind to wild type template and can inhibit its amplification. The clamp itself will not be elongated. Under optimal conditions the LNA clamp will not interfere with the amplification of the mismatched template. Therefore the mutated gene fragment will be enriched in comparison to the wild-type. The position of the LNA clamp can either be at the primer binding site inhibiting primer hybridization on the wild-type fragment or the LNA clamp is positioned between the two primer binding sites inhibiting chain elongation of the perfectly matched template. In the present work both systems were applied. For the gene fragment BRAF the LNA was used at the primer binding site. The achieved detection limit was at least 1:100. The LNA-clamp-PCR with LNA inhibiting the chain elongation were developed successfully for BRAF, K-ras and CTNNB1: T41I, T41A achieving a detection limit of 1:1000 to 1:10 000. According to the literature 1% to 0.1% of the DNA in feces derives from neoplastic cells. Therefore the detection limit achieved by LNA-clamp-PCR with LNA inhibiting chain elongation would be sufficient for analyzing feces samples. LNA-clamp-PCR protocols were established for three different gene fragments and four diverse point mutations indicating that the technology can generally be used for high sensitive detection of DNA mutations. For the development of LNA-clamp-PCR protocols for the other mutations of the marker panel development guidelines were established. Clamp efficiency was identified as a quantitative parameter for protocol optimization. The LNA-clamp-PCR is a robust, fast and cost-saving technique which needs low labor input. Therefore the method is adequate for enriching point mutated gene fragments in a diagnostic assay for the detection of early colon cancer stages. In addition LNA-clamp-PCR can be applied in other fields where rare sequence variations need to be detected in the presence of high wild-type DNA background.

This thesis presents an overview of the simulation, design, and measurement of state-of-the-art Silicon-Germanium Hetro-Junction Bipolar Transistor (SiGe HBT) low-noise amplifiers (LNAs). The LNA design trade-off space is presented and methods for achieving an optimized design are discussed. In Chapter 1, we review the importance of LNAs and the benefits of SiGe HBT technology in high frequency amplifier design. Chapter 2 introduces LNA design and basic noise theory. A graphical LNA design approach is presented to aid in understanding of the high-frequency LNA design process. Chapter 3 presents an LNA design optimization method for power constrained applications. Measured results using this design technique are highlighted and shown to have record performance. Lastly, in Chapter 4, we highlight cryogenic noise performance and present measured results from cryogenic operation of SiGe HBT LNAs. We demonstrate in this thesis that SiGe HBT LNAs have the capability to meet the demanding needs for next generation wireless systems. The aim of the analysis presented herein is to provide designers with the fundamentals of designing SiGe HBT LNAs through relevant design examples and measured results.

O projeto de amplificadores de baixo ruído (LNA) aparenta ser um trabalho simples pelos poucos componentes ativos e passivos que o compõe, porém a alta correlação entre os seus parâmetros de projeto dificulta muito esse trabalho. Esta dissertação apresenta uma proposta para contornar essa dificuldade: o uso de algoritmos metaheurísticos, em particular algoritmos genéticos e simulated annealing. Algoritmos metaheurísticos são técnicas avançadas que emulam princípios físicos ou naturais para resolver problemas com alto grau de complexidade. Esses algoritmos estão emergindo nos últimos anos porque têm mostrado eficiência e eficácia. São feitos neste trabalho os projetos de três LNAs, dois (LNA1 e LNA2) para sistemas com arquitetura homódine (LNA com carga capacitiva) e um (LNA3) para sistemas com arquitetura heteródine (LNA com carga resistiva) utilizando-se algoritmos genéticos e simulated annealing (recozimento simulado). Apresenta-se inicialmente a análise detalhada da configuração escolhida para os projetos (fonte comum cascode com degeneração indutiva FCCDI). A frequência de operação dos LNAs é 1,8 GHz e a fonte de alimentação de 2,0 V. Para o LNA1 e o LNA2 se atingiu uma figura de ruído de 2,8 dB e 3,2 dB, consumo de potência de 6,8 mW e 2,7 mW e ganho de tensão de 22 dB e 24 dB, respectivamente. Para LNA3 se atingiu uma figura de ruído de 3,5 dB, consumo de potência de 7,8 mW e ganho de tensão de 15,5 dB. Os resultados obtidos e comparações feitas com LNAs da literatura demonstram viabilidade e eficácia da aplicação de algoritmos metaheurísticos no projeto de LNA. Neste trabalho utilizaram-se as ferramentas ELDO (simulador de circuitos elétricos), versão 2009.1 patch1 64 bits, ASITIC (para projetar e simular os indutores), versão 03.19.00.0.0.0 e MATLAB (o toolbox fornece os algoritmos metaheurísticos), versão 7.9.0.529 R2009b. Além disso, os projetos foram desenvolvidos na tecnologia CMOS 0,35 m da AMS (Austria Micro Systems). / The design of low noise amplifiers (LNA) seems to be a simple work because the small number of active and passive device that they are composes, nevertheless the high trade off of LNA parameters complicates very much the work. This research presents a proposal to contour act the obstacle: to use metaheuristic algorithms, in special genetic algorithms and simulated annealing. The metaheuristic algorithms are advanced techniques that emulate physics or natural principles to solve problems with high grade of complexity. They have been emerging in the last years because they have shown effectiveness and efficiency. In this dissertation were designed three LNAs using genetic algorithms and simulated annealing: two (LNA1 and LNA2) to homódine architecture (LNA with capacitive load) and one (LNA3) to heteródine architecture (LNA with resistive load). First it is show the detailed analysis of configuration chosen to the designs (common source cascode with inductive degeneration). The operation frequency is 1.8 GHz and power supply is 2.0 V for all LNAs. LNA1 and LNA2 reached a noise figure of 2.8 dB and 3.2 dB, a dissipation power of 6.8 mW and 2.7 mW, and a voltage gain of 22 dB and 24 dB respectively. LNA3 reached 3.5 dB of noise figure, 7.8 mW of dissipation power, and 15.5 dB of voltage gain. The results obtained and the comparisons with LNAs from the literature demonstrate that the metaheuristic algorithms show efficiency and effectiveness in the design of LNA. This study was developed with the help of the tools ELDO (electric circuit simulator) version 2009.1 patch1 64 bits, ASITIC (to design and simulate the inductors) version 03.19.00.0.0.0, and MATLAB (the toolbox provides the metaheuristic algorithms) version 7.9.0.529 R2009b. Furthermore, the designs were developed on CMOS 0.35 AMS (Austria Micro Systems) technology.

The primary reason for the wireless technology evolution is towards building capacity and obtaining higher data rates. Enclosed locations, densely populated campus, indoor offices, and device-to-device communication will require radios that need to operate at data rates up to 10 Gbps. In the next few years, a new generation of communication systems would emerge to better handle the ever-increasing demand for much wider bandwidth requirements. Simultaneously, key factors such as size, cost, and energy consumption play a distinctive role towards shaping the success of future wireless technologies. In the perspective of 3GPP 5G next generation wireless communication systems, the X band was explicitly targeted with a vast range of applications in point to point radio, point to multi point radio, test equipment, sensors and future wireless communication. An X-band RF front-end circuit for next generation wireless network applications is presented in this work. It details the design of a low noise amplifier and a power amplifier for X band operation. The designed amplifiers were integrated with a wideband single-pole-double-throw switch to achieve an overall front-end structure for 10 GHz. The design was carried out and sent for fabrication using a GaN 0.15µm process provided by NRC, a novel design kit. Due to higher breakdown voltage, high power density, high efficiency, high linearity and better noise performance, GaN HEMTs are a suitable choice for future wireless communication. Thus, the assumption is to further explore capabilities of this process in front-end design for future wireless communications.

This master thesis is dealing with a system for receiving meteorological images from satellites placed on lower orbit. Furthermore it gives basic information about satellites NOAA, METOP and FY. It also includes derivations of equations, that define minimal requirements for receiving antenna and LNA. From reached parametres, energetic balance for connection of the satellite and Earth is calculated. The main part of the master thesis is designing of low-noise amplifier for L band. LNA is implemented on the substrate FR4 and Arlon DiClad 870, circuit is designed with elements of parametres, which are spread out or concentrated. The last part of the thesis describes design of antenna for reception of meteorological images.