MEMS accelerometers are quickly approaching navigation grade performance and navigation market for MEMS accelerometer systems are expected to grow in the recent years. Compared to conventional accelerometers, these micromachined sensors are smaller and more durable but are generally worse in terms of noise and dynamic range performance. Since MEMS accelerometers are already dominant in the tactical and consumer electronics market, as they are in all modern smart phones today, there is significant demand for MEMS accelerometers that can reach navigation grade performance without significantly altering the developed process technologies. This research aims to improve the performance of previously fabricated and well-known MEMS capacitive closed loop &Sigma / &Delta / accelerometer systems to navigation grade performance levels. This goal will be achieved by reducing accelerometer noise level through significant changes in the system architecture and implementation of a new electronic interface readout ASIC. A flexible fourth order &Sigma / &Delta / modulator was chosen as the implementation of the electro-mechanical closed loop system, and the burden of noise shaping in the modulator was shifted from the mechanical sensor to the programmable electronic readout. A novel operational transconductance amplifier (OTA) was also designed for circuit implementation of the electronic interface readout. Design and fabrication of the readout was done in a standard 0.35 &micro / m CMOS technology. With the newly designed and fabricated readout, single-axis accelerometers were implemented and tested for performance levels in 1g range. The implemented system achieves 5.95 &micro / g/sqrt Hz, 6.4 &micro / g bias drift, 131.7 dB dynamic range and up to 37.2 g full scale range with previously fabricated dissolved epitaxial wafer process (DEWP) accelerometers in METU MEMS facilities. Compared to a previous implementation with the same accelerometer element reporting 153 &micro / g/sqrtHz, 50 &micro / g bias drift, 106.8 dB dynamic range and 33.5 g full scale range / this research reports a 25 fold improvement in noise, 24 dB improvement in dynamic range and removal of the deadzone region.

<p>In this Master's thesis, a direct-conversion receiver front-end has been designed in a 0.18um CMOS technology. </p><p>Direct-conversion receivers (DCR) have obvious advantages over the heterodyne counterpart. Since the intermediate frequency (IF) is zero, the problem of image is circumvented. As a result, no front-end image reject filter is required and the channel selection requires only a low-pass filter, which makes it easy to integrate directly on chip. However, the DCR also suffers from several drawbacks such as extreme sensitivity to DC offsets, 1/f noise, local oscillator (LO) leakage/radiation, front-end nonlinearity and I/Q mismatch. This implies very high demands on the DCR front-end. </p><p>The front-end comprises a low-noise amplifier (LNA) and a mixer. Different LNA and mixer architectures has been studied and from the mentioned inherited problems with direct conversion, one proposal for a solution is a differential source degenerated LNA and a differential harmonic mixer, which has been designed and simulated. </p><p>The LNA has a gain of 12dB, a noise figure of 3.6dB and provides a return loss better than -15dB. The overall noise figure of the signal path is 8dB and the overall IIP3 and IIP2 is -12dBm and 31dBm, respectively.</p>

In this thesis, the circuits which comprise the front-end of a millimeter-wave transmit-receive module are investigated using a state-of-the-art 90 nm SiGe BiCMOS process for use in radar remote sensing applications. In Chapter I, the motivation for a millimeter-wave radar in the context of space-based remote sensing is discussed. In addition, an overview of Silicon-germanium technology is presented, and the chapter concludes with a discussion of design challenges at millimeter-wave frequencies. In Chapter II, a brief history of radar technology is presented - the motivations leading to the development of the transmit-receive module for active electronically scanned arrays are discussed, and the critical components which reside in nearly every high-frequency transmit-receive module are introduced. In Chapter III, the design and results of a W-band single-pole, double-throw switch using SiGe p-i-n diodes are discussed. In particular, the design topology and methods used to achieve low-loss and high power handling over a wide matching bandwidth without sacrificing isolation are described. In Chapter IV, the design and results of a W-band low-noise amplifier using SiGe HBT's are discussed. The design methodologies used to achieve high gain and exceptional noise performance over a wide matching bandwidth are described. Concluding remarks and a discussion of future work are in Chapter V.

This work presents a high-voltage, high-precision bi-directional multi-channel system capable of stimulating neural activity through bi-phasic pulses of amplitude up to ∓50 V while recording very low-voltage responses as low as tens of microvolts. Most of the systems reported from the scientific community possess at least one of the following common limitations: low stimulation voltages, low gain capabilities, or insufficient bandwidth to acquire a wide range of different neural activities. While systems can be found that present remarkable capabilities in one or more specific areas, a versatile system that performs over all these aspects is missing. Moreover, as many novel materials, like silicon carbide, are emerging as biocompatible interfaces, and more specifically as neuronal interfaces, it becomes mandatory to have a system operating across a wide range of voltages and frequencies for both physiological and electrical compatibility testing. The system designed and proven during this doctoral research effort features a ∓50 V bi-phasic pulse generator, 62 to 100 dB of software selectable amplification, and a wide 18 Hz to 12 kHz bandwidth. In addition to design and realization we report about biological testing consisting in the acquisition of neural signals from tissue cultures using an MEA where faithful signal recording was achieved with superior fidelity to a commercial system used to sample signals from the same culture. The only system parameter that was less robust than the commercial system was the noise level, which due to our higher bandwidth was somewhat expected. More importantly our custom electronics outperformed in terms of lower delay and lower cost of realization. All of these results plus suggested future works are listed for the reader's convenience.

The objective of this research is to design and implement low-noise wideband RFIC components with CMOS technology for the direct-conversion architecture. This research proposes noise reduction techniques to improve the thermal noise and flicker noise contribution of a low noise amplifier (LNA) and a mixer. Of these techniques, the LNA is found to reduce noise, boost gain, and consume a relatively low amount of power without sacrificing the wideband and linearity advantages of a conventional common gate (CG) topology. The research concludes by investigating the proposed mixer topology, which senses and compensates local oscillator (LO) phase mismatches, the dominant cause of flicker noise.

The objective of our research is to develop system architectures and CMOS circuits that interface with high-Q silicon microgyroscopes to implement navigation-grade angular rate sensors. The MEMS sensor used in this work is an in-plane bulk-micromachined mode-matched tuning fork gyroscope (M² – TFG ), fabricated on silicon-on-insulator substrate. The use of CMOS transimpedance amplifiers (TIA) as front-ends in high-Q MEMS resonant sensors is explored. A T-network TIA is proposed as the front-end for resonant capacitive detection. The T-TIA provides on-chip transimpedance gains of 25MΩ, has a measured capacitive resolution of 0.02aF /√Hz at 15kHz, a dynamic range of 104dB in a bandwidth of 10Hz and consumes 400μW of power. A second contribution is the development of an automated scheme to adaptively bias the mechanical structure, such that the sensor is operated in the mode-matched condition. Mode-matching leverages the inherently high quality factors of the microgyroscope, resulting in significant improvement in the Brownian noise floor, electronic noise, sensitivity and bias drift of the microsensor. We developed a novel architecture that utilizes the often ignored residual quadrature error in a gyroscope to achieve and maintain perfect mode-matching (i.e.0Hz split between the drive and sense mode frequencies), as well as electronically control the sensor bandwidth. A CMOS implementation is developed that allows mode-matching of the drive and sense frequencies of a gyroscope at a fraction of the time taken by current state of-the-art techniques. Further, this mode-matching technique allows for maintaining a controlled separation between the drive and sense resonant frequencies, providing a means of increasing sensor bandwidth and dynamic range. The mode-matching CMOS IC, implemented in a 0.5μm 2P3M process, and control algorithm have been interfaced with a 60μm thick M2−TFG to implement an angular rate sensor with bias drift as low as 0.1°/hr ℃ the lowest recorded to date for a silicon MEMS gyro.

A new class of micromachined devices called thin-film piezoelectric-on-substrate (TPoS) resonators is introduced, and the performance of these devices in RF and sensor applications is studied. TPoS resonators benefit from high electromechanical coupling of piezoelectric transduction mechanism and superior acoustic properties of a substrate such as single crystal silicon. Therefore, the motional impedance of these resonators are significantly smaller compared to typical capacitively-transduced counterparts while they exhibit relatively high quality factor and power handling and can be operated in air. The combination of all these features suggests TPoS resonators as a viable alternative for current acoustic devices. In this thesis, design and fabrication methods to realize dispersed-frequency lateral-extensional TPoS resonators are discussed. TPoS devices are fabricated on both silicon-on-insulator and thin-film nanocrystalline diamond substrates. The performance of these resonators in simple and low-power oscillators is measured and compared. Furthermore, a unique coupling technique for implementation of high frequency filters is introduced in which dual resonance modes of a single resonant structure are coupled. The measured results of this work show that these filters are suitable candidates for single-chip implementation of multiple-frequency narrow-band filters with high out-of-band rejection in a small footprint.

In this thesis, I have developed a range of theoretical and numerical techniques for modelling the behaviour of partially coherent optical systems and multi-mode detectors. The numerical simulations were carried out for the ultra-low-noise Transition Edge Sensors (TESs) being proposed for use on the SAFARI instrument on the cooled aperture infrared space telescope SPICA (34 - 210 μm). The optical behaviour of the SAFARI system is described in terms of the optical modes of the telescope, as distinct from the optical modes of the detector. The performance of the TESs were assessed in terms of signal power, background power and photon noise. To establish a method for precisely characterising and calibrating ultra-low-noise TESs, a cryogenic test system was designed and engineered to measure the optical efficiencies of the SAFARI TESs. The multi-mode, partially coherent illumination conditions of the measurement system were engineered to be precisely the same as those of the telescope. A major difference between the test system and the telescope’s optics is that the telescope will have focusing elements, but the test system was designed to avoid focusing elements in order to keep the optical path as clean as possible. The theoretical formalism and numerical models were adapted accordingly to address this difference. The numerical simulations show that the test system could provide near identical optical performance as that of the telescope system even though the focusing elements were absent. I also performed experimental measurements to investigate the optical efficiencies of the multi-mode TESs. The detectors worked exceedingly well in all respects with satisfactory optical efficiencies. In addition, it has been shown that the optical model provides a good description of the optical behaviour of the test system and detectors. Further modal analysis was developed to study losses in the multi-mode horns. The optical behaviour of the waveguide-mounted thin absorbing films in the far-infrared was modelled using a mode-matching method.

Este trabalho apresenta o projeto de um bloco LNA-Misturador dentro de um mesmo circuito integrado para aplicações em um receptor Bluetooth 2;45GHz. Uma estratégia de projeto bem clara, concisa e com uma boa base física e matemática foi desenvolvida para auxiliar o processo de projeto de um bloco LNA-Misturador, composto por um LNA cascode em cascata com um misturador de chaveamento de corrente com entradas simples e degeneração indutiva nas fontes dos estágios de transcondutância. Esta estratégia foi adaptada de trabalhos apresentados na literatura. A estratégia de projeto proposta considera o compromisso entre ruído, linearidade, ganho, dissipação de potência, casamento de impedâncias e isolamento de portas, usando as dimensões dos dispositivos e condições de polarização como variáveis de projeto. Com base nesta estratégia se obteve um bloco LNA-Misturador que atinge algumas especificações propostas. Um bloco LNA-Misturador foi projetado e fabricado em uma tecnologia CMOS 0;35µm para validar a estratégia de projeto proposta. Além disso, para atingir os objetivos, durante o desenvolvimento deste trabalho foi dada atenção especial no projeto dos indutores. Foi projetado, fabricado e medido um chip de teste. Para tal fim foram aplicadas técnicas e estruturas de de-embedding nas medidas para conseguir resultados mais confiáveis. Os resultados experimentais obtidos para os indutores e os resultados preliminares do bloco LNA-Misturador s~ao satisfatórios de acordo com as especificações e os esperados das simulações. No entanto, os indutores integrados degradam significativamente o desempenho do bloco LNA-Misturador. Se forem usados processos de fabricação nos quais os indutores apresentem melhor desempenho, os resultados do bloco LNA-Misturador aplicando a estratégia de projeto desenvolvida neste trabalho podem ser melhorados. Finalmente, é importante ressaltar que a estratégia de projeto proposta neste trabalho já está sendo usada e adaptada em outros projetos com o propósito de melhorar os resultados obtidos, e conseguir auxiliar o processo de projeto deste tipo de blocos. / This work presents a fully integrated LNA-Mixer design for a Bluetooth receiver application at 2:45GHz. A concise design strategy with good physics and mathematics basis was developed to assist the design process of a LNA-Mixer block, formed by a cascode LNA in cascade to a single balanced current commutation Mixer with inductive degeneration. This strategy was adapted from literature and considers the trade-offs between noise, linearity, gain, power dissipation, impedance matching and ports isolation, using the device dimensions and bias conditions as design variables. Based on this strategy, the proposed LNA-Mixer design specifications were achieved. To validate the proposed design strategy, the LNA-Mixer were fabricated in a 0:35µm CMOS process. Furthermore, to achieve the specifications, during the development of this work a special attention to the RF CMOS inductors was given. A test chip was designed, fabricated and measured applying de-embedding structures to obtain more reliable results. The experimental results obtained for the inductors and the preliminary results for the LNA-Mixer are satisfactory compared to the specifications and as expected from simulations. However, the integrated inductors degrade the performance of the block significantly and if a manufacturing process in which the inductor has better performance is used, the resulting LNA-Mixer design applying the strategy developed in this work can be improved. Finally, it is important to highlight that the design strategy proposed in this work is already being used and adapted in other designs in order to improve the results, and to assist the design process of such blocks.

Ces dernières années, le développement durable, notamment le contrôle de la consommation de nos appareils électriques, est devenu un enjeu majeur de notre société. L'essor de la domotique associé à cette problématique implique la nécessité d'optimiser le bilan énergétique de chaque dispositif électrique. L'objectif de cette thèse est la réalisation d'un amplificateur faible bruit (LNA) qui propose deux modes de fonctionnement suivant la qualité du signal reçu: un mode haute performance et un mode basse consommation.Afin de satisfaire la problématique liée aux systèmes multistandard, l'architecture sélectionnée pour l'amplificateur faible bruit est la topologie distribuée. En effet, elle est connue pour ses performances en terme de bande passante et permet un gain en puissance accordable. Une méthode de conception est proposée, basée sur la technologie GaAs de la fonderie TriQuint Semiconducteur Texas. Les mesures réalisées sur le LNA dans sa configuration haute performance se situe au niveau de l'état de l'art. Pour le mode basse consommation, on obtient de bonnes performances tout en réduisant sa consommation de 91%.Enfin, une stratégie de reconfiguration innovante est proposée basée sur l'intégration de notre LNA dans un récepteur homodyne. Elle permet de réduire de manière significative la consommation du récepteur, dans le cas où la puissance reçue permet un fonctionnement en mode basse consommation (contraintes sur le Bit Error Rate (BER) vérifiées). En considérant chaque puissance reçue de manière équiprobable, notre récepteur reconfigurable a une consommation réduite de 77% par rapport à un récepteur classique qui possède un seul mode de fonctionnement (mode haute performance). / In recent years, the sustainable development, especially the control of the electrical appliances' consumption, has became a major issue in our society. The optimisation of each electrical devices' energy is needed to reduce the consumption of home appliances. The objective of this thesis is the realization of a low noise amplifier (LNA) that offers two modes of operation depending on the quality of the received signal: a high performance mode and a low consumption mode.In order to meet the problem related to multistandard systems, the distributed architecture is selected for low noise amplifier. Indeed, it is known for its wide bandwidth and tunable power gain. A design method is proposed, which is based on GaAs technology of TriQuint Semiconductor Texas foundry. The LNA's high performance mode measurement results is at the level of the state of the art. For the low consumption mode, LNA shows good performance while reducing power consumption by 91%.Finally, an innovative reconfiguration strategy is defined. It's applied to a homodyne receiver based on the integration of our LNA. It reduces significantely the receiver's consumption in case where the received power allows the receiver operates in low power mode (constraint of the Bit Error Rate (BER) is verified). Considering each received power is equiprobable, our reconfigurable receiver saves consumption by 77% compared to a conventional receiver that has a single mode (high performance mode).