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This research addresses problems in designing analog and mixed-signal (AMS) systems by bridging the gap between system-level and circuit-level simulation by making simulations fast like system-level and accurate like circuit-level. The tools proposed include metamodel integrated Verilog-AMS based design exploration flows. The research involves design centering, metamodel generation flows for creating efficient behavioral models, and Verilog-AMS integration techniques for model realization. The core of the proposed solution is transistor-level and layout-level metamodeling and their incorporation in Verilog-AMS. Metamodeling is used to construct efficient and layout-accurate surrogate models for AMS system building blocks. Verilog-AMS, an AMS hardware description language, is employed to build surrogate model implementations that can be simulated with industrial standard simulators. The case-study circuits and systems include an operational amplifier (OP-AMP), a voltage-controlled oscillator (VCO), a charge-pump phase-locked loop (PLL), and a continuous-time delta-sigma modulator (DSM). The minimum and maximum error rates of the proposed OP-AMP model are 0.11 % and 2.86 %, respectively. The error rates for the PLL lock time and power estimation are 0.7 % and 3.0 %, respectively. The OP-AMP optimization using the proposed approach is ~17000× faster than the transistor-level model based approach. The optimization achieves a ~4× power reduction for the OP-AMP design. The PLL parasitic-aware optimization achieves a 10× speedup and a 147 µW power reduction. Thus the experimental results validate the effectiveness of the proposed solution.

Master of Science / Department of Electrical Engineering / William B. Kuhn / Designers of mixed-signal systems must understand coupling mechanisms at the system, PC board, package and integrated circuit levels to control crosstalk, and thereby minimize degradation of system performance. This research examines coupling mechanisms in a RF-targeted high-resistivity partially-depleted Silicon-on-Insulator (SOI) IC process and applying similar coupling mitigation strategies from higher levels of design, proposes techniques to reduce coupling between sub-circuits on-chip. A series of test structures was fabricated with the goal of understanding and reducing the electric and magnetic field coupling at frequencies up to C-Band. Electric field coupling through the active-layer and substrate of the SOI wafer is compared for a variety of isolation methods including use of deep-trench surrounds, blocking channel-stopper implant, blocking metal-fill layers and using substrate contact guard-rings. Magnetic coupling is examined for on-chip inductors utilizing counter-winding techniques, using metal shields above noisy circuits, and through the relationship between separation and the coupling coefficient. Finally, coupling between bond pads employing the most effective electric field isolation strategies is examined. Lumped element circuit models are developed to show how different coupling mitigation strategies perform. Major conclusions relative to substrate coupling are 1) substrates with resistivity 1 kΩ·cm or greater act largely as a high-K insulators at sufficiently high frequency, 2) compared to capacitive coupling paths through the substrate, coupling through metal-fill has little effect and 3) the use of substrate contact guard-rings in multi-ground domain designs can result in significant coupling between domains if proper isolation strategies such as the use of deep-trench surrounds are not employed. The electric field coupling, in general, is strongly dependent on the impedance of the active-layer and frequency, with isolation exceeding 80 dB below 100 MHz and relatively high coupling values of 40 dB or more at upper S-band frequencies, depending on the geometries and mitigation strategy used. Magnetic coupling was found to be a strong function of circuit separation and the height of metal shields above the circuits. Finally, bond pads utilizing substrate contact guard-rings resulted in the highest degree of isolation and the lowest pad load capacitance of the methods tested.

International Telemetering Conference Proceedings / October 21, 2002 / Town & Country Hotel and Conference Center, San Diego, California / The ISM bands have opened up new opportunities for telemetry using spread-spectrum communications. A low-cost frequency-hopping radio is described here for the 900 MHz ISM band that can be programmed with a wide range of hop and data rates. The ‘C6201 DSP from TI is used to control the frequency and data rate of the TI TRF6900 transceiver chip using a custom interface of the 6201 EVM board to the serial I/O on the 6900 evaluation board.

Many decades ago, Carver Mead established the foundations of neuromorphic systems. Neuromorphic systems are analog circuits that emulate biology. These circuits utilize subthreshold dynamics of CMOS transistors to mimic the behavior of neurons. The objective is to not only simulate the human brain, but also to build useful applications using these bio-inspired circuits for ultra low power speech processing, image processing, and robotics. This can be achieved using reconfigurable hardware, like field programmable analog arrays (FPAAs), which enable configuring different applications on a cross platform system. As digital systems saturate in terms of power efficiency, this alternate approach has the potential to improve computational efficiency by approximately eight orders of magnitude. These systems, which include analog, digital, and neuromorphic elements combine to result in a very powerful reconfigurable processing machine.