Biological sample analysis is a costly and time-consuming process. It involves highly trained technicians operating large and expensive instruments in a temperature and dust controlled environment. In the world of rising healthcare cost, the drive towards a more cost-effective solution calls for a point-of-care device that performs accurate analyses of human blood samples. To achieve this goal, today's bulky laboratory instruments need to be scaled down and integrated on a single microchip of only a few square centimeters or millimeters in size. Dielectrophoresis (DEP), a phenomenon where small particles such as human blood cells are manipulated by non-uniform electric fields, stands to feature prominently in the point-of-care device. An original device that enhances DEP effect through novel geometry of the electrodes is presented. When activated with two inverting sinusoidal waveforms, the novel-shaped electrodes generate horizontal bands of increasing electric fields on the surface of the microchip. With these bands of electric fields, particles can be manipulated to form a straight horizontal line at a predictable location. Experimental results showing the collection, separation, and transportation of mammalian cells are presented. A strategy for simultaneous processing of two or more types of particles is also demonstrated. With capabilities for an accurate position control and an increased throughput by parallel processing, the novel microchip device delivers substantial improvements over the existing DEP designs. The research presented here explores the effects of novel electrode geometries in cell manipulations and contributes to the overall progress of an automated blood analysis system.

Microfluidic chips have drawn great attention and interest due to their broad applications in chemical, biological and biomedical fields. These kinds of miniaturized devices offer many advantages over the traditional analysis instruments, such as reduced cost, shortened time, increased throughput, improved integration/automation/portability, etc. However, the concept of integrating multiple labs on a single chip to perform micro total analysis hasn’t been realized yet because of the lack of fundamental knowledge and systematic design of each component, especially for some particular applications. A thorough understanding and grasp of the basic physical phenomenon is the theoretical basis to develop functional devices to utilize them. In this study, we intend to investigate the electrokinetic fluid flow and coherent species transport processes in microchannels, and then try to effectively control them for designing related lab-on-a-chip devices. Rather than expensive experiments, numerical studies are performed to simulate the different processes involved in various electrokinetic chip applications. In the theoretical models, applied potential field, flow field and species concentration field are considered and corresponding governing equations with initial/boundary conditions are numerically solved by computational fluid dynamics techniques. The flow field is obtained by the developed SIMPLE algorithm and a slip-wall velocity boundary condition is applied in simulating electroosmotic flow. Grid independence tests and convergence studies are performed to ensure economic computation with adequate accuracy and stability. For every application with typical channel layout, parametric studies are performed to investigate different effects through the controlling parameters linked to them. For surface patterning or microfabrication using laminar flows, various operational parameters are investigated to explore the optimized configurations for multi-stream flow and mass transport control in cross-linked microchannels. Through a series of numerical simulations, it is found that applied potentials, electroosmotic mobilities of solutions and channel dimensions have significant effects on the flow and mass transport after converging in the intersection of channel network. Diffusion coefficient has less influence than the other parameters due to the presence of high Peclet number for such applications. For the microwashing with two different electrolyte solutions, a three-dimensional model is numerically solved to reveal the flow structure change. In a straight microchannel with a rectangle cross section, KCl solution and LaCl3 solution are mainly employed for tests. Displacement processes between two solutions in both orders are tested and analyzed. The observed flow structures such as back flow in channel center and distortion of plug-like velocity profile are noticed and discussed. The distortion of the flow field results from the induced pressure gradient, which is due to the non-uniformity of electroosmotic mobilities and electrical conductivities of two replaced solutions. The bigger difference two solutions have in chemical properties, the stronger effects on flow they have. Effect of applied potential field strength is also studied and the approximate linear influences are concluded. Finally, the unsteady on-chip sample injection and separation processes involved in microchip capillary electrophoresis are studied. Species’ electrophoretic migration effect is included and the theoretical model is non-dimensionalized in a unique manner with the key fundamental parameters: the Re Sci , species’ non-dimensional electrophoretic mobility and applied potentials. The species transport characteristics are revealed numerically and well understood for future effective control and innovative chip design. Species front movement during injection and sample plug development in separation are examined with diffusion effect; results include concentration profiles and contour plots over a range of injection and separation time. The influence of i Re Sc which characterizes the relative role of convection versus diffusion is examined over the commonly encountered range and the diffusion effect is found to have an essentially negligible effect. Through three species, the electrophoretic mobilities difference is demonstrated to be the reason for separation. Real-time monitoring of different species’ movements is performed for injection guidance.

The main objective of this research is to develop a pervasive wire sharing technique that can be easily applied across the entire range of on-chip interconnects in a very large scale integration (VLSI) system. A wave-pipelined multiplexed (WPM) routing technique that can be applied both intra-macrocell and inter-macrocell interconnects is proposed in this thesis. It is shown that an extensive application of the WPM routing technique can provide significant advantages in terms of area, power and performance. In order to study the WPM routing technique, a hierarchical approach is adopted. A circuit-level, system-level and physical-level analysis is completed to explore the limits and opportunities to apply WPM routing to current VLSI and future gigascale integration (GSI) systems. Design, verification and optimization of the WPM circuit and measurement of its tolerance to external noise constitute the circuit-level analysis. The physical-level study involves designing wire sharing-aware placement algorithms to maximize the advantages of WPM routing. A system-level simulator that designs the entire multilevel interconnect network is developed to perform the system-level analysis. The effect of WPM routing on a full-custom interconnect network and a semi-custom interconnect network is studied.

A micro-electrophysiological analysis system (-EPAS) using various microfabrication techniques for single cell study was developed. Conventional microfabrication techniques combined with plastic and polymer microfabrication techniques have been used to realize the system. The system is capable of performing patch clamp recording and whole cell electrical impedance spectroscopy (EIS) on a single cell. Methodologies for single cell manipulation were developed. The ion channel activities of primary cultured bovine chromaffin cells were measured in both the patch clamping mode and the whole cell EIS mode. Membrane capacitance of the chromaffin cell was calculated from these measurements. Increases in the capacitances were observed when certain ion channels were blocked using toxins. The dielectric properties of human breast cancer cell lines from different pathological stages were measured and compared to a normal human breast cell line in the whole cell EIS mode. The measured properties were correlated to the pathological stages of the breast cancer cell lines. Decreases in the membrane capacitances were observed for the more pathologically progressed cancer cell lines.

Novel fabrication technologies for high performance electrical and optical chip-to-substrate input/output (I/O) interconnections were developed. This research is driven by the long term performance and integration requirements of high performance chip-to-substrate I/Os, as well as the package reliability demands from semiconductor manufacturing. An electroless copper plating and annealing process was developed to join copper structures to achieve chip-to-substrate assembly by all copper pillar interconnects. The developed copper pillar interconnects provide much higher current carrying capability for chip-to-substrate power/ground input/output distributions and have low electrical parasitic characteristics for high frequency electrical signal communications. This copper bonding process also demonstrates the capability to compensate for misalignments and height variations of bonded structures. A finite element generalized plane deformation model was employed to design fully compliant copper pillars to eliminate the need of underfill. Electrical parasitics of copper pillar chip-to-substrate interconnects were studied by the derived formulas for low parasitic requirements. An optimized dimension space for all the criteria was provided on the pillar dimension chart. A novel nanoimprint lithography was developed to combine with photolithography in one process to create high quality features on a macrostructure for chip-to-substrate optical I/O applications. This fabrication process also demonstrated the capability to produce off-angle complex structures.

In the multi-core systems, the data transfer between cores becomes a major challenge. The on-chip interconnect networks should be low latency, high throughput, scalability, better router or arbitration strategy, and low power consumption. An asynchronous ring bus, which is 33 bit width, adopting dual-rail single-track data protocol is proposed in this thesis. It provides not only robust but also high-speed asynchronous circuits condition. Owing to asynchronous circuits design, there are different transfer times in different hop counts. The shorter the distance is, the faster the data can be transferred. Unlink the synchronous ring bus, the bus frequency must be limited by the longest hop count latency. On the other hand, the transmission time of asynchronous circuits will not be held up by the longest distance even though the number of core is increased. For providing higher throughput, multiple cores which are able to access the bus simultaneously make a direct connection between each other. In bus arbitration, distribution arbiter is adopted to arbitrate the right to use the bus and solve the collision. Finally, the system performance in different arbitration strategies has been estimated in TSMC 0.18£gm process in this thesis. The transmission time of the shortest distance is 1.5 ns approximately, and the longest distance first has a better performance in different arbitration strategies.

The first part of this thesis studies the wire-bonding technology for use in an integrated design of transformer balun and RF front-end receiver, which is realized by IPD and CMOS technology, respectively. In this part, the RF front-end receiver and the balun were designed separately, and the bondwire model was established based on electromagnetic simulation. For the maximum power transfer and optimal noise performance, the input impedance between the CMOS RF front-end receiver and the IPD balun was conjugate-matched. The IPD balun, placed in front of the differential LNA of a direct-conversion receiver, is designed using the IPD technology, thereby reducing the insertion loss, and subsequently improving the noise figure of the CMOS receiver. The second part of this thesis uses a vertically coupled transformer balun with a primary coil made by IPD technology and a secondary coil made by CMOS technology. This balun has a low-loss advantage when integrated with a posterior differential LNA. Finally, the magnetic resonance coupling for use in signal transmission is studied and experimented on a printed circuit board.

This thesis proposes a synthesis methodology which is capable of fault-tolerance and deadlock-free for constructing a custom NoC topology in 3D ICs. In this thesis, the processors and their communications can be synthesized simultaneously in the system-level floorplanning with fault tolerant consideration, called 3D-NoC-FT. Experimental results show that the pro-posed 3D-NoC-FT produces custom 3D NoCs with lower power dissipation than previous works. This method is also more scalable, which makes it ideal for complicated 3D NoC de-signs. Compared with the previous 3D NoC work (3D-SAL-FP) without link fault tolerance, our fault tolerant method outperforms on the average the power dissipation by 1.67X with rela-tively small overhead of latency by 17% and the number of TSV by 35%, respectively.

Acquisition of bio-signals is an important feature in advanced medical applications. In order to record bio-signals such as electrocardiogram (ECG) or electromyogram (EMG), a switched-capacitor amplifier with variable linear gain and low noise front-end is discussed in this thesis. The circuit is designed and implemented as an Application-Specific Integrated Circuit (ASIC). This ASIC consists of transconductance stage with custom-designed lateral bipolar transistors in the input stage, switched-capacitor integrating stage, sample-and-hold circuit and buffer output stage. Lateral bipolar transistors were chosen with the intention of reducing flicker noise compared to using MOS input devices. Using a switched-capacitor (SC) stage the gain is adjustable to accommodate input signals of different amplitude making it useful for the recording of different biomedical signals. Adjustable gain is achieved by varying the clock phase delay between two digital control signals which were generated by a microcontroller. Also, small size and low supply voltage operation (¡Ó0.9 V) are achieved. Therefore, this ASIC may be used in wearable or even with implantable medical applications. Measured results for test chips realized in TSMC 0.35 £gm CMOS technology are reported confirming the correct operation of the circuit.

This study developed a microfluidic flow sensor for the detections of velocity and viscosity, especially for ultra-low viscosity detection. An etched optic fiber with the diameter of 9 £gm is embedded in a microfluidic chip to couple green laser light into the microfluidic channel. The flow induced vibration causes periodic flapping motion of the optic fiber cantilever because of the pressure difference from two sides of fiber cantilever. Through the frequency analysis, the fluidic properties including the flow rate and the viscosity can be detected and identified. Results show that this developed sensor is capable of sensing liquid samples with the flow rates from 0.17 m/s to 68.81 m/s and the viscosities from 0.306 cP to 1.200 cP. In addition, air samples (0.0183 cP) with various flow rates can also be detected using the developed sensor. Although the detectable range for flow rate sensing is not wide, the sensitivity is high of up to around 3.667 mm/(s¡EHz) in test liquid in DI water, and when detecting air the sensitivity is 6.190 mm/(s¡EHz). The developed flow sensor provides a simple and straight forward method for sensing flow characteristics in a microfluidic channel.