Cette thèse porte sur la caractérisation, la modélisation et l'analyse des phénomènes de «Pulling» et de «Pushing» dans les systèmes de boucles à verrouillage de phase (PLL), utilisant une approche globale où les effets de couplages électromagnétiques aux différents niveaux d'intégration (niveau puce, niveau assemblage, niveau report sur PCB) sont pris en compte de manière distribuée. L'approche de modélisation adopte une méthodologie hybride où l'analyse des couplages électromagnétiques combinée à des schémas équivalents large-bande (compatibles avec les modèles de composants actifs disponibles dans les librairies) est couplée à des représentations comportementales dynamiques. Les représentations comportementales développées permettent de capturer des effets de non-linéarités tant au niveau composant (caractéristique non-linéaire des Varicap en fonction des tensions de contrôle) qu'au niveau block de fonction (gain KVCO non uniforme de l'oscillateur contrôlé en tension (VCO) en fonction de la fréquence).Cette méthodologie hybride permet l'évaluation d'effets compétitifs résultant de phénomènes de «pulling» et de «Pushing» au niveau de la puce (influence de la PLL, effets de l'amplificateur de puissance, intégrité des alimentations ou distribution des références de masse, etc.) , et des distorsions induites par des éléments extérieurs à la puce (exemple de composants sur PCB : Filtre SAW, capacités de découplages, réseaux d'adaptation).L'approche proposée est utilisée pour l'étude et la conception de deux types de circuits développés par NXP-semi-conducteurs pour des applications liées à la sécurité automobile (PLL fonctionnant aux alentours de 1.736GHz) et à la réception satellitaire (PLL de faible consommation fonctionnant à 9.75/10.6 GHz pour les circuits LNB).Les résultats de modélisation obtenus sont validés par corrélations avec les données expérimentales et par comparaison avec les résultats obtenus de différents outils (ADS Harmonic- Balance/Transient de Agilent, Spectre de Cadence / This thesis work focuses on characterization, modeling and analysis of «Pulling» and «Pushing» phenomena in Phase Locked Loops (PLL) based on a global approach where distributed effects of electromagnetic couplings at different integration levels (chip-level, assembly-level, board or PCB-level) are taken into account. The modeling approach adopts a hybrid methodology where the analysis of electromagnetic couplings combined with broadband equivalent circuit synthesis (compatible with library models of active components) is coupled with dynamic behavioral representations. The derived behavioral representations properly capture the effects of nonlinearities both at component scale (non-linear characteristic of varicap as function of control voltages) and at function block level (non-uniform gain KVCO of VCO circuits depending on frequency).The hybrid methodology renders possible the assessment of competitive effects resulting from «Pulling» and «Pushing» phenomena at chip level (influence of the PLL, effects of the power amplifier, power integrity, or ground reference distribution, etc..), and the distortions induced by components external to the chip at package and board levels (such as components on PCB: SAW filters, decoupling capacitors, matching networks).The proposed approach is used for the study and design of two types of circuits developed by NXP- Semiconductors, for applications related to automotive security and immobilization (an RF low power transceiver Integrated Circuit (PLL running around 1.763GHz), and to satellite receiver (PLL operating at low power for LNB circuits working at 9.75/10.6 GHz).The obtained modeling results are validated by correlation with experimental data and by comparison with different time-domain and frequency-domain simulation tools results (ADS-Harmonic Balance, ADS-Shooting solutions, Cadence-Spectre)

Die Spezifikationen und Toleranzbereiche heutiger Hochgeschwindigkeitsdatenübertragungstechnologien nehmen immer weiter an Komplexität, aufgrund der steigenden Informationsmenge, zu. Zur Verarbeitung von Daten in Frequenzbereichen oberhalb von einem Gigahertz sind Referenzsignale notwendig, welche ein äußerst geringes Phasenrauschen aufweisen um benachbarte Kanäle nicht zu beeinflussen. Diese Referenzsignale werden in Mischerschaltungen zur Modulation oder Demodulation zwischen radio frequency (RF)- und intermediate frequency (IF)-Signalen verwendet. Die benötigte Signalform ist eine Sinusschwingung, die nicht durch digitale Schaltungsblöcke erzeugt werden kann. Daher ist die Notwendigkeit von analogen LC-Oszillatoren gegeben. Die Erzeugung von höchst stabilen und hochfrequenten Signalen war lange Zeit teuren Silizium-Germanium-Technologien vorbehalten. Jedoch erfordert der steigende Integrationsgrad und der hart umkämpfte Markt, die Entwicklung von RF-Schaltungen in günstigen CMOS-Technologien. In Zusammenarbeit mit der Landshut Silicon Foundry soll dazu eine monolithisch integrierte Phase-Locked Loop (PLL) mit einer mittleren Ausgangsfrequenz von 2,44 GHz und einem Phasenrauschen kleiner -115 dBc/Hz bei einem Abstand von 1 MHz vom Träger entwickelt werden. Dabei wird das Hauptaugenmerk auf den Kern der PLL gelegt, welcher einen spannungsgesteuerten Oszillator, einen Phasen-/Frequenzdetektor, eine Ladungspumpe, einen Schleifenfilter und einen Frequenzteiler beinhaltet. Außerdem sollen Testszenarien vorgestellt werden, um die Eigenschaften der gefertigten PLL zu bestimmen und zu vergleichen.

Fundação de Amparo à Pesquisa do Estado do Rio de Janeiro / O objetivo deste trabalho é conhecer e compreender melhor os imprevistos no fornecimento de energia elétrica, quando ocorrem as variações de tensão de curta duração (VTCD). O banco de dados necessário para os diagnósticos das faltas foi obtido através de simulações de um modelo de alimentador radial através do software PSCAD/EMTDC. Este trabalho utiliza um Phase-Locked Loop (PLL) com o intuito de detectar VTCDs e realizar a estimativa automática da frequência, do ângulo de fase e da amplitude das tensões e correntes da rede elétrica. Nesta pesquisa, desenvolveram-se duas redes neurais artificiais: uma para identificar e outra para localizar as VTCDs ocorridas no sistema de distribuição de energia elétrica. A técnica aqui proposta aplica-se a alimentadores trifásicos com cargas desequilibradas, que podem possuir ramais laterais trifásicos, bifásicos e monofásicos. No desenvolvimento da mesma, considera-se que há disponibilidade de medições de tensões e correntes no nó inicial do alimentador e também em alguns pontos esparsos ao longo do alimentador de distribuição. Os desempenhos das arquiteturas das redes neurais foram satisfatórios e demonstram a viabilidade das RNAs na obtenção das generalizações que habilitam o sistema para realizar a classificação de curtos-circuitos. / The objective of this work is to know and understand the unforeseen in the supply of electricity, when there are short duration voltage variations (SDVV). The required databases for the diagnosis of faults were obtained through simulations of a model of radial feeder through software PSCAD/EMTDC. This work uses a Phase-Locked Loop (PLL) in order to detect and perform the estimation SDVV automatic frequency, phase angle and amplitude of the voltage and current from the power grid. This research is developing two artificial neural networks: one to identify and another to locate the SDVV occurred in the distribution system of electricity. The technique proposed here applies to three-phase feeders with unbalanced loads, which can have side extensions triphasic, biphasic and monophasic. In developing the same, it is considered that there is availability of measurements of voltages and currents at the node of the initial feeder and also in some points scattered along the distribution feeder. The performances of the architectures of neural networks were satisfactory and demonstrate the feasibility of ANNs in obtaining the generalizations that enables the system for the classification of short circuits.

Fundação de Amparo à Pesquisa do Estado do Rio de Janeiro / O objetivo deste trabalho é conhecer e compreender melhor os imprevistos no fornecimento de energia elétrica, quando ocorrem as variações de tensão de curta duração (VTCD). O banco de dados necessário para os diagnósticos das faltas foi obtido através de simulações de um modelo de alimentador radial através do software PSCAD/EMTDC. Este trabalho utiliza um Phase-Locked Loop (PLL) com o intuito de detectar VTCDs e realizar a estimativa automática da frequência, do ângulo de fase e da amplitude das tensões e correntes da rede elétrica. Nesta pesquisa, desenvolveram-se duas redes neurais artificiais: uma para identificar e outra para localizar as VTCDs ocorridas no sistema de distribuição de energia elétrica. A técnica aqui proposta aplica-se a alimentadores trifásicos com cargas desequilibradas, que podem possuir ramais laterais trifásicos, bifásicos e monofásicos. No desenvolvimento da mesma, considera-se que há disponibilidade de medições de tensões e correntes no nó inicial do alimentador e também em alguns pontos esparsos ao longo do alimentador de distribuição. Os desempenhos das arquiteturas das redes neurais foram satisfatórios e demonstram a viabilidade das RNAs na obtenção das generalizações que habilitam o sistema para realizar a classificação de curtos-circuitos. / The objective of this work is to know and understand the unforeseen in the supply of electricity, when there are short duration voltage variations (SDVV). The required databases for the diagnosis of faults were obtained through simulations of a model of radial feeder through software PSCAD/EMTDC. This work uses a Phase-Locked Loop (PLL) in order to detect and perform the estimation SDVV automatic frequency, phase angle and amplitude of the voltage and current from the power grid. This research is developing two artificial neural networks: one to identify and another to locate the SDVV occurred in the distribution system of electricity. The technique proposed here applies to three-phase feeders with unbalanced loads, which can have side extensions triphasic, biphasic and monophasic. In developing the same, it is considered that there is availability of measurements of voltages and currents at the node of the initial feeder and also in some points scattered along the distribution feeder. The performances of the architectures of neural networks were satisfactory and demonstrate the feasibility of ANNs in obtaining the generalizations that enables the system for the classification of short circuits.

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / Protection systems used in distribution networks of electricity are not able to detect short circuits with high contact resistance due to the low currents generated, endangering the population and degrading the quality of the energy supplied. In this sense, this paper presents a new methodology for detecting high-impedance faults (HIF) in distribution networks. The developed algorithm has the main advantage the fact also detect and classify other types of transient as, for example, switching capacitor banks, transformers and loads. This characteristic decreases the improper operation caused by transient switching. Another feature of the developed method is no need to install additional equipment on the network which greatly reduces the cost of implementation. Additionally, the paper also discusses the causes, consequences and characteristics of HIF in order to evidence the difficulties related to their detection. A brief review of the models proposed in the literature for computational simulation of HIF is also discussed, and the model used in this work is described in detail. To evaluate the performance of the algorithm developed a series of tests with different fault scenarios high impedance were made. Furthermore, other various types of transients that are normal in the feeders were tested. The good results obtained, combined the simplicity of the method and does not need to install additional equipment feeders, makes a promising technique for real applications. / Os sistemas de proteção utilizados em redes de distribuição de energia elétrica não são capazes de detectar curtos-circuitos com alta resistência de contato devido às reduzidas correntes geradas, colocando em risco a população e degradando a qualidade da energia fornecida. Neste sentido, este trabalho visa apresentar uma nova metodologia para detecção de faltas de alta impedância (FAI) em redes de distribuição de energia elétrica. O algoritmo desenvolvido possui como principal vantagem o fato de também detectar e classificar outros tipos de transitórios como, por exemplo, chaveamento de banco de capacitores, transformadores e manobras de ramais. Essa característica diminui consideravelmente as atuações indevidas causadas por transitórios oriundos de manobras. Outra característica do método desenvolvido é a não necessidade de instalação de equipamentos adicionais na rede, o que reduz consideravelmente o custo de sua implementação. Além disso, o trabalho também aborda as causas, consequências e características das FAI de forma a evidenciar as dificuldades relacionadas à sua detecção. Uma breve revisão sobre os modelos propostos na literatura para simulação computacional de FAI também é abordado, sendo que o modelo utilizado nesse trabalho é descrito em detalhes. Para avaliar o desempenho do algoritmo desenvolvido, uma série de testes com diferentes cenários de falta de alta impedância foram realizados. Além disso, outros tipos de transitórios que são normais nos alimentadores foram testados. Os bons resultados obtidos, aliado a simplicidade do método e a não necessidade de instalação de equipamentos adicionais nos alimentadores, torna a técnica promissora para aplicações reais.

Die Spezifikationen und Toleranzbereiche heutiger Hochgeschwindigkeitsdatenübertragungstechnologien nehmen immer weiter an Komplexität, aufgrund der steigenden Informationsmenge, zu. Zur Verarbeitung von Daten in Frequenzbereichen oberhalb von einem Gigahertz sind Referenzsignale notwendig, welche ein äußerst geringes Phasenrauschen aufweisen um benachbarte Kanäle nicht zu beeinflussen. Diese Referenzsignale werden in Mischerschaltungen zur Modulation oder Demodulation zwischen radio frequency (RF)- und intermediate frequency (IF)-Signalen verwendet. Die benötigte Signalform ist eine Sinusschwingung, die nicht durch digitale Schaltungsblöcke erzeugt werden kann. Daher ist die Notwendigkeit von analogen LC-Oszillatoren gegeben. Die Erzeugung von höchst stabilen und hochfrequenten Signalen war lange Zeit teuren Silizium-Germanium-Technologien vorbehalten. Jedoch erfordert der steigende Integrationsgrad und der hart umkämpfte Markt, die Entwicklung von RF-Schaltungen in günstigen CMOS-Technologien. In Zusammenarbeit mit der Landshut Silicon Foundry soll dazu eine monolithisch integrierte Phase-Locked Loop (PLL) mit einer mittleren Ausgangsfrequenz von 2,44 GHz und einem Phasenrauschen kleiner -115 dBc/Hz bei einem Abstand von 1 MHz vom Träger entwickelt werden. Dabei wird das Hauptaugenmerk auf den Kern der PLL gelegt, welcher einen spannungsgesteuerten Oszillator, einen Phasen-/Frequenzdetektor, eine Ladungspumpe, einen Schleifenfilter und einen Frequenzteiler beinhaltet. Außerdem sollen Testszenarien vorgestellt werden, um die Eigenschaften der gefertigten PLL zu bestimmen und zu vergleichen.

T-cell prolymphocytic leukemia (T-PLL) is a rare blood cancer with poor prognosis. Overexpression of the proto-oncogene TCL1A and missense mutations of the tumor suppressor ATM are putative main drivers of T-PLL development, but so far only little is known about the existence of T-PLL gene expression subtypes. We performed an in-depth computational reanalysis of 68 gene expression profiles of one of the largest currently existing T-PLL patient cohorts. Hierarchical clustering combined with bootstrapping revealed three robust T-PLL gene expression subgroups. Additional comparative analyses revealed similarities and differences of these subgroups at the level of individual genes, signaling and metabolic pathways, and associated gene regulatory networks. Differences were mainly reflected at the transcriptomic level, whereas gene copy number profiles of the three subgroups were much more similar to each other, except for few characteristic differences like duplications of parts of the chromosomes 7, 8, 14, and 22. At the network level, most of the 41 predicted potential major regulators showed subgroup-specific expression levels that differed at least in comparison to one other subgroup. Functional annotations suggest that these regulators contribute to differences between the subgroups by altering processes like immune responses, angiogenesis, cellular respiration, cell proliferation, apoptosis, or migration. Most of these regulators are known from other cancers and several of them have been reported in relation to leukemia (e.g. AHSP, CXCL8, CXCR2, ELANE, FFAR2, G0S2, GIMAP2, IL1RN, LCN2, MBTD1, PPP1R15A). The existence of the three revealed T-PLL subgroups was further validated by a classification of T-PLL patients from two other smaller cohorts. Overall, our study contributes to an improved stratification of T-PLL and the observed subgroup-specific molecular characteristics could help to develop urgently needed targeted treatment strategies.

The aim of this project was to devise an algorithm for three phase AC power grid measurements that could be utilized in an excitation system for controlling generators. This application requires fast and accurate measurements even when the voltages in the power grid are characterized by unbalanced three-phase, frequency variations and harmonic distortions. Phase locked loop algorithms are used in grid synchronization techniques and are developed to withstand disturbances in the power grid. A DSOGI-PLL was implemented on a PLC and then evaluated. The DSOGI-PLL was tested with input voltages generated by a relay testing system. The result showed that the DSOGI-PLL could measure positive sequence component RMS and grid frequency of unbalanced three-phase voltages and voltages characterized by frequency variations and harmonic distortions. However, the measurements response time and accuracy did not meet the requirements for application in excitation systems.

Osciladores Controlados por Tensão (VCOs - Voltage-Controlled Oscillators) são circuitos de grande importância em sistemas de comunicação por radiofrequência atuais. Muitos trabalhos de pesquisa recentes têm focado no desenvolvimento de VCOs para aplicações em uma faixa muito grande de frequências (isto é, suportando amplo tunning range). O desenvolvimento de VCOs com uma ampla faixa de sintonia tem motivação na abertura de bandas de frequência, que até pouco tempo estavam licenciadas apenas para usos específicos, porém agora estão também abertas para a utilização de sistemas de rádios cognitivos. A ideia é que o rádio cognitivo tenha recursos para detectar se um canal (ou faixa de frequência) está sendo usado e, em caso de o canal não estar sendo usado, o rádio cognitivo deve se reconfigurar para operar nesse canal. Desse modo, os rádios cognitivos devem possuir um alto grau de reconfigurabilidade, de forma que possam operar em uma faixa muito ampla de frequências. Esse requisito exige o uso de de VCOs com um amplo tunning range. Este trabalho apresenta um projeto completo de um LC-VCO com uma larga faixa de frequência de operação (widedand). Um amplo tunning range foi obtido a partir do chaveamento (ou programação) do valor da capacitância total do tanque-LC do VCO, gerando assim várias sub-bandas de frequência. O ganho do VCO (KVCO) manteve-se com pequenas variações para todas as subbandas de frequência, com um valor médio de 88.6MHz, sendo 112MHz e 80MHz os valores máximo e mínimo, respectivamente. O ruído de fase variou de -118.4dBc/Hz a -107.4dBc/Hz para as portadores em 3.7GHz e 8.1GHz, respectivamente, enquanto que a potência dissipada do circuito LC-VCO variou de 1.8mW a 5.6mW para todo o tunning range. Para a figura de mérito power-frequency-tunning-normalized (FOMPFTN), os valores obtidos foram na faixa 3.1dB e 11.2dB, comparáveis com a maioria dos trabalhos publicados na área. / Voltage-Controlled Oscillators (VCOs) are very important circuits in current radio frequency communication systems. Much research has been focused recently on developing wideband VCOs in CMOS. The motivation on wideband VCOs is based on the opening of frequency bands, which until recently were licensed for specific uses, for use by cognitive radio systems. The idea is that cognitive radio must have the ability to detect whether a channel (or frequency band) is being used and if the channel is not being used, the cognitive radio must reconfigure itself to operate on that channel. Thus, cognitive radios should possess a high degree of reconfigurability, so that they can operate in a very wide frequency range. This requires the use of VCOs with a wide tunning range. This work presents a complete design of a LC-VCO with a wide operating frequency range (widedand). A wide tunning range has been obtained from the switching (or programming) the value of the total capacitance of the LC-tank of the VCO, thereby generating multiple frequency sub-bands. The VCO gain (KVCO) was maintained with small variations for all frequency sub-bands, with an average value of 88.6MHz, with 80MHz and 112MHz for the minimum and maximum values, respectively. The phase noise ranged from -118.4dBc/Hz to -107.4dBc/Hz for carriers at 3.7GHz and 8.1GHz, respectively, while the power dissipated in the LC-VCO circuit ranged from 1.8mW to 5.6mW for all tunning range. For the figure of merit power-frequency-tuning-normalized (FOMPFTN), the results were in the 3.1dB to 11.2dB range, comparable to most recently published works.

L'objectif de cette thèse est de proposer des solutions pour améliorer les performances des transmissions des terminaux mobiles à haut débits, faibles coûts et faible consommation. En effet, l'augmentation des débits implique que les canaux de transmission soient de plus en plus difficiles, rendant la tâche des récepteurs plus ardue. Nous nous intéressons aux systèmes MultiBandes OFDM car ils soumettent la porteuse à un algorithme de saut de fréquence, et permettent ainsi de disposer d'une grande diversité fréquentielle. Dans ce contexte, nous proposons dans une première partie des égaliseurs de canaux optimaux au sens des moindres carrés tirant profit de la diversité fréquentielle afin d'améliorer d'une manière significative les performances des systèmes<br>OFDM pour des canaux très difficiles. Dans la seconde partie de ce travail, nous proposons un synthétiseur de fréquence agile sur 14 bandes dont les composants ont été optimisés afin de rendre sa réalisation la moins complexe possible et qui répondent aux exigences des systèmes MultiBandes en termes de temps de commutation, de bruit de phase et de pureté spectrale. Ce nouveau type de synthétiseur de fréquences rend inévitable le déséquilibre entre les voies I et Q de l'émetteur et/ou du récepteur. La troisième partie de ce travail consiste à proposer des algorithmes originaux permettant conjointement d'égaliser le canal et de compenser numériquement le déséquilibre IQ. Ces traitements valables pour tout système OFDM permettent de relâcher les contraintes de la partie analogique.