Gallium Oxide (Ga2O3) is an ultra-wide bandgap semiconductor with a bandgap of 4.5–4.9 eV, which is larger than that of Silicon (Si), Silicon Carbide (SiC), and Gallium Nitride (GaN). A benefit of this ultra-wide bandgap is the high-temperature stability due to the low intrinsic carrier concentration. Another benefit is the high critical electric field (Ec), which is estimated to be from 6 MV/cm to 8 MV/cm in Ga2O3. This allows for a superior Baliga's figure of merit (BFOM) of unipolar Ga2O3 power devices, i.e., they potentially can achieve a smaller specific on-resistance (RON,SP) as compared to the Si, SiC, and GaN devices with the same breakdown voltage (BV). The above prospects make Ga2O3 devices the promising candidates for next-generation power electronics. This dissertation explores the design, fabrication, characterization, and packaging of vertical β-Ga2O3 Schottky barrier diodes (SBDs) and P-N diodes. The power SBDs allow for a small forward voltage and a fast switching speed; thus, it is ubiquitously utilized in power electronics systems. Meanwhile, the Ga2O3 power P-N diodes have the benefit of smaller leakage current, and the diode structure could be a building block for many advanced diodes and transistors. Hence, the study of Ga2O3 Schottky and P-N diodes is expected to provide the foundation for developing a series of Ga2O3 power devices. Firstly, vertical Ga2O3 Schottky and P-N diodes with a novel edge termination (ET), the multi-layer Nickel Oxide (NiO) junction termination extension (JTE), are fabricated on Ga2O3 substrates. This multi-JTE NiO structure decreases the peak electric field (Epeak) at the triple point of device edge when the Ga2O3 diodes are reversely biased. For SBDs, BV reach 2.5 kV, the 1-D junction field reaches 3.08 MV/cm, and the BFOM exceeds 1 GW/cm2. For P-N diodes, BV reaches 3.3 kV, the junction field reaches 4.2 MV/cm, and the BFOM reaches 2.6 GW/cm2. These results are among the highest in Ga2O3 power devices and are comparable to the state-of-the-art vertical GaN Schottky and P-N diodes. Notably, all these diodes are small-area devices. Secondly, large-area (3 mm×3 mm anode size) Ga2O3 Schottky and P-N diodes with high current capability are fabricated to explore the packaging, thermal management, and switching characteristics of Ga2O3 diodes. The same ET is applied for the large-area P-N diode. The fabricated large-area P-N diodes have a turn-on voltage of 2 V, a differential on-resistance (Ron) of 0.2 Ω, and they can reach at least 15 A when measured in the pulse mode. The BV of large-area Ga2O3 P-N diodes varies due to the fabrication non-uniformity, but the best device achieves a BV of 1.6 kV, standing among the highest values reported for large-area Ga2O3 diodes. Also, the large-area Ga2O3 SBDs with similar current rating but with a FP ET are fabricated mainly for the packaging and thermal management studies. Thirdly, medium-area Ga2O3 P-N diodes with a current over 1 A and a higher yield of BV are fabricated to evaluate the JTE's capacitance and switching characteristics. The JTE accounts for only ~11% of the junction capacitance of this 1 A diode, and the percentage is expected to be even smaller for higher-current diodes. The turn-on/off speed and reverse recovery time of the diode are comparable to commercial SiC Schottky barrier diodes under the on-wafer switching test. These results show the viability of NiO JTE for enabling a fast switching speed in high-voltage Ga2O3 power devices. Fourthly, the fabricated large-area Ga2O3 diodes are packaged using silver sintering as the die attach. The sintered silver joint has higher thermal conductivity (kT) and better reliability as compared to the solder joint. Due to the low kT of Ga2O3 material, junction-side-cooled (JSC) packaging configuration is necessary for Ga2O3 devices. For the packaged device, its junction-to-case thermal resistance (RθJC) is measured in the bottom-side-cooled (BSC) and junction-side-cooled (JSC) configuration by the transient dual interface method according to the JEDEC 51-14 standard. The RθJC of the junction- and bottom-cooled Ga2O3 SBD is measured to be 0.5 K/W and 1.43 K/W, respectively. The former RθJC is lower than that of similarly-rated commercial SiC SBDs. This manifests the significance of JSC packaging for the thermal management of Ga2O3 devices. Fifthly, to evaluate the electrothermal robustness of the packaged Ga2O3 devices, the surge current capability of JSC packaged Ga2O3 SBDs are measured. The Ga2O3 SBDs with proper packaging show high surge current capabilities. The double-side-cooled (DSC) large-area Ga2O3 SBDs can sustain a peak surge current over 60 A, with a ratio between the peak surge current and the rated current superior to that of similarly-rated commercial SiC SBDs. These results show the excellent ruggedness of Ga2O3 power devices. Finally, a Ga2O3 integrated diode module consisting of four single-diode sub-modules is designed and fabricated. For many power electronics applications, high current is desired; however, for emerging semiconductors, the current upscaling is difficult by directly increasing the device area because of the limitation of heat extraction capability and the limited material/processing yield. Here we explore the paralleling of multiple Ga2O3 P-N diodes to increase the current level. For each sub-module, the JSC packaging structure is used for heat extraction, and a metal post is sintered to the anode for electric field (E-field) management. RθJC is measured to be 1 W/K for each sub-module. On-board double-pulsed test is performed for both the sub-module and the full module. The sub-module and full module demonstrate 400 V, 10 A and 150 V, 70 A switching capabilities, respectively. This is the first demonstration of Ga2O3 power module and shows a promising approach to upscale of the power level of Ga2O3 power electronics. In addition to Ga2O3 device study, a research is conducted to explore the chip size (Achip) minimization for wide-bandgap (WBG) and ultra-wide bandgap (UWBG) power devices. Achip optimization is particularly critical for WBG and UWBG power devices and modules due to the high material cost. This work presents a new, holistic, electrothermal approach to optimize Achip for a given set of target specifications including BV, conduction current (I0), and switching frequency (f). The conduction and switching losses of the device are considered, as well as the heat dissipation in the chip and its package. For a given BV and I0, the optimal Achip, Wdr, and Ndr show strong dependence on f and thermal management. Our approach offers more accurate cost analysis and design guidelines for power modules. In summary, this dissertation covers the design, fabrication, characterization, and packaging of Ga2O3 Schottky and P-N diodes, with the aim to advance Ga2O3 devices to power electronics applications. This dissertation addresses many knowledge gaps on Ga2O3 devices, including the voltage upscaling (ET), current upscaling (large-area device fabrication, packaging, and thermal management), and their concurrence (module demonstration), as well as the circuit-level switching characterizations. / Doctor of Philosophy / Power electronics is the processing of electric energy using solid-state electronics. It is ubiquitously used in consumer electronics, data centers, electric vehicles, electricity grids, and renewable energy systems. Advanced power device technologies are paramount to improving the performance of power electronic systems. Power device design centers on the concurrent realization of low on-resistance (RON), high breakdown voltage (BV), and small turn-on/turn-off power losses. A key driver for advancement of power devices is the semiconductor material. Over the last decade, power devices based on wide-bandgap semiconductors like SiC and GaN have enabled tremendous performance advancements in power electronic systems. On the horizon, Ga2O3 is an emerging semiconductor with an ultra-wide bandgap (UWBG) of 4.5–4.9 eV, which is higher than that of Si, SiC, and GaN. Benefitted from this larger bandgap, the theoretical performance of Ga2O3 power devices is superior to the Si, SiC, and GaN counterparts. Hence, Ga2O3 devices are regarded as the promising candidates for next-generation power electronics. The power diode is an important component in power circuits, and the diode structure is usually a building block for power transistors. Small-area (0.1 A current level) Ga2O3 Schottky barrier diodes (SBDs) and P-N diodes are first designed and fabricated with a novel ET, the NiO JTE, reaching a high BV from 2.5 to 3.5 kV and junction E-field up to 4.2 MV/cm. Subsequently, large-area (>15 A current level) Ga2O3 diodes are fabricated with the same ET, achieving a BV of 1.6 kV, which is among the highest BV demonstrated in large-area Ga2O3 devices. In addition, on-wafer switching tests are performed on the medium-area (1 A current level) Ga2O3 P-N diodes, and their turn-on/off speed and reverse recovery time are comparable to commercial SiC Schottky barrier diodes. In addition to voltage upscaling, current upscaling is also a key challenge for Ga2O3 power devices. To overcome the low thermal conductivity (kT) of Ga2O3, junction side cooling (JSC) packaging is used to increase the heat extraction capability of Ga2O3 diode, enabling the demonstration of a junction-to-case thermal resistance comparable to that of similarly-rated, commercial SiC diode. Benefitted from this enhanced heat extraction, the packaged Ga2O3 diodes show an excellent surge current robustness. Finally, a Ga2O3 integrated diode module consisting of four single-diode sub-modules is designed, fabricated, and tested in the on-board switching circuits up to 70 A and 400 V. This is the first demonstration of a Ga2O3 power module. In summary, this dissertation covers the design, fabrication, characterization, and packaging of Ga2O3 power diodes with the aim to advance Ga2O3 devices to power electronics applications. This dissertation addresses many knowledge gaps on the voltage upscaling, current upscaling, and the circuit-level switching characteristics of Ga2O3 power devices and modules and thus pave the road for their power electronics applications.

Waste is common in Swedish urban environments, most of this waste consists of cigarette butts and snus but some of it is packaging waste. The degradation of packaging waste leads to the spread of microplastics, chemicals, sharp metals, and glass. It also contributes to disorder which can lead to increased crime. Swedish municipalities pay billions (SEK) annually to clean up and the environmental and social effects has an unknown cost on society. This report’s purpose was to investigate how the amount of packaging waste in three different socioeconomic areas and the people living there would be affected by a deposit on all packaging. To achieve this, a field study in Örebro was performed where packaging waste was counted. The results showed that the area with the largest socioeconomic challenges had the most packaging and that plastic and paper packaging were the most common in all areas. The report concludes that less populated areas with socioeconomically beneficial conditions generate more packaging waste than areas with larger populations and less beneficial conditions. As a measure against packaging waste this report proposes introducing a deposit on all packaging. The recycling statistics for packaging with a deposit on indicate that it would be anefficient measure. It might cause a change in behavior which would reduce the presence of packaging waste. This would lead to a reduced spread of microplastics, chemicals, sharp metals and glass, a reduction in disorderand crime while also reducing the costs these problems bring. / Skräp förekommer i svenska urbana miljöer, främst cigarettfimpar och portionssnus men även förpackningar. Förekomsten av skräp som förpackningar orsakar en spridning av mikroplaster, kemikalier, vassa metaller och glas vid nedbrytning. Det leder dessutom till oro och ökad brottsförekomst. Sverige betalar årligen miljarder för uppstädning och ytterligare kostnader tillkommer i och med dess påverkan på samhället och miljön. Bland detta skräp finns förpackningsskräp och rapportens syfte var att undersöka förekomsten av förpackningsskräp i tre socioekonomisktskilda områden för att se hur mängden förpackningsskräp och lokalbefolkningen påverkas om pant på alla förpackningar införs. För att uppnå detta syfte genomfördes en fältundersökning i tre olika socioekonomiska områden i Örebro där mängden förpackningsskräp räknades längs en specifik sträcka. Resultaten visade att förpackningar av plast och cellulosabaserade material var vanligast i alla områden, att majoriteten av förpackningsskräp var från livsmedel och att fler förpackningar med pant förekom i området med mycket goda socioekonomiska förutsättningar. Rapportens slutsatser visar att oavsett områdestyp är förpackningsskräp gjort av plast och cellulosabaserad ematerial vanligast. Dessutom verkar de ekonomiska förutsättningarna i ett område ha en större påverkan på förekomsten av förpackningsskräp än antalet människor som finns i området. Som åtgärd mot förekomsten av förpackningsskräp föreslås pant. Återvinningsstatistiken för förpackningar med pant visar att det skulle vara en effektiv åtgärd som kan leda till en beteendeförändring som minskar förekomsten av förpackningsskräp.Detta leder till en minskad spridning av mikroplaster, kemikalier, vassa metaller och glas. Samtidigt som oron, brottsförekomsten och kostnaderna för landet minskar som en följd av minskad nedskräpning / <p>2023-06-02</p>

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