This master’s thesis deals with the design and the realization of a laboratory teaching device, which includes two-port parts with nonlinear transmission characteristics corresponding to quadratic, inverse quadratic and cubic functions. It also includes a more complicated design of a polynomial function converter that offers students a practical view of functions mathematically designed while verifying their accuracy in laboratory exercises. The whole concept is supported by the design of the power supply circuit and the harmonic signal generator. The individual features of this project are feasible from components commercially available.

This work investigates the optimal measurement matrices that can be used in compressive sensing (CS) image sensors. It also optimizes CMOS current-model pixel cell circuits for CS image sensors. Based on the outcomes from these optimization studies, three CS image senor circuits with compression ratios of 4, 6, and 8 are designed with using a 130 nm CMOS technology. The pixel arrays used in the image sensors has a size of 256X256. Circuit simulations with benchmark image Lenna show that the three images sensors can achieve peak signal to noise ratio (PSNR) values of 37.64, 33.29, and 32.44 dB respectively.

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High electron mobility transistors (HEMTs) have long been studied for high frequency and high-power application. Among widely known high electron mobility transistors, AlGaN/GaN HEMTs are having the upper hand due to high electron mobility of the GaN channel. Over the times, issues like current collapse, gate leakage, self-heating and gate lag have questioned the performance and reliability of these devices. In the recent years, engineers have come up with newer architectures to address some of these issues. Inserting a high-k dielectric oxide layer in the gate stack proved to be an effective solution to mitigate gate leakage, reduce interfacial traps and improve optimal working conditions. This work aims to study the reliability aspect of these so-called metal-oxide-semiconductor high electron mobility transistors (MOS-HEMT) specifically, HfO2 and HfZrO2 MOS-HEMTs. It was found through numerical simulations that though HfO2 and HfZrO2 dielectrics were able to mitigate gate leakage current, they tend to accumulate more heat in the channel region with respect to the conventional silicon nitride (SiN) passivated counterparts. Moreover, few asymmetric structures were proposed where silicon nitride was placed in the dielectric layer along with HfO2/HfZrO2. In this study it was found that these asymmetric structures showed superior thermal performance while showing near-zero gate leakage current.

This study uses differential pass transistor methodology for implementing and evaluating Boolean functions. The main goal is investigation of CMOS and nMOS approaches in pass transistor logic design. Pass-transistor logic is most effective in the implementation of Boolean functions when the vectors are in the same format. It has been demonstrated that nMOS pass transistor logic driven by a control signal voltage above the V dd level offers a significant improvement in speed. nMOS pass transistorsalso offer less area consumption in comparison to the CMOS approach. The philosophy developed here has been used in the design of a program for the layout generation of pass transistor networks. This program has been applied to the design of a 4-to-1 multiplexer and an adder (sum and carry). The layout of the circuit sub-cell have been done using the program Magic, based on 3μ CMOS p-well technology.

Reduced graphene oxide (RGO) sheet, a chemically functionalized atomically thin carbon sheet, provides a convenient pathway for producing large quantities of graphene via solution processing. The easy processibility of RGO sheet and its composites offer interesting electronic, chemical and mechanical properties that are currently being explored for advanced electronics and energy based materials. However, a clear understanding of electron transport properties of RGO sheet is lacking which is of great significance for determining its potential application. In this dissertation, I demonstrate fabrication of high-yield solution based graphene field effects transistor (FET) using AC dielectrophoresis (DEP) and investigate the detailed electronic transport properties of the fabricated devices. The majority of the devices show ambipolar FET properties at room temperature. However, the mobility values are found to be lower than pristine graphene due to a large amount of residual defects in RGO sheets. I calculate the density of these defects by analyzing the low temperature (295 to 77K) charge transport data using space charge limited conduction (SCLC) with exponential trap distribution. At very low temperature (down to 4.2 K), I observe Coulomb blockade (CB) and Efros-Shklovskii variable range hopping (ES VRH) conduction in RGO implying that RGO can be considered as a graphene quantum dots (GQD) array, where graphene domains act like QDs while oxidized domains behave like tunnel barriers between QDs. This was further confirmed by studying RGO sheets of varying carbon sp 2 fraction from 55 – 80 % and found that both the localization length and CB can be tuned. From the localization length and using confinement effect, we estimate tunable band gap of RGO sheets with varying carbon sp 2 fraction. I then studied one dimensional RGO nanoribbon iv (RGONR) and found ES VRH and CB models are also applicable to the RGONR. However, in contrast to linear behavior of decrease in threshold voltage (Vt) with increasing temperature (T) in the RGO, sub linear dependence of Vt on T was observed in RGONR due to reduced transport pathways. Finally, I demonstrate synthesis and transport studies of RGO/nanoparticles (CdS and CeO2) composite and show that the properties of RGO can be further tuned by attaching the nanoparticles.

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<p> The Metal-Oxide Semiconductor Field-Effect Transistor is first analyzed from an active R-C transmission line view-point. The small signal circuit model and the noise model of the device are then derived and experimental results presented.</p> <p> A Chronologically arranged bibliography concerning MOS devices and associated noise studies is included at the end of this thesis.</p> / Thesis / Master of Engineering (MEngr)

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